DE69837036D1 - Verfahren und vorrichtung zur ausführung einer entschlüsselung mittels einer standardisierten modularen potenzierung zum vereiteln eines zeitangriffs - Google Patents

Verfahren und vorrichtung zur ausführung einer entschlüsselung mittels einer standardisierten modularen potenzierung zum vereiteln eines zeitangriffs

Info

Publication number
DE69837036D1
DE69837036D1 DE69837036T DE69837036T DE69837036D1 DE 69837036 D1 DE69837036 D1 DE 69837036D1 DE 69837036 T DE69837036 T DE 69837036T DE 69837036 T DE69837036 T DE 69837036T DE 69837036 D1 DE69837036 D1 DE 69837036D1
Authority
DE
Germany
Prior art keywords
veriting
potentiation
decomposition
carrying
time attack
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69837036T
Other languages
English (en)
Other versions
DE69837036T2 (de
Inventor
Dirk Hollmann
Dijk Erik Van
Johannes Lenoir
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of DE69837036D1 publication Critical patent/DE69837036D1/de
Application granted granted Critical
Publication of DE69837036T2 publication Critical patent/DE69837036T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/723—Modular exponentiation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002—Countermeasures against attacks on cryptographic mechanisms
    • H04L9/005—Countermeasures against attacks on cryptographic mechanisms for timing attacks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/30—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
    • H04L9/3006—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters
    • H04L9/302—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters involving the integer factorization problem, e.g. RSA or quadratic sieve [QS] schemes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks
    • G06F2207/7261—Uniform execution, e.g. avoiding jumps, or using formulae with the same power profile

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Computer Security & Cryptography (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computational Mathematics (AREA)
  • Signal Processing (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Storage Device Security (AREA)
  • Complex Calculations (AREA)
  • Debugging And Monitoring (AREA)
  • Financial Or Insurance-Related Operations Such As Payment And Settlement (AREA)
DE69837036T 1997-09-16 1998-08-17 Verfahren und vorrichtung zur ausführung einer entschlüsselung mittels einer standardisierten modularen potenzierung zum vereiteln eines zeitangriffs Expired - Fee Related DE69837036T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP97202855 1997-09-16
EP97202855 1997-09-16
PCT/IB1998/001255 WO1999014880A2 (en) 1997-09-16 1998-08-17 A method and device for executing a decrypting mechanism through calculating a standardized modular exponentiation for thwarting timing attacks

Publications (2)

Publication Number Publication Date
DE69837036D1 true DE69837036D1 (de) 2007-03-22
DE69837036T2 DE69837036T2 (de) 2007-10-18

Family

ID=8228732

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69837036T Expired - Fee Related DE69837036T2 (de) 1997-09-16 1998-08-17 Verfahren und vorrichtung zur ausführung einer entschlüsselung mittels einer standardisierten modularen potenzierung zum vereiteln eines zeitangriffs

Country Status (5)

Country Link
US (1) US6366673B1 (de)
EP (1) EP0938790B1 (de)
JP (2) JP2001505325A (de)
DE (1) DE69837036T2 (de)
WO (1) WO1999014880A2 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2243761C (en) * 1998-07-21 2009-10-06 Certicom Corp. Timing attack resistant cryptographic system
US6804782B1 (en) * 1999-06-11 2004-10-12 General Instrument Corporation Countermeasure to power attack and timing attack on cryptographic operations
US7607165B2 (en) 2001-03-09 2009-10-20 The Athena Group, Inc. Method and apparatus for multiplication and/or modular reduction processing
DE10111987A1 (de) * 2001-03-13 2002-09-26 Infineon Technologies Ag Verfahren und Vorrichtung zum modularen Multiplizieren
JP4664514B2 (ja) * 2001-03-14 2011-04-06 株式会社東芝 素数生成装置及びプログラム
GB0221837D0 (en) * 2002-09-20 2002-10-30 Koninkl Philips Electronics Nv Improved quisquater reduction
GB0314557D0 (en) * 2003-06-21 2003-07-30 Koninkl Philips Electronics Nv Improved reduction calculations
FR2862454A1 (fr) * 2003-11-18 2005-05-20 Atmel Corp Methode de reduction modulaire aleatoire et equipement associe
FR2885711B1 (fr) * 2005-05-12 2007-07-06 Atmel Corp Procede et materiel modulaire et aleatoire pour la reduction polynomiale
US20100042851A1 (en) * 2005-11-04 2010-02-18 Gemplus Method for Securely Handling Data During the Running of Cryptographic Algorithms on Embedded Systems
US8559625B2 (en) 2007-08-07 2013-10-15 Inside Secure Elliptic curve point transformations
US8619977B2 (en) 2008-01-15 2013-12-31 Inside Secure Representation change of a point on an elliptic curve
US8233615B2 (en) * 2008-01-15 2012-07-31 Inside Secure Modular reduction using a special form of the modulus
US8176337B2 (en) * 2008-03-12 2012-05-08 Apple Inc. Computer object code obfuscation using boot installation
US8635467B2 (en) 2011-10-27 2014-01-21 Certicom Corp. Integrated circuit with logic circuitry and multiple concealing circuits
US8334705B1 (en) 2011-10-27 2012-12-18 Certicom Corp. Analog circuitry to conceal activity of logic circuitry
EP3188001B1 (de) * 2015-12-29 2020-08-12 Secure-IC SAS Modulare multiplikationsvorrichtung und verfahren
EP3503459B1 (de) * 2017-12-22 2021-04-21 Secure-IC SAS Vorrichtung und verfahren zum schutz der ausführung einer kryptographischen operation

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2658932A1 (fr) * 1990-02-23 1991-08-30 Koninkl Philips Electronics Nv Procede de codage selon la methode dite rsa, par un microcontroleur et dispositif utilisant ce procede.
IL97413A (en) * 1991-03-04 1995-06-29 Fortress U & T 2000 Ltd Microcircuit for the implementation of rsa algorithm and ordinary and modular arithmetic in particular exponentiation with large operands
US5479511A (en) * 1991-11-05 1995-12-26 Thomson Consumer Electronics S.A. Method, sender apparatus and receiver apparatus for modulo operation
US5274707A (en) * 1991-12-06 1993-12-28 Roger Schlafly Modular exponentiation and reduction device and method
US5604805A (en) * 1994-02-28 1997-02-18 Brands; Stefanus A. Privacy-protected transfer of electronic information
US5724279A (en) * 1995-08-25 1998-03-03 Microsoft Corporation Computer-implemented method and computer for performing modular reduction
KR100267009B1 (ko) * 1997-11-18 2000-09-15 윤종용 고속 암호화 처리를 위한 어레이 구조를 가지는 모듈러 곱셈장치
US6085210A (en) * 1998-01-22 2000-07-04 Philips Semiconductor, Inc. High-speed modular exponentiator and multiplier
US6088800A (en) * 1998-02-27 2000-07-11 Mosaid Technologies, Incorporated Encryption processor with shared memory interconnect
US6182104B1 (en) * 1998-07-22 2001-01-30 Motorola, Inc. Circuit and method of modulo multiplication

Also Published As

Publication number Publication date
JP2008293034A (ja) 2008-12-04
EP0938790B1 (de) 2007-02-07
EP0938790A2 (de) 1999-09-01
DE69837036T2 (de) 2007-10-18
JP2001505325A (ja) 2001-04-17
WO1999014880A3 (en) 1999-06-10
WO1999014880A2 (en) 1999-03-25
US6366673B1 (en) 2002-04-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee