DE69733468D1 - Rechner für Viterbi-dekodierte Daten mit zerostate metric hoher Qualität - Google Patents
Rechner für Viterbi-dekodierte Daten mit zerostate metric hoher QualitätInfo
- Publication number
- DE69733468D1 DE69733468D1 DE69733468T DE69733468T DE69733468D1 DE 69733468 D1 DE69733468 D1 DE 69733468D1 DE 69733468 T DE69733468 T DE 69733468T DE 69733468 T DE69733468 T DE 69733468T DE 69733468 D1 DE69733468 D1 DE 69733468D1
- Authority
- DE
- Germany
- Prior art keywords
- zerostate
- calculator
- high quality
- decoded data
- viterbi decoded
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6569—Implementation on processors, e.g. DSPs, or software implementations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
- H03M13/4107—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing add, compare, select [ACS] operations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
- H03M13/413—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors tail biting Viterbi decoding
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Maintenance And Management Of Digital Transmission (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR9724723 | 1997-06-14 | ||
KR1019970024723A KR100243213B1 (ko) | 1997-06-14 | 1997-06-14 | 제로상태평가량을이용한비터비복호데이터의품질평가장치 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69733468D1 true DE69733468D1 (de) | 2005-07-14 |
DE69733468T2 DE69733468T2 (de) | 2006-03-23 |
Family
ID=19509578
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69733468T Expired - Lifetime DE69733468T2 (de) | 1997-06-14 | 1997-12-22 | Rechner für Viterbi-dekodierte Daten mit zerostate metric hoher Qualität |
Country Status (7)
Country | Link |
---|---|
US (1) | US6029268A (de) |
EP (1) | EP0884852B1 (de) |
JP (1) | JP3248715B2 (de) |
KR (1) | KR100243213B1 (de) |
CN (1) | CN1167201C (de) |
CA (1) | CA2226487C (de) |
DE (1) | DE69733468T2 (de) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3202658B2 (ja) * | 1997-06-20 | 2001-08-27 | 日本電気株式会社 | 可変レートcdma送信電力制御方式 |
US6205186B1 (en) * | 1997-09-03 | 2001-03-20 | Qualcomm Incorporated | Decoding with partial state information on a convolutionally encoded channel |
US6112325A (en) * | 1998-01-23 | 2000-08-29 | Dspc Technologies, Ltd. | Method and device for detecting rate |
FR2786636B1 (fr) * | 1998-11-26 | 2001-05-04 | Cit Alcatel | Procede de reception de signaux, notamment de signaux de signalisation |
KR100526564B1 (ko) * | 1999-04-23 | 2005-11-04 | 삼성전자주식회사 | 비터비 복호기에서의 초기 상태평가량 설정장치 |
JP3815543B2 (ja) * | 2000-12-27 | 2006-08-30 | 日本電気株式会社 | 記録状態検出装置およびこれを備えた情報記録再生装置 |
US7730381B2 (en) * | 2004-06-09 | 2010-06-01 | Qualcomm Incorporated | Erasure detection and power control for a transport channel with unknown format in a wireless communication system |
US8074158B2 (en) | 2005-02-02 | 2011-12-06 | Qualcomm Incorporated | Erasure detection for a transport channel with an unknown format |
JP2007195076A (ja) * | 2006-01-20 | 2007-08-02 | Nec Corp | 無線通信システムとその送信電力制御方法および装置 |
US8739009B1 (en) * | 2007-12-27 | 2014-05-27 | Marvell International Ltd. | Methods and apparatus for defect detection and correction via iterative decoding algorithms |
US9118480B2 (en) | 2013-02-11 | 2015-08-25 | Telefonaktiebolaget Lm Ericsson (Publ) | Frame quality estimation during viterbi decoding |
CN108347714A (zh) * | 2018-04-02 | 2018-07-31 | 西安交通大学 | 一种利用软件无线电平台实现d2d通信的方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4527279A (en) * | 1982-07-12 | 1985-07-02 | Kokusai Denshin Denwa Co. | Synchronization circuit for a Viterbi decoder |
US5157672A (en) * | 1989-03-15 | 1992-10-20 | Nec Corporation | Interference detection apparatus for use in digital mobile communications system |
US5390198A (en) * | 1993-05-26 | 1995-02-14 | The Boeing Company | Soft decision viterbi decoder for M-ary convolutional codes |
ZA947317B (en) * | 1993-09-24 | 1995-05-10 | Qualcomm Inc | Multirate serial viterbi decoder for code division multiple access system applications |
US5648991A (en) * | 1994-02-16 | 1997-07-15 | Kabushiki Kaisha Toshiba | Sampling phase synchronizing apparatus and bidirectional maximum likelihood sequence estimation scheme therefore |
JP2605641B2 (ja) * | 1994-11-14 | 1997-04-30 | 日本電気株式会社 | 可変ビットレート判別方法及び装置 |
US5784392A (en) * | 1995-06-26 | 1998-07-21 | Nokia Mobile Phones Ltd. | Viterbi decoder with l=2 best decoding paths |
US5881075A (en) * | 1996-03-18 | 1999-03-09 | Samsung Electronics Co., Ltd. | Viterbi decoder |
US5878098A (en) * | 1996-06-27 | 1999-03-02 | Motorola, Inc. | Method and apparatus for rate determination in a communication system |
-
1997
- 1997-06-14 KR KR1019970024723A patent/KR100243213B1/ko not_active IP Right Cessation
- 1997-12-22 EP EP97310408A patent/EP0884852B1/de not_active Expired - Lifetime
- 1997-12-22 DE DE69733468T patent/DE69733468T2/de not_active Expired - Lifetime
- 1997-12-30 US US09/000,839 patent/US6029268A/en not_active Expired - Lifetime
-
1998
- 1998-01-07 CN CNB981036341A patent/CN1167201C/zh not_active Expired - Fee Related
- 1998-01-07 CA CA002226487A patent/CA2226487C/en not_active Expired - Fee Related
- 1998-03-17 JP JP06736298A patent/JP3248715B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0884852B1 (de) | 2005-06-08 |
CA2226487C (en) | 2002-02-19 |
CN1167201C (zh) | 2004-09-15 |
CN1202766A (zh) | 1998-12-23 |
KR100243213B1 (ko) | 2000-02-01 |
KR19990001410A (ko) | 1999-01-15 |
EP0884852A2 (de) | 1998-12-16 |
JP3248715B2 (ja) | 2002-01-21 |
EP0884852A3 (de) | 1999-03-17 |
JPH1117558A (ja) | 1999-01-22 |
US6029268A (en) | 2000-02-22 |
DE69733468T2 (de) | 2006-03-23 |
CA2226487A1 (en) | 1998-12-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |