DE69630678D1 - Spaltenmultiplexer - Google Patents

Spaltenmultiplexer

Info

Publication number
DE69630678D1
DE69630678D1 DE69630678T DE69630678T DE69630678D1 DE 69630678 D1 DE69630678 D1 DE 69630678D1 DE 69630678 T DE69630678 T DE 69630678T DE 69630678 T DE69630678 T DE 69630678T DE 69630678 D1 DE69630678 D1 DE 69630678D1
Authority
DE
Germany
Prior art keywords
column multiplexer
multiplexer
column
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69630678T
Other languages
English (en)
Other versions
DE69630678T2 (de
Inventor
Luigi Pascucci
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Publication of DE69630678D1 publication Critical patent/DE69630678D1/de
Application granted granted Critical
Publication of DE69630678T2 publication Critical patent/DE69630678T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
DE69630678T 1996-05-13 1996-05-13 Spaltenmultiplexer Expired - Fee Related DE69630678T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP96830275A EP0810606B1 (de) 1996-05-13 1996-05-13 Spaltenmultiplexer

Publications (2)

Publication Number Publication Date
DE69630678D1 true DE69630678D1 (de) 2003-12-18
DE69630678T2 DE69630678T2 (de) 2004-09-23

Family

ID=8225906

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69630678T Expired - Fee Related DE69630678T2 (de) 1996-05-13 1996-05-13 Spaltenmultiplexer

Country Status (3)

Country Link
US (1) US5777941A (de)
EP (1) EP0810606B1 (de)
DE (1) DE69630678T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6072223A (en) * 1998-09-02 2000-06-06 Micron Technology, Inc. Circuit and method for a memory cell using reverse base current effect
US6477083B1 (en) * 2000-10-11 2002-11-05 Advanced Micro Devices, Inc. Select transistor architecture for a virtual ground non-volatile memory cell array
EP1477990A4 (de) * 2002-02-20 2005-10-12 Renesas Tech Corp Integrierte halbleiterschaltung
JP2008118004A (ja) * 2006-11-07 2008-05-22 Nec Electronics Corp 半導体集積回路
DE102007048306B4 (de) * 2007-10-09 2010-09-16 Qimonda Ag Integrierter Schaltkreis mit Schalteinheit zur Speicherzellen-Kopplung und Verfahren zur Herstellung eines integrierten Schaltkreises zur Speicherzellen-Kopplung

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0104657B1 (de) * 1982-09-29 1989-06-21 Hitachi, Ltd. Integrierte Halbleiterschaltungsanordnung
US4570176A (en) * 1984-04-16 1986-02-11 At&T Bell Laboratories CMOS Cell array with transistor isolation
US4751680A (en) * 1986-03-03 1988-06-14 Motorola, Inc. Bit line equalization in a memory
US4745084A (en) * 1986-11-12 1988-05-17 Vlsi Technology, Inc. Method of making a customized semiconductor integrated device
US5051917A (en) * 1987-02-24 1991-09-24 International Business Machines Corporation Method of combining gate array and standard cell circuits on a common semiconductor chip
EP0321738B1 (de) * 1987-12-23 1994-09-07 Texas Instruments Incorporated MOS-Transistor mit erhöhtem Isolationsvermögen
US5369595A (en) * 1988-03-18 1994-11-29 International Business Machines Corporation Method of combining gate array and standard cell circuits on a common semiconductor chip

Also Published As

Publication number Publication date
EP0810606B1 (de) 2003-11-12
EP0810606A1 (de) 1997-12-03
US5777941A (en) 1998-07-07
DE69630678T2 (de) 2004-09-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee