DE69630018D1 - Logische schaltung für niedrige spannungen - Google Patents

Logische schaltung für niedrige spannungen

Info

Publication number
DE69630018D1
DE69630018D1 DE69630018T DE69630018T DE69630018D1 DE 69630018 D1 DE69630018 D1 DE 69630018D1 DE 69630018 T DE69630018 T DE 69630018T DE 69630018 T DE69630018 T DE 69630018T DE 69630018 D1 DE69630018 D1 DE 69630018D1
Authority
DE
Germany
Prior art keywords
logical circuit
low voltages
voltages
low
logical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69630018T
Other languages
English (en)
Other versions
DE69630018T2 (de
Inventor
C Martin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of DE69630018D1 publication Critical patent/DE69630018D1/de
Application granted granted Critical
Publication of DE69630018T2 publication Critical patent/DE69630018T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09448—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET in combination with bipolar transistors [BIMOS]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/04—Modifications for accelerating switching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/013—Modifications for accelerating switching in bipolar transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
DE69630018T 1995-11-30 1996-10-21 Logische schaltung für niedrige spannungen Expired - Fee Related DE69630018T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US565695 1990-08-13
US08/565,695 US5818259A (en) 1995-11-30 1995-11-30 Low voltage logic circuit
PCT/IB1996/001123 WO1997020389A1 (en) 1995-11-30 1996-10-21 Low voltage logic circuit

Publications (2)

Publication Number Publication Date
DE69630018D1 true DE69630018D1 (de) 2003-10-23
DE69630018T2 DE69630018T2 (de) 2004-07-08

Family

ID=24259723

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69630018T Expired - Fee Related DE69630018T2 (de) 1995-11-30 1996-10-21 Logische schaltung für niedrige spannungen

Country Status (6)

Country Link
US (1) US5818259A (de)
EP (1) EP0807333B1 (de)
JP (1) JPH10513627A (de)
KR (1) KR100445207B1 (de)
DE (1) DE69630018T2 (de)
WO (1) WO1997020389A1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3758285B2 (ja) * 1997-03-17 2006-03-22 ソニー株式会社 遅延回路およびそれを用いた発振回路
TW350168B (en) * 1997-05-30 1999-01-11 Nat Science Council Signal processor
US6100712A (en) * 1997-12-17 2000-08-08 Philips Electronics North America Corporation Output driver circuit with jump start for current sink on demand
US6294959B1 (en) 1999-11-12 2001-09-25 Macmillan Bruce E. Circuit that operates in a manner substantially complementary to an amplifying device included therein and apparatus incorporating same
US6249148B1 (en) * 2000-02-10 2001-06-19 Fairchild Semiconductor Corporation Low power variable base drive circuit
US6437594B1 (en) * 2000-03-17 2002-08-20 International Business Machines Corporation SOI pass gate leakage monitor

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0058958B1 (de) * 1981-02-25 1986-10-29 Kabushiki Kaisha Toshiba Komplementäre MOSFET-Logikschaltung
JPS5986923A (ja) * 1982-11-10 1984-05-19 Toshiba Corp 半導体装置
JPH0616585B2 (ja) * 1983-12-16 1994-03-02 株式会社日立製作所 バツフア回路
DE3688222T2 (de) * 1985-07-22 1993-11-04 Hitachi Ltd Halbleitereinrichtung mit bipolarem transistor und isolierschicht-feldeffekttransistor.
US4638186A (en) * 1985-12-02 1987-01-20 Motorola, Inc. BIMOS logic gate
US4649294A (en) * 1986-01-13 1987-03-10 Motorola, Inc. BIMOS logic gate
JP2550138B2 (ja) * 1988-03-18 1996-11-06 株式会社日立製作所 バイポーラトランジスタと電界効果トランジスタとを有する半導体集積回路装置
JPH03195120A (ja) * 1989-12-22 1991-08-26 Sharp Corp 半導体出力回路
JPH07105711B2 (ja) * 1990-04-26 1995-11-13 株式会社東芝 入力回路
US5111076A (en) * 1990-09-05 1992-05-05 Min Ming Tarng Digital superbuffer
JP2759577B2 (ja) * 1992-05-14 1998-05-28 三菱電機株式会社 バッファ回路
US5315187A (en) * 1992-08-05 1994-05-24 Acer Incorporated Self-controlled output stage with low power bouncing
US5341042A (en) * 1992-08-10 1994-08-23 International Business Machines Corporation Low voltage, cascoded NTL based BiCMOS circuit
US5450027A (en) * 1994-04-08 1995-09-12 At&T Corp. Low-power-dissipation CMOS circuits
US5514995A (en) * 1995-01-30 1996-05-07 Micrel, Inc. PCMCIA power interface

Also Published As

Publication number Publication date
KR100445207B1 (ko) 2004-11-20
KR19980701819A (ko) 1998-06-25
DE69630018T2 (de) 2004-07-08
JPH10513627A (ja) 1998-12-22
US5818259A (en) 1998-10-06
WO1997020389A1 (en) 1997-06-05
EP0807333B1 (de) 2003-09-17
EP0807333A1 (de) 1997-11-19

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Legal Events

Date Code Title Description
8320 Willingness to grant licences declared (paragraph 23)
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN

8327 Change in the person/name/address of the patent owner

Owner name: NXP B.V., EINDHOVEN, NL

8339 Ceased/non-payment of the annual fee