DE69622824D1 - Verfahren und Vorrichtung zum Auflösen einer Oberflächenschicht eines Halbleitersubstrats - Google Patents

Verfahren und Vorrichtung zum Auflösen einer Oberflächenschicht eines Halbleitersubstrats

Info

Publication number
DE69622824D1
DE69622824D1 DE69622824T DE69622824T DE69622824D1 DE 69622824 D1 DE69622824 D1 DE 69622824D1 DE 69622824 T DE69622824 T DE 69622824T DE 69622824 T DE69622824 T DE 69622824T DE 69622824 D1 DE69622824 D1 DE 69622824D1
Authority
DE
Germany
Prior art keywords
dissolving
semiconductor substrate
surface layer
semiconductor
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69622824T
Other languages
English (en)
Other versions
DE69622824T2 (de
Inventor
Minako Kaneko
Ayako Shimazaki
Itsuro Ishizaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69622824D1 publication Critical patent/DE69622824D1/de
Application granted granted Critical
Publication of DE69622824T2 publication Critical patent/DE69622824T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02052—Wet cleaning only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67075—Apparatus for fluid treatment for etching for wet etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Sampling And Sample Adjustment (AREA)
  • Drying Of Semiconductors (AREA)
  • Formation Of Insulating Films (AREA)
DE69622824T 1995-11-29 1996-11-29 Verfahren und Vorrichtung zum Auflösen einer Oberflächenschicht eines Halbleitersubstrats Expired - Fee Related DE69622824T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP31105095 1995-11-29
JP26416396A JP3415373B2 (ja) 1995-11-29 1996-10-04 半導体基板等の表層の溶解方法及び装置

Publications (2)

Publication Number Publication Date
DE69622824D1 true DE69622824D1 (de) 2002-09-12
DE69622824T2 DE69622824T2 (de) 2003-04-10

Family

ID=26546379

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69622824T Expired - Fee Related DE69622824T2 (de) 1995-11-29 1996-11-29 Verfahren und Vorrichtung zum Auflösen einer Oberflächenschicht eines Halbleitersubstrats

Country Status (5)

Country Link
US (1) US5890501A (de)
EP (2) EP1005071A1 (de)
JP (1) JP3415373B2 (de)
KR (1) KR100237939B1 (de)
DE (1) DE69622824T2 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2751953B2 (ja) * 1995-11-16 1998-05-18 日本電気株式会社 ホール内部の汚染分析方法
US6448084B1 (en) * 2000-01-20 2002-09-10 Lsi Logic Corporation Multiple metal etchant system for integrated circuits
JP4693268B2 (ja) * 2001-04-02 2011-06-01 オルガノ株式会社 試料水の水質評価方法
US20040040660A1 (en) * 2001-10-03 2004-03-04 Biberger Maximilian Albert High pressure processing chamber for multiple semiconductor substrates
US20050227187A1 (en) * 2002-03-04 2005-10-13 Supercritical Systems Inc. Ionic fluid in supercritical fluid for semiconductor processing
US7387868B2 (en) * 2002-03-04 2008-06-17 Tokyo Electron Limited Treatment of a dielectric layer using supercritical CO2
US20050022850A1 (en) * 2003-07-29 2005-02-03 Supercritical Systems, Inc. Regulation of flow of processing chemistry only into a processing chamber
US20060102282A1 (en) * 2004-11-15 2006-05-18 Supercritical Systems, Inc. Method and apparatus for selectively filtering residue from a processing chamber
US20060185693A1 (en) * 2005-02-23 2006-08-24 Richard Brown Cleaning step in supercritical processing
US20060185694A1 (en) * 2005-02-23 2006-08-24 Richard Brown Rinsing step in supercritical processing
US7550075B2 (en) * 2005-03-23 2009-06-23 Tokyo Electron Ltd. Removal of contaminants from a fluid
US20060226117A1 (en) * 2005-03-29 2006-10-12 Bertram Ronald T Phase change based heating element system and method
US20060225769A1 (en) * 2005-03-30 2006-10-12 Gentaro Goshi Isothermal control of a process chamber
US20060223899A1 (en) * 2005-03-30 2006-10-05 Hillman Joseph T Removal of porogens and porogen residues using supercritical CO2
US7442636B2 (en) * 2005-03-30 2008-10-28 Tokyo Electron Limited Method of inhibiting copper corrosion during supercritical CO2 cleaning
US20060219268A1 (en) * 2005-03-30 2006-10-05 Gunilla Jacobson Neutralization of systemic poisoning in wafer processing
US20070000519A1 (en) * 2005-06-30 2007-01-04 Gunilla Jacobson Removal of residues for low-k dielectric materials in wafer processing
JP2011095016A (ja) * 2009-10-28 2011-05-12 Ias Inc 半導体基板の分析方法
JP4897870B2 (ja) * 2009-12-18 2012-03-14 株式会社 イアス 基板分析用ノズル及び基板分析方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5821337A (ja) * 1981-07-30 1983-02-08 Toshiba Corp 半導体基板の後処理方法
JPS6066825A (ja) * 1983-09-22 1985-04-17 Toshiba Corp 半導体装置の製造方法
US4749440A (en) * 1985-08-28 1988-06-07 Fsi Corporation Gaseous process and apparatus for removing films from substrates
JPS62163331A (ja) * 1986-01-14 1987-07-20 Matsushita Electric Ind Co Ltd ウエツトエツチング方法
US5158100A (en) * 1989-05-06 1992-10-27 Dainippon Screen Mfg. Co., Ltd. Wafer cleaning method and apparatus therefor
WO1991006975A1 (en) * 1989-11-03 1991-05-16 Asm International N.V. Method for halide etching in the presence of water of semi-conductor substrates
DE4024576A1 (de) * 1990-08-02 1992-02-06 Bosch Gmbh Robert Vorrichtung zum einseitigen aetzen einer halbleiterscheibe
JP2787788B2 (ja) * 1990-09-26 1998-08-20 インターナショナル・ビジネス・マシーンズ・コーポレーション 残留物除去方法
FI97920C (fi) * 1991-02-27 1997-03-10 Okmetic Oy Tapa puhdistaa puolijohdevalmiste

Also Published As

Publication number Publication date
EP1005071A1 (de) 2000-05-31
JPH09213688A (ja) 1997-08-15
US5890501A (en) 1999-04-06
KR100237939B1 (ko) 2000-01-15
EP0777265A3 (de) 1998-12-23
DE69622824T2 (de) 2003-04-10
EP0777265B1 (de) 2002-08-07
EP0777265A2 (de) 1997-06-04
JP3415373B2 (ja) 2003-06-09
KR970030444A (ko) 1997-06-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee