DE69434129D1 - Prüfvorrichtung für eine integrierte schaltung - Google Patents

Prüfvorrichtung für eine integrierte schaltung

Info

Publication number
DE69434129D1
DE69434129D1 DE69434129T DE69434129T DE69434129D1 DE 69434129 D1 DE69434129 D1 DE 69434129D1 DE 69434129 T DE69434129 T DE 69434129T DE 69434129 T DE69434129 T DE 69434129T DE 69434129 D1 DE69434129 D1 DE 69434129D1
Authority
DE
Germany
Prior art keywords
integrated circuit
testing
pct
testing portion
inputs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69434129T
Other languages
English (en)
Inventor
Olli Piirainen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Oyj
Original Assignee
Nokia Oyj
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Oyj filed Critical Nokia Oyj
Application granted granted Critical
Publication of DE69434129D1 publication Critical patent/DE69434129D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318555—Control logic

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Video Image Reproduction Devices For Color Tv Systems (AREA)
  • Alarm Systems (AREA)
  • Particle Accelerators (AREA)
DE69434129T 1993-10-01 1994-09-30 Prüfvorrichtung für eine integrierte schaltung Expired - Lifetime DE69434129D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI934327A FI100136B (fi) 1993-10-01 1993-10-01 Menetelmä integroidun piirin testaamiseksi sekä integroitu piiri
PCT/FI1994/000439 WO1995010048A1 (en) 1993-10-01 1994-09-30 A method and device for testing of an integrated circuit

Publications (1)

Publication Number Publication Date
DE69434129D1 true DE69434129D1 (de) 2004-12-16

Family

ID=8538699

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69434129T Expired - Lifetime DE69434129D1 (de) 1993-10-01 1994-09-30 Prüfvorrichtung für eine integrierte schaltung

Country Status (10)

Country Link
US (1) US5786703A (de)
EP (1) EP0721591B1 (de)
JP (1) JPH09503302A (de)
CN (1) CN1052308C (de)
AT (1) ATE282210T1 (de)
AU (1) AU681698B2 (de)
DE (1) DE69434129D1 (de)
FI (1) FI100136B (de)
NO (1) NO961303L (de)
WO (1) WO1995010048A1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6522985B1 (en) * 1989-07-31 2003-02-18 Texas Instruments Incorporated Emulation devices, systems and methods utilizing state machines
US5977763A (en) * 1996-02-27 1999-11-02 Micron Technology, Inc. Circuit and method for measuring and forcing an internal voltage of an integrated circuit
US6229296B1 (en) 1996-02-27 2001-05-08 Micron Technology, Inc. Circuit and method for measuring and forcing an internal voltage of an integrated circuit
JPH11108998A (ja) * 1997-10-02 1999-04-23 Mitsubishi Electric Corp 集積回路のテスト装置
US5991910A (en) * 1997-10-29 1999-11-23 Microchip Technology Incorporated Microcontroller having special mode enable detection circuitry and a method of operation therefore
US6946863B1 (en) 1998-02-27 2005-09-20 Micron Technology, Inc. Circuit and method for measuring and forcing an internal voltage of an integrated circuit
ATE346309T1 (de) * 2002-12-20 2006-12-15 Koninkl Philips Electronics Nv Verbindung mehrerer testzugriffsportsteuerungsvorrichtungen durch ein einzeltestzugriffsport
US7274203B2 (en) * 2005-10-25 2007-09-25 Freescale Semiconductor, Inc. Design-for-test circuit for low pin count devices
CN101135718B (zh) * 2007-09-10 2010-06-02 中兴通讯股份有限公司 一种驱动器电路
US8839063B2 (en) * 2013-01-24 2014-09-16 Texas Instruments Incorporated Circuits and methods for dynamic allocation of scan test resources
US9500700B1 (en) * 2013-11-15 2016-11-22 Xilinx, Inc. Circuits for and methods of testing the operation of an input/output port
CN108957283B (zh) * 2017-05-19 2021-08-03 龙芯中科技术股份有限公司 辐照实验板、监控终端、asic芯片辐照实验***
US11567121B2 (en) 2020-03-31 2023-01-31 Texas Instruments Incorporated Integrated circuit with embedded testing circuitry

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4479088A (en) * 1981-01-16 1984-10-23 Burroughs Corporation Wafer including test lead connected to ground for testing networks thereon
DE3526485A1 (de) * 1985-07-24 1987-02-05 Heinz Krug Schaltungsanordnung zum pruefen integrierter schaltungseinheiten
US4817093A (en) * 1987-06-18 1989-03-28 International Business Machines Corporation Method of partitioning, testing and diagnosing a VLSI multichip package and associated structure
US5053700A (en) * 1989-02-14 1991-10-01 Amber Engineering, Inc. Method for wafer scale testing of redundant integrated circuit dies
JP2561164B2 (ja) * 1990-02-26 1996-12-04 三菱電機株式会社 半導体集積回路
DE69226401T2 (de) * 1991-05-23 1999-03-04 Motorola Gmbh, 65232 Taunusstein Ausführung der IEEE 1149.1-Schnittstellenarchitektur
JP2741119B2 (ja) * 1991-09-17 1998-04-15 三菱電機株式会社 バイパススキャンパスおよびそれを用いた集積回路装置
US5241266A (en) * 1992-04-10 1993-08-31 Micron Technology, Inc. Built-in test circuit connection for wafer level burnin and testing of individual dies

Also Published As

Publication number Publication date
CN1052308C (zh) 2000-05-10
NO961303D0 (no) 1996-03-29
AU681698B2 (en) 1997-09-04
FI934327A0 (fi) 1993-10-01
FI934327A (fi) 1995-04-02
US5786703A (en) 1998-07-28
EP0721591B1 (de) 2004-11-10
NO961303L (no) 1996-05-29
JPH09503302A (ja) 1997-03-31
FI100136B (fi) 1997-09-30
EP0721591A1 (de) 1996-07-17
AU7700894A (en) 1995-05-01
ATE282210T1 (de) 2004-11-15
CN1132554A (zh) 1996-10-02
WO1995010048A1 (en) 1995-04-13

Similar Documents

Publication Publication Date Title
DE69019402D1 (de) Prüfverfahren und -gerät für integrierte Schaltungen.
DE69434129D1 (de) Prüfvorrichtung für eine integrierte schaltung
JPS55110055A (en) Integrated circuit device
TW358997B (en) Method and apparatus for performing operative testing on an IC
RU95109886A (ru) Управляемое компьютером устройство для испытаний радиоаппаратуры множества типов и способ его функционирования
DE69304404D1 (de) Verfahren und Vorrichtung zur Programmierung von zellulären programmierbaren integrierten Schaltungen
ATE296463T1 (de) Vorrichtung zum parallelen prüfen von halbleiterschaltkreisen
GB2344430B (en) Programmable network architecture
WO1995019011A3 (en) Apparatus and method for testing integrated circuits
DE69734379D1 (de) Vorrichtung zur Prüfung von integrierten Schaltungen
DK0760987T3 (da) Fremgangsmåde til at verificere integriteten af data lagret i et bearbejdningsanlæg, der anvendes til bearbejdning af arkli
KR970010006B1 (en) Semiconductor integrated circuit and method of testing the same
EP0367710A3 (de) Diagnostika einer Leiterplatte mit einer Mehrzahl elektronischer Hybridbauelemente
GB2382663A (en) System and method for testing integrated circuit devices
DE69520108D1 (de) Testverfahren
DK208087D0 (da) Fremgangsmaade og kredsloebskort til udfoerelse af test under burn-in af integrerede halvlederkredsloeb
ES8609738A1 (es) Una instalacion para comprobar circuitos electronicos fun- cionales
DE69312263D1 (de) Testverfahren und -anordnung für integrierte Leistungsschaltungen
DE69021105D1 (de) Verfahren und Gerät zur Prüfung von integrierten Schaltungen mit hoher Geschwindigkeit.
DE69022925D1 (de) Halbleiteranordnung und Verfahren zum Test derselben.
DE69633713D1 (de) Verfahren und Vorrichtung zur Prüfung von integrierten Schaltungen
EP0851235A3 (de) Vorrichtung und Verfahren zur externen Einstellung einer internen Zeitgeberschaltung
DE69430036D1 (de) Testvorrichtung für integrierte Schaltungen
EP0592878A3 (de) Verfahren und Vorrichtung zur Prüfung von Nadelkarten für die Prüfung von integrierten Schaltkreisen.
DE602004000226D1 (de) Parallele Prüfung von Intergrierten Schaltungen

Legal Events

Date Code Title Description
8332 No legal effect for de