DE69426343D1 - Abfühlverstärker - Google Patents
AbfühlverstärkerInfo
- Publication number
- DE69426343D1 DE69426343D1 DE69426343T DE69426343T DE69426343D1 DE 69426343 D1 DE69426343 D1 DE 69426343D1 DE 69426343 T DE69426343 T DE 69426343T DE 69426343 T DE69426343 T DE 69426343T DE 69426343 D1 DE69426343 D1 DE 69426343D1
- Authority
- DE
- Germany
- Prior art keywords
- sensing amplifier
- amplifier
- sensing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
- G11C7/065—Differential amplifiers of latching type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Databases & Information Systems (AREA)
- Semiconductor Memories (AREA)
- Dram (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP22990493 | 1993-09-16 | ||
JP6216264A JP3004177B2 (ja) | 1993-09-16 | 1994-09-09 | 半導体集積回路装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69426343D1 true DE69426343D1 (de) | 2001-01-04 |
DE69426343T2 DE69426343T2 (de) | 2001-04-26 |
Family
ID=26521333
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69426343T Expired - Lifetime DE69426343T2 (de) | 1993-09-16 | 1994-09-15 | Abfühlverstärker |
Country Status (4)
Country | Link |
---|---|
US (3) | US5528542A (de) |
EP (1) | EP0644551B1 (de) |
JP (1) | JP3004177B2 (de) |
DE (1) | DE69426343T2 (de) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3004177B2 (ja) * | 1993-09-16 | 2000-01-31 | 株式会社東芝 | 半導体集積回路装置 |
JP3028913B2 (ja) * | 1994-11-10 | 2000-04-04 | 株式会社東芝 | 半導体記憶装置 |
KR100224769B1 (ko) * | 1995-12-29 | 1999-10-15 | 김영환 | 고속 버스트 리드/라이트 동작에 적합한 데이타 버스 라인 구조를 갖는 반도체 메모리 장치 |
JP3277192B2 (ja) * | 1996-12-27 | 2002-04-22 | 富士通株式会社 | 半導体装置 |
JPH10242419A (ja) * | 1997-02-27 | 1998-09-11 | Mitsubishi Electric Corp | 半導体装置の製造方法及び半導体装置 |
JP4005663B2 (ja) * | 1997-05-09 | 2007-11-07 | 株式会社東芝 | 半導体記憶装置 |
US5982673A (en) * | 1997-09-30 | 1999-11-09 | Siemens Aktiengesellschaft | Secondary sense amplifier with window discriminator for self-timed operation |
US6004861A (en) * | 1997-12-19 | 1999-12-21 | Advanced Micro Devices | Process for making a discontinuous source/drain formation for a high density integrated circuit |
DE19822750A1 (de) * | 1998-05-20 | 1999-11-25 | Siemens Ag | Halbleiterspeicher mit differentiellen Bitleitungen |
US6207498B1 (en) | 1998-06-05 | 2001-03-27 | United Integrated Circuits Corp. | Method of fabricating a coronary-type capacitor in an integrated circuit |
US6288419B1 (en) * | 1999-07-09 | 2001-09-11 | Micron Technology, Inc. | Low resistance gate flash memory |
KR100313151B1 (ko) * | 1999-12-30 | 2001-11-07 | 박종섭 | 컬럼 트랜지스터의 레이아웃방법 |
US6339541B1 (en) * | 2000-06-16 | 2002-01-15 | United Memories, Inc. | Architecture for high speed memory circuit having a relatively large number of internal data lines |
US7184290B1 (en) * | 2000-06-28 | 2007-02-27 | Marvell International Ltd. | Logic process DRAM |
JP3433741B2 (ja) * | 2000-09-05 | 2003-08-04 | セイコーエプソン株式会社 | 半導体装置 |
DE10150498C2 (de) * | 2001-10-12 | 2003-08-07 | Infineon Technologies Ag | Halbleiterspeichervorrichtung |
DE10155023B4 (de) * | 2001-11-05 | 2008-11-06 | Qimonda Ag | Leitungsanordnung für Bitleitungen zur Kontaktierung mindestens einer Speicherzelle und Verfahren zur Herstellung einer Leitungsanordnung für Bitleitungen |
JP2005322380A (ja) | 2004-04-09 | 2005-11-17 | Toshiba Corp | 半導体記憶装置 |
US7511333B2 (en) * | 2005-10-06 | 2009-03-31 | Promos Technologies Inc. | Nonvolatile memory cell with multiple floating gates and a connection region in the channel |
US8718541B2 (en) | 2007-12-31 | 2014-05-06 | Intel Corporation | Techniques for optimal location and configuration of infrastructure relay nodes in wireless networks |
JP4492736B2 (ja) | 2008-06-12 | 2010-06-30 | ソニー株式会社 | 半導体集積回路 |
JP5736224B2 (ja) | 2011-04-12 | 2015-06-17 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
JP6151504B2 (ja) * | 2012-10-17 | 2017-06-21 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
CN110192280A (zh) | 2017-01-12 | 2019-08-30 | 美光科技公司 | 存储器单元、双晶体管单电容器存储器单元阵列、形成双晶体管单电容器存储器单元阵列的方法及用于制造集成电路的方法 |
JP6378391B2 (ja) * | 2017-04-12 | 2018-08-22 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0642537B2 (ja) * | 1985-11-15 | 1994-06-01 | 株式会社東芝 | 半導体装置 |
US4949306A (en) * | 1987-06-19 | 1990-08-14 | Hitachi, Ltd. | Sense circuit and semiconductor memory having a current-voltage converter circuit |
EP0461313B1 (de) * | 1990-06-12 | 1996-09-18 | Fujitsu Limited | Dynamische Speichereinrichtung mit wahlfreiem Zugriff |
JPH04114395A (ja) * | 1990-09-05 | 1992-04-15 | Nec Corp | 半導体記憶回路 |
JP3049102B2 (ja) * | 1991-03-15 | 2000-06-05 | 富士通株式会社 | ダイナミックram |
JP3267699B2 (ja) * | 1991-11-05 | 2002-03-18 | 富士通株式会社 | 半導体記憶装置 |
JP2687829B2 (ja) * | 1992-12-21 | 1997-12-08 | 松下電器産業株式会社 | メモリ及びメモリ作成方式 |
JP3004177B2 (ja) * | 1993-09-16 | 2000-01-31 | 株式会社東芝 | 半導体集積回路装置 |
AT403708B (de) * | 1994-09-15 | 1998-05-25 | Plasser Bahnbaumasch Franz | Gleisbaumaschine |
-
1994
- 1994-09-09 JP JP6216264A patent/JP3004177B2/ja not_active Expired - Fee Related
- 1994-09-14 US US08/305,716 patent/US5528542A/en not_active Expired - Lifetime
- 1994-09-15 EP EP94114567A patent/EP0644551B1/de not_active Expired - Lifetime
- 1994-09-15 DE DE69426343T patent/DE69426343T2/de not_active Expired - Lifetime
-
1996
- 1996-03-05 US US08/611,372 patent/US5666319A/en not_active Expired - Lifetime
-
1997
- 1997-06-05 US US08/869,997 patent/US5929492A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US5929492A (en) | 1999-07-27 |
EP0644551A3 (de) | 1996-02-28 |
JP3004177B2 (ja) | 2000-01-31 |
US5666319A (en) | 1997-09-09 |
US5528542A (en) | 1996-06-18 |
JPH07135257A (ja) | 1995-05-23 |
EP0644551A2 (de) | 1995-03-22 |
EP0644551B1 (de) | 2000-11-29 |
DE69426343T2 (de) | 2001-04-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |