DE69329631D1 - Verfahren zur Rückstellung gekoppelter Module und ein dieses Verfahren verwendendes System - Google Patents

Verfahren zur Rückstellung gekoppelter Module und ein dieses Verfahren verwendendes System

Info

Publication number
DE69329631D1
DE69329631D1 DE69329631T DE69329631T DE69329631D1 DE 69329631 D1 DE69329631 D1 DE 69329631D1 DE 69329631 T DE69329631 T DE 69329631T DE 69329631 T DE69329631 T DE 69329631T DE 69329631 D1 DE69329631 D1 DE 69329631D1
Authority
DE
Germany
Prior art keywords
module
signal
permission
reset
modules
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69329631T
Other languages
English (en)
Other versions
DE69329631T2 (de
Inventor
Keith Balmer
Iain C Robertson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Ltd
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Ltd, Texas Instruments Inc filed Critical Texas Instruments Ltd
Publication of DE69329631D1 publication Critical patent/DE69329631D1/de
Application granted granted Critical
Publication of DE69329631T2 publication Critical patent/DE69329631T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0709—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a distributed system consisting of a plurality of standalone computer nodes, e.g. clusters, client-server systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793—Remedial or corrective actions

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)
  • Computer And Data Communications (AREA)
  • Multi Processors (AREA)
  • Debugging And Monitoring (AREA)
DE69329631T 1992-07-03 1993-07-02 Verfahren zur Rückstellung gekoppelter Module und ein dieses Verfahren verwendendes System Expired - Fee Related DE69329631T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB929214198A GB9214198D0 (en) 1992-07-03 1992-07-03 Method of resetting coupled modules and a system using the method

Publications (2)

Publication Number Publication Date
DE69329631D1 true DE69329631D1 (de) 2000-12-14
DE69329631T2 DE69329631T2 (de) 2001-05-10

Family

ID=10718179

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69329631T Expired - Fee Related DE69329631T2 (de) 1992-07-03 1993-07-02 Verfahren zur Rückstellung gekoppelter Module und ein dieses Verfahren verwendendes System

Country Status (5)

Country Link
US (1) US5398233A (de)
EP (1) EP0577431B1 (de)
JP (1) JP3345102B2 (de)
DE (1) DE69329631T2 (de)
GB (1) GB9214198D0 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6480967B1 (en) * 1999-05-21 2002-11-12 Koninklijke Philips Electronics N.V. Multiple module processing system with reset system independent of reset characteristics of the modules
US7614082B2 (en) 2005-06-29 2009-11-03 Research In Motion Limited System and method for privilege management and revocation
US8959402B2 (en) * 2012-10-04 2015-02-17 Qualcomm Incorporated Method for preemptively restarting software in a multi-subsystem mobile communication device to increase mean time between failures

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4654656A (en) * 1984-09-17 1987-03-31 International Business Machines Corp. Off-line notification and communication network
US4703481A (en) * 1985-08-16 1987-10-27 Hewlett-Packard Company Method and apparatus for fault recovery within a computing system
US4686526A (en) * 1985-09-12 1987-08-11 The United States Of America As Represented By The United States Department Of Energy Remote reset circuit
US5014193A (en) * 1988-10-14 1991-05-07 Compaq Computer Corporation Dynamically configurable portable computer system
US5251227A (en) * 1989-08-01 1993-10-05 Digital Equipment Corporation Targeted resets in a data processor including a trace memory to store transactions
DE69032865T2 (de) * 1989-08-01 1999-08-05 Digital Equipment Corp., Maynard, Mass. Gezielte Rücksetzungen in einem Datenprozessor
CA2027799A1 (en) * 1989-11-03 1991-05-04 David A. Miller Method and apparatus for independently resetting processors and cache controllers in multiple processor systems
US5271013A (en) * 1990-05-09 1993-12-14 Unisys Corporation Fault tolerant computer system
US5293613A (en) * 1991-08-29 1994-03-08 International Business Machines Corporation Recovery control register

Also Published As

Publication number Publication date
JP3345102B2 (ja) 2002-11-18
US5398233A (en) 1995-03-14
EP0577431A2 (de) 1994-01-05
JPH06224975A (ja) 1994-08-12
DE69329631T2 (de) 2001-05-10
GB9214198D0 (en) 1992-08-12
EP0577431B1 (de) 2000-11-08
EP0577431A3 (en) 1997-03-12

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: TEXAS INSTRUMENTS INC., DALLAS, TEX., US

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee