DE69324823D1 - Speicheranordnung - Google Patents

Speicheranordnung

Info

Publication number
DE69324823D1
DE69324823D1 DE69324823T DE69324823T DE69324823D1 DE 69324823 D1 DE69324823 D1 DE 69324823D1 DE 69324823 T DE69324823 T DE 69324823T DE 69324823 T DE69324823 T DE 69324823T DE 69324823 D1 DE69324823 D1 DE 69324823D1
Authority
DE
Germany
Prior art keywords
storage arrangement
arrangement
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69324823T
Other languages
English (en)
Other versions
DE69324823T2 (de
Inventor
Kazuo Nakazato
Haroon Ahmed
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Europe Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Europe Ltd filed Critical Hitachi Europe Ltd
Application granted granted Critical
Publication of DE69324823D1 publication Critical patent/DE69324823D1/de
Publication of DE69324823T2 publication Critical patent/DE69324823T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4091Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/44Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using super-conductive elements, e.g. cryotron
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C19/00Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/18Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages
    • G11C19/182Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7888Transistors programmable by two single electrons
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2216/00Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/02Structural aspects of erasable programmable read-only memories
    • G11C2216/08Nonvolatile memory wherein data storage is accomplished by storing relatively few electrons in the storage layer, i.e. single electron memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Nanotechnology (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
DE69324823T 1992-12-18 1993-12-17 Speicheranordnung Expired - Fee Related DE69324823T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB929226382A GB9226382D0 (en) 1992-12-18 1992-12-18 Memory device
PCT/GB1993/002581 WO1994015340A1 (en) 1992-12-18 1993-12-17 Memory device

Publications (2)

Publication Number Publication Date
DE69324823D1 true DE69324823D1 (de) 1999-06-10
DE69324823T2 DE69324823T2 (de) 1999-11-04

Family

ID=10726806

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69324823T Expired - Fee Related DE69324823T2 (de) 1992-12-18 1993-12-17 Speicheranordnung

Country Status (5)

Country Link
EP (1) EP0674798B1 (de)
JP (1) JP3512185B2 (de)
DE (1) DE69324823T2 (de)
GB (1) GB9226382D0 (de)
WO (1) WO1994015340A1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9415718D0 (en) 1994-08-03 1994-09-21 Hitachi Europ Ltd Conduction control device
US5604154A (en) * 1994-10-27 1997-02-18 Nippon Telegraph And Telephone Corporation Method of manufacturing coulamb blockade element using thermal oxidation
EP0843360A1 (de) * 1996-11-15 1998-05-20 Hitachi Europe Limited Speicheranordnung
US6753568B1 (en) 1996-11-15 2004-06-22 Hitachi, Ltd. Memory device
EP0843361A1 (de) * 1996-11-15 1998-05-20 Hitachi Europe Limited Speicheranordnung
US6060723A (en) * 1997-07-18 2000-05-09 Hitachi, Ltd. Controllable conduction device
EP0892440A1 (de) 1997-07-18 1999-01-20 Hitachi Europe Limited Bauelement mit kontrollierbarer Leitung
AT405109B (de) 1997-05-21 1999-05-25 Wasshuber Christoph Dipl Ing D Ein-elektron speicherbauelement
GB9724642D0 (en) 1997-11-21 1998-01-21 British Tech Group Single electron devices
KR100325689B1 (ko) * 1999-12-01 2002-02-25 오길록 전자-홀 결합을 이용한 단전자 메모리 소자
US7122413B2 (en) 2003-12-19 2006-10-17 Texas Instruments Incorporated Method to manufacture silicon quantum islands and single-electron devices
EP1830410A1 (de) * 2006-02-24 2007-09-05 Hitachi, Ltd. Ein-Electron Tunnelbauelement
EP2309562B1 (de) * 2009-10-12 2012-12-05 Hitachi Ltd. Ladungsträgervorrichtung

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3259759A (en) * 1960-07-05 1966-07-05 Gen Electric Laminated electronic devices in which a tunneling electron-permeable film separates opposed electrodes
US3643237A (en) * 1969-12-30 1972-02-15 Ibm Multiple-junction tunnel devices
US3882472A (en) * 1974-05-30 1975-05-06 Gen Instrument Corp Data flow control in memory having two device memory cells
US3986180A (en) * 1975-09-22 1976-10-12 International Business Machines Corporation Depletion mode field effect transistor memory system
US4103312A (en) * 1977-06-09 1978-07-25 International Business Machines Corporation Semiconductor memory devices
GB2256313B (en) * 1991-01-04 1995-03-29 Hitachi Europ Ltd Semiconductor device

Also Published As

Publication number Publication date
EP0674798A1 (de) 1995-10-04
WO1994015340A1 (en) 1994-07-07
EP0674798B1 (de) 1999-05-06
JPH08506214A (ja) 1996-07-02
GB9226382D0 (en) 1993-02-10
DE69324823T2 (de) 1999-11-04
JP3512185B2 (ja) 2004-03-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: HITACHI, LTD., TOKYO, JP

8339 Ceased/non-payment of the annual fee