DE69126470D1 - Verfahren zur Herstellung eines intelligenten Leistungshalbleiterbauelements - Google Patents

Verfahren zur Herstellung eines intelligenten Leistungshalbleiterbauelements

Info

Publication number
DE69126470D1
DE69126470D1 DE69126470T DE69126470T DE69126470D1 DE 69126470 D1 DE69126470 D1 DE 69126470D1 DE 69126470 T DE69126470 T DE 69126470T DE 69126470 T DE69126470 T DE 69126470T DE 69126470 D1 DE69126470 D1 DE 69126470D1
Authority
DE
Germany
Prior art keywords
producing
power semiconductor
semiconductor component
intelligent power
intelligent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69126470T
Other languages
English (en)
Other versions
DE69126470T2 (de
Inventor
Takeshi Ishiguro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Japan Ltd
Original Assignee
Nippon Motorola Ltd
Motorola Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Motorola Ltd, Motorola Japan Ltd filed Critical Nippon Motorola Ltd
Publication of DE69126470D1 publication Critical patent/DE69126470D1/de
Application granted granted Critical
Publication of DE69126470T2 publication Critical patent/DE69126470T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/761PN junctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823437MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H01L21/823456MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different shapes, lengths or dimensions

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE1991626470 1990-02-23 1991-02-22 Verfahren zur Herstellung eines intelligenten Leistungshalbleiterbauelements Expired - Fee Related DE69126470T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2042859A JP2572658B2 (ja) 1990-02-23 1990-02-23 インテリジェントパワー半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE69126470D1 true DE69126470D1 (de) 1997-07-17
DE69126470T2 DE69126470T2 (de) 1998-01-02

Family

ID=12647757

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1991626470 Expired - Fee Related DE69126470T2 (de) 1990-02-23 1991-02-22 Verfahren zur Herstellung eines intelligenten Leistungshalbleiterbauelements

Country Status (3)

Country Link
EP (1) EP0453070B1 (de)
JP (1) JP2572658B2 (de)
DE (1) DE69126470T2 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1156904C (zh) * 1996-03-06 2004-07-07 皇家菲利浦电子有限公司 制造pic(功率集成电路)器件的方法以及这种方法制造的pic器件
SE518797C2 (sv) * 2000-07-19 2002-11-19 Ericsson Telefon Ab L M Effekt-LDMOS-transistor innefattande ett flertal parallellkopplade transistorsegment med olika tröskelspänningar

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0652792B2 (ja) * 1985-02-26 1994-07-06 日産自動車株式会社 半導体装置
JPS61196576A (ja) * 1985-02-26 1986-08-30 Nissan Motor Co Ltd 半導体装置
JPS61196568A (ja) * 1985-02-26 1986-08-30 Nissan Motor Co Ltd 半導体装置
JPS62102556A (ja) * 1985-10-29 1987-05-13 Mitsubishi Electric Corp 半導体集積回路
JPS63198367A (ja) * 1987-02-13 1988-08-17 Toshiba Corp 半導体装置
DE3856174T2 (de) * 1987-10-27 1998-09-03 Nippon Electric Co Halbleiteranordnung mit einem isolierten vertikalen Leistungs-MOSFET.

Also Published As

Publication number Publication date
EP0453070B1 (de) 1997-06-11
EP0453070A3 (en) 1992-03-11
DE69126470T2 (de) 1998-01-02
JPH03245565A (ja) 1991-11-01
JP2572658B2 (ja) 1997-01-16
EP0453070A2 (de) 1991-10-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee