DE69011233D1 - Einbrennstruktur für TAB-montierte Chips. - Google Patents

Einbrennstruktur für TAB-montierte Chips.

Info

Publication number
DE69011233D1
DE69011233D1 DE69011233T DE69011233T DE69011233D1 DE 69011233 D1 DE69011233 D1 DE 69011233D1 DE 69011233 T DE69011233 T DE 69011233T DE 69011233 T DE69011233 T DE 69011233T DE 69011233 D1 DE69011233 D1 DE 69011233D1
Authority
DE
Germany
Prior art keywords
burn
tab
mounted chips
chips
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69011233T
Other languages
English (en)
Other versions
DE69011233T2 (de
Inventor
Harry Randall Bickford
William Leo Boland
Daniel Peter Morris
Timothy Clark Reiley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE69011233D1 publication Critical patent/DE69011233D1/de
Application granted granted Critical
Publication of DE69011233T2 publication Critical patent/DE69011233T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2863—Contacting devices, e.g. sockets, burn-in boards or mounting fixtures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Environmental & Geological Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Wire Bonding (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
DE69011233T 1989-07-18 1990-05-22 Einbrennstruktur für TAB-montierte Chips. Expired - Fee Related DE69011233T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/381,623 US4956605A (en) 1989-07-18 1989-07-18 Tab mounted chip burn-in apparatus

Publications (2)

Publication Number Publication Date
DE69011233D1 true DE69011233D1 (de) 1994-09-08
DE69011233T2 DE69011233T2 (de) 1995-03-09

Family

ID=23505745

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69011233T Expired - Fee Related DE69011233T2 (de) 1989-07-18 1990-05-22 Einbrennstruktur für TAB-montierte Chips.

Country Status (4)

Country Link
US (1) US4956605A (de)
EP (1) EP0408863B1 (de)
JP (1) JPH0691143B2 (de)
DE (1) DE69011233T2 (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5408190A (en) * 1991-06-04 1995-04-18 Micron Technology, Inc. Testing apparatus having substrate interconnect for discrete die burn-in for nonpackaged die
KR970004752B1 (ko) * 1989-03-07 1997-04-03 로-무 가부시기가이샤 전자장치의 제조방법 및 그 제조에 사용되는 소재기판 및 이 소재기판으로부터의 프린트기판의 절단장치
US5196785A (en) * 1990-12-12 1993-03-23 Hewlett-Packard Company Tape automated bonding test apparatus for thermal, mechanical and electrical coupling
US5086269A (en) * 1991-03-08 1992-02-04 Hewlett-Packard Company Burn-in process and apparatus
US5302891A (en) * 1991-06-04 1994-04-12 Micron Technology, Inc. Discrete die burn-in for non-packaged die
US6340894B1 (en) 1991-06-04 2002-01-22 Micron Technology, Inc. Semiconductor testing apparatus including substrate with contact members and conductive polymer interconnect
US5342807A (en) * 1991-06-04 1994-08-30 Micron Technology, Inc. Soft bond for semiconductor dies
US5336649A (en) * 1991-06-04 1994-08-09 Micron Technology, Inc. Removable adhesives for attachment of semiconductor dies
US5541524A (en) * 1991-08-23 1996-07-30 Nchip, Inc. Burn-in technologies for unpackaged integrated circuits
JPH06510122A (ja) * 1991-08-23 1994-11-10 エヌチップ　インコーポレイテッド パッケージされていない集積回路のバーン・イン技術
JP2688548B2 (ja) * 1991-09-10 1997-12-10 シャープ株式会社 液晶パネル駆動用半導体装置
JP2665424B2 (ja) * 1992-02-07 1997-10-22 タバイエスペック株式会社 パッケージ搬送装置及びパッケージテスト装置
JP2812627B2 (ja) * 1992-10-30 1998-10-22 三菱電機株式会社 テープキャリア、半導体装置試験方法及び装置
US5440231A (en) * 1993-04-19 1995-08-08 Motorola, Inc. Method and apparatus for coupling a semiconductor device with a tester
JP3038284B2 (ja) * 1993-09-17 2000-05-08 株式会社東芝 半導体素子用バーイン装置
US5455518A (en) * 1993-11-23 1995-10-03 Hughes Aircraft Company Test apparatus for integrated circuit die
US6064217A (en) * 1993-12-23 2000-05-16 Epi Technologies, Inc. Fine pitch contact device employing a compliant conductive polymer bump
JP3519534B2 (ja) * 1996-02-19 2004-04-19 株式会社東芝 ベアチッププローバ装置及びベアチップハンドリング方法
US6137305A (en) * 1998-10-26 2000-10-24 Lucent Technologies Inc. Method and apparatus for testing laser bars
JP3512655B2 (ja) * 1998-12-01 2004-03-31 シャープ株式会社 半導体装置およびその製造方法並びに該半導体装置の製造に使用される補強用テープ
US6373268B1 (en) * 1999-05-10 2002-04-16 Intel Corporation Test handling method and equipment for conjoined integrated circuit dice
JP3757852B2 (ja) * 2001-11-27 2006-03-22 横河電機株式会社 Ｔｃｐ用ハンドラ及びｔｃｐテープの走行方法
US7371970B2 (en) * 2002-12-06 2008-05-13 Flammer Jeffrey D Rigid-flex circuit board system
JP3751938B2 (ja) * 2002-12-09 2006-03-08 日東電工株式会社 Ｔａｂ用テープキャリアおよびその製造方法
JP4464237B2 (ja) * 2004-09-30 2010-05-19 Ｎｅｃエレクトロニクス株式会社 バーンイン試験方法，及び，それに用いるバーンイン用測定プログラム
JP2008170289A (ja) * 2007-01-12 2008-07-24 Yokogawa Electric Corp デバイス搬送装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3560849A (en) * 1967-08-15 1971-02-02 Aai Corp Liquid temperature controlled test chamber and transport apparatus for electrical circuit assemblies
US3761808A (en) * 1970-07-08 1973-09-25 Aai Corp Testing arrangement
US4587548A (en) * 1982-04-26 1986-05-06 Amp Incorporated Lead frame with fusible links
JPS60117635A (ja) * 1983-11-29 1985-06-25 Fujitsu Ltd 集積回路パッケ−ジ
US4716124A (en) * 1984-06-04 1987-12-29 General Electric Company Tape automated manufacture of power semiconductor devices
US4745354A (en) * 1985-05-20 1988-05-17 Fts Systems, Inc. Apparatus and methods for effecting a burn-in procedure on semiconductor devices
DE3686990T2 (de) * 1985-08-23 1993-04-22 Nippon Electric Co Verfahren zum herstellen einer halbleiteranordnung wobei ein filmtraegerband angewendet wird.
JPS62150728A (ja) * 1985-12-25 1987-07-04 Hitachi Ltd テ−プキヤリアおよびそれを用いた半導体装置
US4779047A (en) * 1986-06-23 1988-10-18 Vtc Incorporated Burn-in apparatus for integrated circuits mounted on a carrier tape
US4855672A (en) * 1987-05-18 1989-08-08 Shreeve Robert W Method and process for testing the reliability of integrated circuit (IC) chips and novel IC circuitry for accomplishing same

Also Published As

Publication number Publication date
JPH0396246A (ja) 1991-04-22
EP0408863B1 (de) 1994-08-03
JPH0691143B2 (ja) 1994-11-14
US4956605A (en) 1990-09-11
EP0408863A3 (en) 1991-06-12
DE69011233T2 (de) 1995-03-09
EP0408863A2 (de) 1991-01-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee