DE68919447D1 - Bei schwacher Betriebsspannung betreibbare logische Schaltung. - Google Patents

Bei schwacher Betriebsspannung betreibbare logische Schaltung.

Info

Publication number
DE68919447D1
DE68919447D1 DE68919447T DE68919447T DE68919447D1 DE 68919447 D1 DE68919447 D1 DE 68919447D1 DE 68919447 T DE68919447 T DE 68919447T DE 68919447 T DE68919447 T DE 68919447T DE 68919447 D1 DE68919447 D1 DE 68919447D1
Authority
DE
Germany
Prior art keywords
operated
low
logic circuit
operating voltage
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68919447T
Other languages
English (en)
Other versions
DE68919447T2 (de
Inventor
Atsusi C O Patent Divisi Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE68919447D1 publication Critical patent/DE68919447D1/de
Application granted granted Critical
Publication of DE68919447T2 publication Critical patent/DE68919447T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • H03K3/288—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit
    • H03K3/2885—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit the input circuit having a differential configuration
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • H03K3/289—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable of the master-slave type

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
DE68919447T 1988-07-11 1989-07-10 Bei schwacher Betriebsspannung betreibbare logische Schaltung. Expired - Fee Related DE68919447T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63172263A JPH0221717A (ja) 1988-07-11 1988-07-11 低電圧駆動形論理回路

Publications (2)

Publication Number Publication Date
DE68919447D1 true DE68919447D1 (de) 1995-01-05
DE68919447T2 DE68919447T2 (de) 1995-06-08

Family

ID=15938655

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68919447T Expired - Fee Related DE68919447T2 (de) 1988-07-11 1989-07-10 Bei schwacher Betriebsspannung betreibbare logische Schaltung.

Country Status (5)

Country Link
US (1) US4977335A (de)
EP (1) EP0351166B1 (de)
JP (1) JPH0221717A (de)
KR (1) KR920009204B1 (de)
DE (1) DE68919447T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0417334B1 (de) * 1989-09-11 1993-12-29 Siemens Aktiengesellschaft Kippschaltung mit Schalthysterese
US5070257A (en) * 1990-09-28 1991-12-03 Hughes Aircraft Company Circuitry for controlled rate of power application to CMOS microcircuits
US5289055A (en) * 1992-11-17 1994-02-22 At&T Bell Laboratories Digital ECL bipolar logic gates suitable for low-voltage operation
US5814845A (en) * 1995-01-10 1998-09-29 Carnegie Mellon University Four rail circuit architecture for ultra-low power and voltage CMOS circuit design
JP2888182B2 (ja) * 1995-10-09 1999-05-10 日本電気株式会社 フリップフロップ回路
JP3047808B2 (ja) * 1996-03-28 2000-06-05 日本電気株式会社 フリップフロップ回路
US6366061B1 (en) 1999-01-13 2002-04-02 Carnegie Mellon University Multiple power supply circuit architecture
US6166571A (en) * 1999-08-03 2000-12-26 Lucent Technologies Inc. High speed frequency divider circuit
US6433595B1 (en) * 2001-09-05 2002-08-13 Qantec Communication, Inc. Method of system circuit design and circuitry for high speed data communication
WO2004112247A1 (ja) 2003-06-16 2004-12-23 Nec Corporation 差動回路への漏洩電流が抑制された論理回路
DE102004009283B4 (de) * 2004-02-26 2006-04-20 Infineon Technologies Ag Flip-Flop-Schaltungsanordnung und Verfahren zur Verarbeitung eines Signals
DE602004026841D1 (de) * 2004-05-31 2010-06-10 St Microelectronics Srl Vorteilerstufe für Hochfrequenzanwendungen

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3728560A (en) * 1971-01-29 1973-04-17 Motorola Inc Bistable multivibrator circuit
US3728561A (en) * 1971-02-02 1973-04-17 Motorola Inc High speed master-slave flip-flop frequency divider
DE2821231C2 (de) * 1978-05-16 1980-01-24 Siemens Ag, 1000 Berlin Und 8000 Muenchen Master-Slave-Flipflop in Stromschalter-Technik
US4289979A (en) * 1978-08-28 1981-09-15 Burroughs Corporation Transistorized master slave flip-flop having threshold offsets generated by circuit size variations
US4276488A (en) * 1978-11-13 1981-06-30 Hughes Aircraft Company Multi-master single-slave ECL flip-flop
US4349753A (en) * 1980-09-29 1982-09-14 Bell Telephone Laboratories, Incorporated Emitter function logic flip-flop circuit
US4357547A (en) * 1981-02-23 1982-11-02 Motorola, Inc. EFL Toggle flip-flop
US4528465A (en) * 1982-11-15 1985-07-09 Advanced Micro Devices, Inc. Semiconductor circuit alternately operative as a data latch and a logic gate
US4578599A (en) * 1983-06-02 1986-03-25 Motorola, Inc. Flip-flop having improved synchronous reset
JPS61177811A (ja) * 1985-02-04 1986-08-09 Hitachi Micro Comput Eng Ltd フリツプフロツプ
JPH0666654B2 (ja) * 1986-09-29 1994-08-24 日本電気株式会社 フリツプフロツプ

Also Published As

Publication number Publication date
EP0351166B1 (de) 1994-11-23
KR900002563A (ko) 1990-02-28
JPH0477483B2 (de) 1992-12-08
EP0351166A2 (de) 1990-01-17
US4977335A (en) 1990-12-11
JPH0221717A (ja) 1990-01-24
EP0351166A3 (de) 1991-06-12
DE68919447T2 (de) 1995-06-08
KR920009204B1 (ko) 1992-10-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee