DE60226646D1 - TRANSMISSION LEVEL FOR A TWO-WIRE BUS - Google Patents

TRANSMISSION LEVEL FOR A TWO-WIRE BUS

Info

Publication number
DE60226646D1
DE60226646D1 DE60226646T DE60226646T DE60226646D1 DE 60226646 D1 DE60226646 D1 DE 60226646D1 DE 60226646 T DE60226646 T DE 60226646T DE 60226646 T DE60226646 T DE 60226646T DE 60226646 D1 DE60226646 D1 DE 60226646D1
Authority
DE
Germany
Prior art keywords
voltage
positive
negative
source
transmission level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60226646T
Other languages
German (de)
Inventor
Bernd Elend
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
NXP BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NXP BV filed Critical NXP BV
Application granted granted Critical
Publication of DE60226646D1 publication Critical patent/DE60226646D1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/028Arrangements specific to the transmitter end
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/0272Arrangements for coupling to multiple lines, e.g. for differential transmission
    • H04L25/0274Arrangements for ensuring balanced coupling

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Amplifiers (AREA)
  • Logic Circuits (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)

Abstract

Opposite and equal currents are forced on first (7) and second (8) bus lines. A first source (5) of voltage supplies voltage. A second source (6) of voltage/current controls the opposite and equal currents and generates data bits on the bus lines. Negative-positive-negative transistors (3,4) link to a minus pole on the emitter side. Triggered by the second source of voltage/current, positive-negative-positive transistors (1,2) generate two equal collector currents, one (I1) for the first bus line and a second (IT1) for an input for a current mirror circuit.
DE60226646T 2002-01-23 2002-12-18 TRANSMISSION LEVEL FOR A TWO-WIRE BUS Expired - Lifetime DE60226646D1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10202336A DE10202336A1 (en) 2002-01-23 2002-01-23 Transmitter end stage for a two-wire bus generates opposite and equal currents on bus lines as well as collector currents
PCT/IB2002/005744 WO2003063436A1 (en) 2002-01-23 2002-12-18 Transmitter output stage for a two-wire bus

Publications (1)

Publication Number Publication Date
DE60226646D1 true DE60226646D1 (en) 2008-06-26

Family

ID=7712780

Family Applications (2)

Application Number Title Priority Date Filing Date
DE10202336A Withdrawn DE10202336A1 (en) 2002-01-23 2002-01-23 Transmitter end stage for a two-wire bus generates opposite and equal currents on bus lines as well as collector currents
DE60226646T Expired - Lifetime DE60226646D1 (en) 2002-01-23 2002-12-18 TRANSMISSION LEVEL FOR A TWO-WIRE BUS

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE10202336A Withdrawn DE10202336A1 (en) 2002-01-23 2002-01-23 Transmitter end stage for a two-wire bus generates opposite and equal currents on bus lines as well as collector currents

Country Status (7)

Country Link
US (1) US20050104633A1 (en)
EP (1) EP1472840B1 (en)
JP (1) JP2005516479A (en)
CN (1) CN100454916C (en)
AT (1) ATE395771T1 (en)
DE (2) DE10202336A1 (en)
WO (1) WO2003063436A1 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7827418B2 (en) * 2005-01-25 2010-11-02 Linear Technology Corporation Controlling power distribution among multiple wires in communication cable
TWI514826B (en) * 2008-11-14 2015-12-21 Univ Nat Sun Yat Sen Receiving device for in-vehicle communication systems
TWI427973B (en) * 2010-04-13 2014-02-21 Univ Nat Changhua Education Flexray transmitter
DE102013219141A1 (en) * 2013-09-24 2015-03-26 Robert Bosch Gmbh Interlock circuit for securing an electrical vehicle electrical system
CN103837732B (en) * 2014-03-21 2017-07-18 上海富欣智能交通控制有限公司 Passive current detection circuit

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4614882A (en) * 1983-11-22 1986-09-30 Digital Equipment Corporation Bus transceiver including compensation circuit for variations in electrical characteristics of components
US4649301A (en) * 1985-01-07 1987-03-10 Thomson Components-Mostek Corp. Multiple-input sense amplifier with two CMOS differential stages driving a high-gain stage
KR960015678B1 (en) * 1990-10-23 1996-11-20 세이꼬 엡슨 가부시끼가이샤 Voltage-controlled oscillating circuit and phase-locke loop
US5331295A (en) * 1993-02-03 1994-07-19 National Semiconductor Corporation Voltage controlled oscillator with efficient process compensation
US5479137A (en) * 1993-12-14 1995-12-26 Samsung Electronics Co., Ltd. Controlled oscillator, as for synchyronous video detector
CN1206518A (en) * 1995-11-10 1999-01-27 艾利森电话股份有限公司 Universal receiver device
US5854574A (en) * 1996-04-26 1998-12-29 Analog Devices, Inc. Reference buffer with multiple gain stages for large, controlled effective transconductance
JP3022410B2 (en) * 1997-06-17 2000-03-21 日本電気株式会社 Interface circuit and its determination level setting method
EP0996999A2 (en) * 1998-05-06 2000-05-03 Koninklijke Philips Electronics N.V. Can bus driver with symmetrical differential output signals

Also Published As

Publication number Publication date
WO2003063436A1 (en) 2003-07-31
CN1615620A (en) 2005-05-11
EP1472840A1 (en) 2004-11-03
JP2005516479A (en) 2005-06-02
CN100454916C (en) 2009-01-21
US20050104633A1 (en) 2005-05-19
DE10202336A1 (en) 2003-07-24
EP1472840B1 (en) 2008-05-14
ATE395771T1 (en) 2008-05-15

Similar Documents

Publication Publication Date Title
TW200725635A (en) On-die termination circuit and method for semiconductor memory apparatus
SG156523A1 (en) Signal line driver circuit, light emitting device and driving method thereof
US20060097753A1 (en) Transmitter circuit, receiver circuit, interface circuit, and electronic instrument
TW200632817A (en) Display device and driving method thereof
JP3949636B2 (en) LVDS driver circuit
WO2018020783A1 (en) Ringing suppression circuit
TW200507567A (en) Simultaneous bidirectional input/output circuit and method
TW200627340A (en) Display apparatus
DE60226646D1 (en) TRANSMISSION LEVEL FOR A TWO-WIRE BUS
KR970063275A (en) Semiconductor Integrated Circuits and Circuit Devices Using the Same
KR101030957B1 (en) Interface system using differential current driving
JP2009200651A5 (en)
WO2003102750A3 (en) Clock power reduction technique using multilevel voltage input clock driver
US20060139829A1 (en) Supply voltage switching circuit
JP6464638B2 (en) Transmission circuit and semiconductor integrated circuit
TW200710804A (en) Electro-optical device, driving circuit thereof, and electronic apparatus
DE102005014627A1 (en) Flash memory for e.g. cell phone, has page buffers with respective switch transistors that are connected to sense lines, which are arranged in step wise manner so as not to overlap in orthogonal direction to bit lines
US6618786B1 (en) Current-mode bus line driver having increased output impedance
TW200615730A (en) Circuit device with different input/output common mode voltages
ATE413731T1 (en) MODIFIED REPETATIVE CELL COMPARISON TECHNIQUE FOR INTEGRATED CIRCUITS
US7362142B2 (en) Current source apparatus, light-emitting-device apparatus and digital-analog converting apparatus
CN107528756B (en) Display device, signal transmitter and data transmission method
KR100863127B1 (en) Differential current driving type data transmission system
ATE230862T1 (en) INTERFACE FOR COUPLING A BUS PARTICIPANT TO THE BUS LINE OF A BUS SYSTEM
CN101123431B (en) Current mode logic-cmos converter

Legal Events

Date Code Title Description
8328 Change in the person/name/address of the agent

Representative=s name: RICHTER, WERDERMANN, GERBAULET & HOFMANN, 20354 HA

8364 No opposition during term of opposition