DE60226646D1 - TRANSMISSION LEVEL FOR A TWO-WIRE BUS - Google Patents
TRANSMISSION LEVEL FOR A TWO-WIRE BUSInfo
- Publication number
- DE60226646D1 DE60226646D1 DE60226646T DE60226646T DE60226646D1 DE 60226646 D1 DE60226646 D1 DE 60226646D1 DE 60226646 T DE60226646 T DE 60226646T DE 60226646 T DE60226646 T DE 60226646T DE 60226646 D1 DE60226646 D1 DE 60226646D1
- Authority
- DE
- Germany
- Prior art keywords
- voltage
- positive
- negative
- source
- transmission level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/028—Arrangements specific to the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
- H04L25/0274—Arrangements for ensuring balanced coupling
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Dc Digital Transmission (AREA)
- Amplifiers (AREA)
- Logic Circuits (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Arrangements For Transmission Of Measured Signals (AREA)
Abstract
Opposite and equal currents are forced on first (7) and second (8) bus lines. A first source (5) of voltage supplies voltage. A second source (6) of voltage/current controls the opposite and equal currents and generates data bits on the bus lines. Negative-positive-negative transistors (3,4) link to a minus pole on the emitter side. Triggered by the second source of voltage/current, positive-negative-positive transistors (1,2) generate two equal collector currents, one (I1) for the first bus line and a second (IT1) for an input for a current mirror circuit.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10202336A DE10202336A1 (en) | 2002-01-23 | 2002-01-23 | Transmitter end stage for a two-wire bus generates opposite and equal currents on bus lines as well as collector currents |
PCT/IB2002/005744 WO2003063436A1 (en) | 2002-01-23 | 2002-12-18 | Transmitter output stage for a two-wire bus |
Publications (1)
Publication Number | Publication Date |
---|---|
DE60226646D1 true DE60226646D1 (en) | 2008-06-26 |
Family
ID=7712780
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE10202336A Withdrawn DE10202336A1 (en) | 2002-01-23 | 2002-01-23 | Transmitter end stage for a two-wire bus generates opposite and equal currents on bus lines as well as collector currents |
DE60226646T Expired - Lifetime DE60226646D1 (en) | 2002-01-23 | 2002-12-18 | TRANSMISSION LEVEL FOR A TWO-WIRE BUS |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE10202336A Withdrawn DE10202336A1 (en) | 2002-01-23 | 2002-01-23 | Transmitter end stage for a two-wire bus generates opposite and equal currents on bus lines as well as collector currents |
Country Status (7)
Country | Link |
---|---|
US (1) | US20050104633A1 (en) |
EP (1) | EP1472840B1 (en) |
JP (1) | JP2005516479A (en) |
CN (1) | CN100454916C (en) |
AT (1) | ATE395771T1 (en) |
DE (2) | DE10202336A1 (en) |
WO (1) | WO2003063436A1 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7827418B2 (en) * | 2005-01-25 | 2010-11-02 | Linear Technology Corporation | Controlling power distribution among multiple wires in communication cable |
TWI514826B (en) * | 2008-11-14 | 2015-12-21 | Univ Nat Sun Yat Sen | Receiving device for in-vehicle communication systems |
TWI427973B (en) * | 2010-04-13 | 2014-02-21 | Univ Nat Changhua Education | Flexray transmitter |
DE102013219141A1 (en) * | 2013-09-24 | 2015-03-26 | Robert Bosch Gmbh | Interlock circuit for securing an electrical vehicle electrical system |
CN103837732B (en) * | 2014-03-21 | 2017-07-18 | 上海富欣智能交通控制有限公司 | Passive current detection circuit |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4614882A (en) * | 1983-11-22 | 1986-09-30 | Digital Equipment Corporation | Bus transceiver including compensation circuit for variations in electrical characteristics of components |
US4649301A (en) * | 1985-01-07 | 1987-03-10 | Thomson Components-Mostek Corp. | Multiple-input sense amplifier with two CMOS differential stages driving a high-gain stage |
KR960015678B1 (en) * | 1990-10-23 | 1996-11-20 | 세이꼬 엡슨 가부시끼가이샤 | Voltage-controlled oscillating circuit and phase-locke loop |
US5331295A (en) * | 1993-02-03 | 1994-07-19 | National Semiconductor Corporation | Voltage controlled oscillator with efficient process compensation |
US5479137A (en) * | 1993-12-14 | 1995-12-26 | Samsung Electronics Co., Ltd. | Controlled oscillator, as for synchyronous video detector |
CN1206518A (en) * | 1995-11-10 | 1999-01-27 | 艾利森电话股份有限公司 | Universal receiver device |
US5854574A (en) * | 1996-04-26 | 1998-12-29 | Analog Devices, Inc. | Reference buffer with multiple gain stages for large, controlled effective transconductance |
JP3022410B2 (en) * | 1997-06-17 | 2000-03-21 | 日本電気株式会社 | Interface circuit and its determination level setting method |
EP0996999A2 (en) * | 1998-05-06 | 2000-05-03 | Koninklijke Philips Electronics N.V. | Can bus driver with symmetrical differential output signals |
-
2002
- 2002-01-23 DE DE10202336A patent/DE10202336A1/en not_active Withdrawn
- 2002-12-18 AT AT02806570T patent/ATE395771T1/en not_active IP Right Cessation
- 2002-12-18 EP EP02806570A patent/EP1472840B1/en not_active Expired - Lifetime
- 2002-12-18 JP JP2003563170A patent/JP2005516479A/en active Pending
- 2002-12-18 CN CNB028273923A patent/CN100454916C/en not_active Expired - Fee Related
- 2002-12-18 WO PCT/IB2002/005744 patent/WO2003063436A1/en active IP Right Grant
- 2002-12-18 DE DE60226646T patent/DE60226646D1/en not_active Expired - Lifetime
- 2002-12-18 US US10/502,360 patent/US20050104633A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
WO2003063436A1 (en) | 2003-07-31 |
CN1615620A (en) | 2005-05-11 |
EP1472840A1 (en) | 2004-11-03 |
JP2005516479A (en) | 2005-06-02 |
CN100454916C (en) | 2009-01-21 |
US20050104633A1 (en) | 2005-05-19 |
DE10202336A1 (en) | 2003-07-24 |
EP1472840B1 (en) | 2008-05-14 |
ATE395771T1 (en) | 2008-05-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8328 | Change in the person/name/address of the agent |
Representative=s name: RICHTER, WERDERMANN, GERBAULET & HOFMANN, 20354 HA |
|
8364 | No opposition during term of opposition |