DE60042518D1 - Verfahren zur speicherprüfung - Google Patents

Verfahren zur speicherprüfung

Info

Publication number: DE60042518D1
Authority: DE; Germany
Prior art keywords: memory testing; testing; memory
Prior art date: 1999-09-15
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Lifetime

Application number

DE60042518T

Other languages

English (en)

Inventor

Erik J Marinissen

Guillaume E Lousberg

Paul Wielage

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

NXP BV

Original Assignee

NXP BV

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1999-09-15

Filing date

2000-09-08

Publication date

2009-08-20

2000-09-08 Application filed by NXP BV filed Critical NXP BV

2009-08-20 Application granted granted Critical

2009-08-20 Publication of DE60042518D1 publication Critical patent/DE60042518D1/de

2020-09-09 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Links

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/44—Indication or identification of errors, e.g. for repair

DE60042518T 1999-09-15 2000-09-08 Verfahren zur speicherprüfung Expired - Lifetime DE60042518D1 (de)

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
EP99203002		1999-09-15
PCT/EP2000/008848 WO2001020614A1 (en)	1999-09-15	2000-09-08	Method of testing a memory

Publications (1)

Publication Number	Publication Date
DE60042518D1 true DE60042518D1 (de)	2009-08-20

Family

ID=8240640

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE60042518T Expired - Lifetime DE60042518D1 (de)	1999-09-15	2000-09-08	Verfahren zur speicherprüfung

Country Status (7)

Country	Link
US (1)	US6829736B1 (de)
EP (1)	EP1129454B1 (de)
JP (1)	JP2003509804A (de)
KR (1)	KR100750416B1 (de)
CN (1)	CN1206659C (de)
DE (1)	DE60042518D1 (de)
WO (1)	WO2001020614A1 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US20020196687A1 (en) *	2001-06-08	2002-12-26	Sauvageau Anthony J.	Methods and apparatus for analyzing and repairing memory
FR2843208B1 (fr) *	2002-07-31	2005-03-04	Iroc Technologies	Dispositif de reconfiguration d'un ensemble memoire presentant des defauts
KR100557948B1 (ko) *	2003-06-20	2006-03-10	주식회사 하이닉스반도체	메모리 장치의 테스트 방법
US6922649B2 (en) *	2003-11-25	2005-07-26	International Business Machines Corporation	Multiple on-chip test runs and repairs for memories
US7401270B2 (en) *	2005-10-20	2008-07-15	Infineon Technologies Ag	Repair of semiconductor memory device via external command
WO2007055068A1 (ja) *	2005-11-14	2007-05-18	Mitsubishi Electric Corporation	メモリ診断装置
US20070140897A1 (en) *	2005-12-21	2007-06-21	Hongna Wang	Ph stable biguanide composition and method of treatment and prevention of infections
CN101405818B (zh) *	2006-03-28	2012-10-03	富士通半导体股份有限公司	半导体存储器以及测试***
US10789398B2 (en) *	2016-08-31	2020-09-29	Synopsys, Inc.	Method and apparatus for SOC with optimal RSMA
CN115954024B (zh) *	2023-03-14	2023-06-02	长鑫存储技术有限公司	一种解码器及其解码方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4460997A (en) *	1981-07-15	1984-07-17	Pacific Western Systems Inc.	Memory tester having memory repair analysis capability
US4460999A (en) *	1981-07-15	1984-07-17	Pacific Western Systems, Inc.	Memory tester having memory repair analysis under pattern generator control
EP0424612A3 (en) *	1989-08-30	1992-03-11	International Business Machines Corporation	Apparatus and method for real time data error capture and compression for redundancy analysis of a memory
JP2777276B2 (ja)	1990-09-20	1998-07-16	株式会社東芝	冗長回路付メモリｉｃの試験装置
US5568437A (en) *	1995-06-20	1996-10-22	Vlsi Technology, Inc.	Built-in self test for integrated circuits having read/write memory
US6032264A (en) *	1997-04-22	2000-02-29	Micron Technology, Inc.	Apparatus and method implementing repairs on a memory device

2000
- 2000-09-08 WO PCT/EP2000/008848 patent/WO2001020614A1/en active Application Filing
- 2000-09-08 EP EP00960642A patent/EP1129454B1/de not_active Expired - Lifetime
- 2000-09-08 US US09/831,657 patent/US6829736B1/en not_active Expired - Fee Related
- 2000-09-08 CN CNB008019533A patent/CN1206659C/zh not_active Expired - Fee Related
- 2000-09-08 KR KR1020017006072A patent/KR100750416B1/ko not_active IP Right Cessation
- 2000-09-08 JP JP2001524107A patent/JP2003509804A/ja not_active Withdrawn
- 2000-09-08 DE DE60042518T patent/DE60042518D1/de not_active Expired - Lifetime

Also Published As

Publication number	Publication date
EP1129454A1 (de)	2001-09-05
KR20010075709A (ko)	2001-08-09
CN1206659C (zh)	2005-06-15
CN1321320A (zh)	2001-11-07
WO2001020614A1 (en)	2001-03-22
KR100750416B1 (ko)	2007-08-21
EP1129454B1 (de)	2009-07-08
US6829736B1 (en)	2004-12-07
JP2003509804A (ja)	2003-03-11

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Legal Events

Date	Code	Title	Description
2010-07-29	8364	No opposition during term of opposition