DE60036410D1 - Methoden zur herstellung einer feldeffekttransistor-struktur mit teilweise isolierten source/drain-übergängen - Google Patents
Methoden zur herstellung einer feldeffekttransistor-struktur mit teilweise isolierten source/drain-übergängenInfo
- Publication number
- DE60036410D1 DE60036410D1 DE60036410T DE60036410T DE60036410D1 DE 60036410 D1 DE60036410 D1 DE 60036410D1 DE 60036410 T DE60036410 T DE 60036410T DE 60036410 T DE60036410 T DE 60036410T DE 60036410 D1 DE60036410 D1 DE 60036410D1
- Authority
- DE
- Germany
- Prior art keywords
- partially isolated
- generating
- methods
- field effect
- effect transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 title abstract 2
- 230000005669 field effect Effects 0.000 title 1
- 239000000463 material Substances 0.000 abstract 2
- 238000004377 microelectronic Methods 0.000 abstract 2
- 239000004065 semiconductor Substances 0.000 abstract 2
- 239000003989 dielectric material Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
- H01L29/66628—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation recessing the gate by forming single crystalline semiconductor material at the source or drain location
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
- H01L29/0653—Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66636—Lateral single gate silicon transistors with source or drain recessed by etching or first recessed by etching and then refilled
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Junction Field-Effect Transistors (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/474,836 US6541343B1 (en) | 1999-12-30 | 1999-12-30 | Methods of making field effect transistor structure with partially isolated source/drain junctions |
US474836 | 1999-12-30 | ||
PCT/US2000/042279 WO2001050535A2 (en) | 1999-12-30 | 2000-11-27 | Field effect transistor structure with partially isolated source/drain junctions and methods of making same |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60036410D1 true DE60036410D1 (de) | 2007-10-25 |
DE60036410T2 DE60036410T2 (de) | 2008-05-29 |
Family
ID=23885131
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60036410T Expired - Lifetime DE60036410T2 (de) | 1999-12-30 | 2000-11-27 | Methoden zur herstellung einer feldeffekttransistor-struktur mit teilweise isolierten source/drain-übergängen |
Country Status (7)
Country | Link |
---|---|
US (2) | US6541343B1 (de) |
EP (1) | EP1245049B1 (de) |
CN (1) | CN1201403C (de) |
AT (1) | ATE373320T1 (de) |
AU (1) | AU4305701A (de) |
DE (1) | DE60036410T2 (de) |
WO (1) | WO2001050535A2 (de) |
Families Citing this family (63)
Publication number | Priority date | Publication date | Assignee | Title |
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US8994104B2 (en) | 1999-09-28 | 2015-03-31 | Intel Corporation | Contact resistance reduction employing germanium overlayer pre-contact metalization |
US6864547B2 (en) * | 2001-06-15 | 2005-03-08 | Agere Systems Inc. | Semiconductor device having a ghost source/drain region and a method of manufacture therefor |
US20030020111A1 (en) * | 2001-07-16 | 2003-01-30 | Bevan Malcolm J. | Economic and low thermal budget spacer nitride process |
US6716687B2 (en) * | 2002-02-11 | 2004-04-06 | Micron Technology, Inc. | FET having epitaxial silicon growth |
US6995430B2 (en) * | 2002-06-07 | 2006-02-07 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
DE10246718A1 (de) | 2002-10-07 | 2004-04-22 | Infineon Technologies Ag | Feldeffekttransistor mit lokaler Source-/Drainisolation sowie zugehöriges Herstellungsverfahren |
KR100473733B1 (ko) * | 2002-10-14 | 2005-03-10 | 매그나칩 반도체 유한회사 | 반도체 소자 및 그의 제조방법 |
KR100498475B1 (ko) * | 2003-01-07 | 2005-07-01 | 삼성전자주식회사 | 모스 전계 효과 트랜지스터 구조 및 그 제조 방법 |
US20050012087A1 (en) * | 2003-07-15 | 2005-01-20 | Yi-Ming Sheu | Self-aligned MOSFET having an oxide region below the channel |
US6936881B2 (en) * | 2003-07-25 | 2005-08-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Capacitor that includes high permittivity capacitor dielectric |
US7078742B2 (en) * | 2003-07-25 | 2006-07-18 | Taiwan Semiconductor Manufacturing Co., Ltd. | Strained-channel semiconductor structure and method of fabricating the same |
US7112495B2 (en) * | 2003-08-15 | 2006-09-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit |
US7071052B2 (en) * | 2003-08-18 | 2006-07-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Resistor with reduced leakage |
US7888201B2 (en) | 2003-11-04 | 2011-02-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors |
US6989322B2 (en) * | 2003-11-25 | 2006-01-24 | International Business Machines Corporation | Method of forming ultra-thin silicidation-stop extensions in mosfet devices |
US20050130434A1 (en) * | 2003-12-15 | 2005-06-16 | United Microelectronics Corp. | Method of surface pretreatment before selective epitaxial growth |
US6881635B1 (en) * | 2004-03-23 | 2005-04-19 | International Business Machines Corporation | Strained silicon NMOS devices with embedded source/drain |
US7361973B2 (en) * | 2004-05-21 | 2008-04-22 | International Business Machines Corporation | Embedded stressed nitride liners for CMOS performance improvement |
US7344951B2 (en) * | 2004-09-13 | 2008-03-18 | Texas Instruments Incorporated | Surface preparation method for selective and non-selective epitaxial growth |
US7129184B2 (en) * | 2004-12-01 | 2006-10-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of depositing an epitaxial layer of SiGe subsequent to a plasma etch |
JP2006165480A (ja) * | 2004-12-10 | 2006-06-22 | Toshiba Corp | 半導体装置 |
US7026232B1 (en) * | 2004-12-23 | 2006-04-11 | Texas Instruments Incorporated | Systems and methods for low leakage strained-channel transistor |
US7335959B2 (en) * | 2005-01-06 | 2008-02-26 | Intel Corporation | Device with stepped source/drain region profile |
JP5055771B2 (ja) * | 2005-02-28 | 2012-10-24 | 富士通セミコンダクター株式会社 | 半導体装置およびその製造方法 |
US7429775B1 (en) | 2005-03-31 | 2008-09-30 | Xilinx, Inc. | Method of fabricating strain-silicon CMOS |
US7605042B2 (en) * | 2005-04-18 | 2009-10-20 | Toshiba America Electronic Components, Inc. | SOI bottom pre-doping merged e-SiGe for poly height reduction |
GB0508407D0 (en) * | 2005-04-26 | 2005-06-01 | Ami Semiconductor Belgium Bvba | Alignment of trench for MOS |
US8018003B2 (en) * | 2005-05-27 | 2011-09-13 | Synopsys, Inc. | Leakage power reduction in CMOS circuits |
US7423283B1 (en) | 2005-06-07 | 2008-09-09 | Xilinx, Inc. | Strain-silicon CMOS using etch-stop layer and method of manufacture |
JP4984665B2 (ja) * | 2005-06-22 | 2012-07-25 | 富士通セミコンダクター株式会社 | 半導体装置およびその製造方法 |
US7579617B2 (en) * | 2005-06-22 | 2009-08-25 | Fujitsu Microelectronics Limited | Semiconductor device and production method thereof |
US7544576B2 (en) * | 2005-07-29 | 2009-06-09 | Freescale Semiconductor, Inc. | Diffusion barrier for nickel silicides in a semiconductor fabrication process |
US7902008B2 (en) * | 2005-08-03 | 2011-03-08 | Globalfoundries Inc. | Methods for fabricating a stressed MOS device |
DE102005041225B3 (de) * | 2005-08-31 | 2007-04-26 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Herstellung vertiefter verformter Drain/Source-Gebiete in NMOS- und PMOS-Transistoren |
US7655991B1 (en) | 2005-09-08 | 2010-02-02 | Xilinx, Inc. | CMOS device with stressed sidewall spacers |
US7936006B1 (en) | 2005-10-06 | 2011-05-03 | Xilinx, Inc. | Semiconductor device with backfilled isolation |
JP5086558B2 (ja) * | 2006-04-04 | 2012-11-28 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
US7560326B2 (en) | 2006-05-05 | 2009-07-14 | International Business Machines Corporation | Silicon/silcion germaninum/silicon body device with embedded carbon dopant |
US7541239B2 (en) * | 2006-06-30 | 2009-06-02 | Intel Corporation | Selective spacer formation on transistors of different classes on the same device |
US7754571B2 (en) * | 2006-11-03 | 2010-07-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for forming a strained channel in a semiconductor device |
US8558278B2 (en) * | 2007-01-16 | 2013-10-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained transistor with optimized drive current and method of forming |
US7528045B2 (en) * | 2007-01-31 | 2009-05-05 | United Microelectronics Corp. | MOS transistor and manufacturing methods thereof |
KR100855977B1 (ko) * | 2007-02-12 | 2008-09-02 | 삼성전자주식회사 | 반도체 소자 및 그 제조방법 |
US7732877B2 (en) * | 2007-04-02 | 2010-06-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Gated diode with non-planar source region |
US7923373B2 (en) | 2007-06-04 | 2011-04-12 | Micron Technology, Inc. | Pitch multiplication using self-assembling materials |
US7825003B2 (en) * | 2007-06-26 | 2010-11-02 | International Business Machines Corporation | Method of doping field-effect-transistors (FETs) with reduced stress/strain relaxation and resulting FET devices |
US7943961B2 (en) * | 2008-03-13 | 2011-05-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strain bars in stressed layers of MOS devices |
US7800166B2 (en) * | 2008-05-30 | 2010-09-21 | Intel Corporation | Recessed channel array transistor (RCAT) structures and method of formation |
US7808051B2 (en) * | 2008-09-29 | 2010-10-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Standard cell without OD space effect in Y-direction |
KR101107204B1 (ko) * | 2008-12-29 | 2012-01-25 | 주식회사 하이닉스반도체 | 반도체 소자의 트랜지스터 형성 방법 |
DE102010029532B4 (de) * | 2010-05-31 | 2012-01-26 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Transistor mit eingebettetem verformungsinduzierenden Material, das in diamantförmigen Aussparungen auf der Grundlage einer Voramorphisierung hergestellt ist |
US9484432B2 (en) | 2010-12-21 | 2016-11-01 | Intel Corporation | Contact resistance reduction employing germanium overlayer pre-contact metalization |
US8901537B2 (en) | 2010-12-21 | 2014-12-02 | Intel Corporation | Transistors with high concentration of boron doped germanium |
CN204375716U (zh) | 2012-03-05 | 2015-06-03 | 应用材料公司 | 遮蔽框、基板支撑件以及等离子体增强型化学气相沉积设备 |
CN104299984A (zh) * | 2013-07-19 | 2015-01-21 | 北大方正集团有限公司 | 一种半导体器件及其制造方法 |
US9184234B2 (en) | 2014-01-16 | 2015-11-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Transistor design |
US9425099B2 (en) | 2014-01-16 | 2016-08-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Epitaxial channel with a counter-halo implant to improve analog gain |
US9224814B2 (en) * | 2014-01-16 | 2015-12-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Process design to improve transistor variations and performance |
US9236445B2 (en) | 2014-01-16 | 2016-01-12 | Taiwan Semiconductor Manufacturing Co., Ltd. | Transistor having replacement gate and epitaxially grown replacement channel region |
US9525031B2 (en) | 2014-03-13 | 2016-12-20 | Taiwan Semiconductor Manufacturing Co., Ltd. | Epitaxial channel |
US9419136B2 (en) | 2014-04-14 | 2016-08-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Dislocation stress memorization technique (DSMT) on epitaxial channel devices |
US9536945B1 (en) | 2015-07-30 | 2017-01-03 | International Business Machines Corporation | MOSFET with ultra low drain leakage |
CN111341663A (zh) * | 2020-03-12 | 2020-06-26 | 上海华虹宏力半导体制造有限公司 | 射频器件的形成方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4475982A (en) | 1983-12-12 | 1984-10-09 | International Business Machines Corporation | Deep trench etching process using CCl2 F2 /Ar and CCl2 F.sub. /O2 RIE |
JPH0383335A (ja) | 1989-08-28 | 1991-04-09 | Hitachi Ltd | エッチング方法 |
KR0135147B1 (ko) * | 1994-07-21 | 1998-04-22 | 문정환 | 트랜지스터 제조방법 |
US5710450A (en) * | 1994-12-23 | 1998-01-20 | Intel Corporation | Transistor with ultra shallow tip and method of fabrication |
US5674760A (en) * | 1996-02-26 | 1997-10-07 | United Microelectronics Corporation | Method of forming isolation regions in a MOS transistor device |
US5908313A (en) | 1996-12-31 | 1999-06-01 | Intel Corporation | Method of forming a transistor |
US6071783A (en) * | 1998-08-13 | 2000-06-06 | Taiwan Semiconductor Manufacturing Company | Pseudo silicon on insulator MOSFET device |
-
1999
- 1999-12-30 US US09/474,836 patent/US6541343B1/en not_active Expired - Fee Related
-
2000
- 2000-11-27 DE DE60036410T patent/DE60036410T2/de not_active Expired - Lifetime
- 2000-11-27 CN CNB00819260XA patent/CN1201403C/zh not_active Expired - Fee Related
- 2000-11-27 AT AT00992349T patent/ATE373320T1/de not_active IP Right Cessation
- 2000-11-27 WO PCT/US2000/042279 patent/WO2001050535A2/en active IP Right Grant
- 2000-11-27 EP EP00992349A patent/EP1245049B1/de not_active Expired - Lifetime
- 2000-11-27 AU AU43057/01A patent/AU4305701A/en not_active Abandoned
-
2003
- 2003-01-16 US US10/346,536 patent/US20030136985A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
EP1245049B1 (de) | 2007-09-12 |
CN1201403C (zh) | 2005-05-11 |
DE60036410T2 (de) | 2008-05-29 |
WO2001050535A2 (en) | 2001-07-12 |
WO2001050535A3 (en) | 2002-02-07 |
AU4305701A (en) | 2001-07-16 |
ATE373320T1 (de) | 2007-09-15 |
EP1245049A2 (de) | 2002-10-02 |
US6541343B1 (en) | 2003-04-01 |
CN1437769A (zh) | 2003-08-20 |
US20030136985A1 (en) | 2003-07-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |