DE3856124D1 - Serieller Videoprozessor und Verfahren - Google Patents

Serieller Videoprozessor und Verfahren

Info

Publication number
DE3856124D1
DE3856124D1 DE3856124T DE3856124T DE3856124D1 DE 3856124 D1 DE3856124 D1 DE 3856124D1 DE 3856124 T DE3856124 T DE 3856124T DE 3856124 T DE3856124 T DE 3856124T DE 3856124 D1 DE3856124 D1 DE 3856124D1
Authority
DE
Germany
Prior art keywords
video processor
serial video
serial
processor
video
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3856124T
Other languages
English (en)
Other versions
DE3856124T2 (de
Inventor
Jimmie D Childers
Adin Hyslop
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE3856124D1 publication Critical patent/DE3856124D1/de
Application granted granted Critical
Publication of DE3856124T2 publication Critical patent/DE3856124T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Computing Systems (AREA)
  • Image Processing (AREA)
  • Picture Signal Circuits (AREA)
DE3856124T 1987-11-13 1988-11-11 Serieller Videoprozessor und Verfahren Expired - Fee Related DE3856124T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11989087A 1987-11-13 1987-11-13
US11988987A 1987-11-13 1987-11-13

Publications (2)

Publication Number Publication Date
DE3856124D1 true DE3856124D1 (de) 1998-03-05
DE3856124T2 DE3856124T2 (de) 1998-06-10

Family

ID=26817827

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3856124T Expired - Fee Related DE3856124T2 (de) 1987-11-13 1988-11-11 Serieller Videoprozessor und Verfahren

Country Status (4)

Country Link
EP (1) EP0317218B1 (de)
JP (1) JP2774115B2 (de)
KR (1) KR970007011B1 (de)
DE (1) DE3856124T2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5598545A (en) * 1989-10-13 1997-01-28 Texas Instruments Incorporated Circuitry and method for performing two operating instructions during a single clock in a processing device
KR0179362B1 (ko) * 1989-10-13 1999-05-15 앤. 라이스 머레트 비디오 신호 프로세서 제어기용 명령 발생기 아키텍쳐
KR100224054B1 (ko) * 1989-10-13 1999-10-15 윌리엄 비. 켐플러 동기 벡터 프로세서내의 비디오신호를 연속 프로세싱 하기 위한 회로 및 이의 작동 방법
CN1042282C (zh) * 1989-10-13 1999-02-24 德克萨斯仪器公司 用于同步矢量处理机的第二最近邻通讯网络、***和方法
KR100199073B1 (ko) * 1989-10-13 1999-06-15 윌리엄 비. 켐플러 동기 벡터 프로세서 내의 신호 파이프라이닝
US5408673A (en) * 1989-10-13 1995-04-18 Texas Instruments Incorporated Circuit for continuous processing of video signals in a synchronous vector processor and method of operating same
DE69032544T2 (de) * 1990-02-28 1998-12-17 Texas Instruments Inc., Dallas, Tex. Verfahren und Vorrichtung zur Verarbeitung eines Videosignals
EP0444368B1 (de) * 1990-02-28 1997-12-29 Texas Instruments France Ein SIMD-Prozessor als digitales Filter
JP3187851B2 (ja) * 1990-03-01 2001-07-16 テキサス インスツルメンツ インコーポレイテツド 鮮明度を改良したテレビ
US5093722A (en) * 1990-03-01 1992-03-03 Texas Instruments Incorporated Definition television digital processing units, systems and methods
JPH0877002A (ja) * 1994-08-31 1996-03-22 Sony Corp 並列プロセッサ装置
GB2299421A (en) * 1995-03-29 1996-10-02 Sony Uk Ltd Processing real-time data streams
US6353460B1 (en) 1997-09-30 2002-03-05 Matsushita Electric Industrial Co., Ltd. Television receiver, video signal processing device, image processing device and image processing method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2129589B (en) * 1982-11-08 1986-04-30 Nat Res Dev Array processor cell

Also Published As

Publication number Publication date
EP0317218A3 (de) 1991-09-04
KR970007011B1 (ko) 1997-05-01
JPH01258184A (ja) 1989-10-16
EP0317218B1 (de) 1998-01-28
JP2774115B2 (ja) 1998-07-09
DE3856124T2 (de) 1998-06-10
EP0317218A2 (de) 1989-05-24
KR890008671A (ko) 1989-07-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee