DE3777603D1 - Verfahren zur herstellung einer halbleiteranordnung mit einem halbleitersubstrat, das feldoxidzonen an seiner oberflaeche enthaelt. - Google Patents
Verfahren zur herstellung einer halbleiteranordnung mit einem halbleitersubstrat, das feldoxidzonen an seiner oberflaeche enthaelt.Info
- Publication number
- DE3777603D1 DE3777603D1 DE8787202437T DE3777603T DE3777603D1 DE 3777603 D1 DE3777603 D1 DE 3777603D1 DE 8787202437 T DE8787202437 T DE 8787202437T DE 3777603 T DE3777603 T DE 3777603T DE 3777603 D1 DE3777603 D1 DE 3777603D1
- Authority
- DE
- Germany
- Prior art keywords
- producing
- field oxide
- semiconductor
- semiconductor substrate
- contains field
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title 2
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
- H01L21/31654—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
- H01L21/31658—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe
- H01L21/31662—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe of silicon in uncombined form
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
- H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
- H01L21/76218—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers introducing both types of electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers, e.g. for isolation of complementary doped regions
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/117—Oxidation, selective
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/118—Oxide films
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL8603111A NL8603111A (nl) | 1986-12-08 | 1986-12-08 | Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij een siliciumplak aan zijn oppervlak wordt voorzien van veldoxidegebieden. |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3777603D1 true DE3777603D1 (de) | 1992-04-23 |
Family
ID=19848963
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8787202437T Expired - Lifetime DE3777603D1 (de) | 1986-12-08 | 1987-12-07 | Verfahren zur herstellung einer halbleiteranordnung mit einem halbleitersubstrat, das feldoxidzonen an seiner oberflaeche enthaelt. |
Country Status (7)
Country | Link |
---|---|
US (1) | US4906595A (de) |
EP (1) | EP0274779B1 (de) |
JP (1) | JPH07114199B2 (de) |
KR (1) | KR970000703B1 (de) |
CA (1) | CA1330195C (de) |
DE (1) | DE3777603D1 (de) |
NL (1) | NL8603111A (de) |
Families Citing this family (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2886183B2 (ja) * | 1988-06-28 | 1999-04-26 | 三菱電機株式会社 | フィールド分離絶縁膜の製造方法 |
DE68925879T2 (de) * | 1988-12-21 | 1996-10-02 | At & T Corp | Thermisches Oxydierungsverfahren mit verändertem Wachstum für dünne Oxide |
JPH088255B2 (ja) * | 1990-02-20 | 1996-01-29 | 株式会社東芝 | 半導体基板表面処理方法および半導体基板表面処理装置 |
US5057463A (en) * | 1990-02-28 | 1991-10-15 | Sgs-Thomson Microelectronics, Inc. | Thin oxide structure and method |
US5091332A (en) * | 1990-11-19 | 1992-02-25 | Intel Corporation | Semiconductor field oxidation process |
US5290396A (en) * | 1991-06-06 | 1994-03-01 | Lsi Logic Corporation | Trench planarization techniques |
US5413966A (en) * | 1990-12-20 | 1995-05-09 | Lsi Logic Corporation | Shallow trench etch |
US5225358A (en) * | 1991-06-06 | 1993-07-06 | Lsi Logic Corporation | Method of forming late isolation with polishing |
US5252503A (en) * | 1991-06-06 | 1993-10-12 | Lsi Logic Corporation | Techniques for forming isolation structures |
US5248625A (en) * | 1991-06-06 | 1993-09-28 | Lsi Logic Corporation | Techniques for forming isolation structures |
US5244843A (en) * | 1991-12-17 | 1993-09-14 | Intel Corporation | Process for forming a thin oxide layer |
JP2953897B2 (ja) * | 1992-08-10 | 1999-09-27 | シャープ株式会社 | 半導体装置の製造方法 |
US5340553A (en) * | 1993-03-22 | 1994-08-23 | Rockwell International Corporation | Method of removing oxygen from a controlled atmosphere |
JPH0710935U (ja) * | 1993-07-24 | 1995-02-14 | ヤマハ株式会社 | 縦型熱処理炉 |
JPH0786271A (ja) * | 1993-09-17 | 1995-03-31 | Fujitsu Ltd | シリコン酸化膜の作製方法 |
US5880041A (en) * | 1994-05-27 | 1999-03-09 | Motorola Inc. | Method for forming a dielectric layer using high pressure |
WO1996033510A1 (en) * | 1995-04-21 | 1996-10-24 | International Business Machines Corporation | PROCESS FOR THE CREATION OF A THERMAL SiO2 LAYER WITH EXTREMELY UNIFORM LAYER THICKNESS |
US5861339A (en) * | 1995-10-27 | 1999-01-19 | Integrated Device Technology, Inc. | Recessed isolation with double oxidation |
US6159866A (en) * | 1998-03-02 | 2000-12-12 | Applied Materials, Inc. | Method for insitu vapor generation for forming an oxide on a substrate |
US6037273A (en) * | 1997-07-11 | 2000-03-14 | Applied Materials, Inc. | Method and apparatus for insitu vapor generation |
US6281141B1 (en) | 1999-02-08 | 2001-08-28 | Steag Rtp Systems, Inc. | Process for forming thin dielectric layers in semiconductor devices |
US6376387B2 (en) | 1999-07-09 | 2002-04-23 | Applied Materials, Inc. | Method of sealing an epitaxial silicon layer on a substrate |
NL1013667C2 (nl) * | 1999-11-25 | 2000-12-15 | Asm Int | Werkwijze en inrichting voor het vormen van een oxidelaag op wafers vervaardigd uit halfgeleidermateriaal. |
JP2001274154A (ja) | 2000-01-18 | 2001-10-05 | Applied Materials Inc | 成膜方法、成膜装置、半導体装置及びその製造方法 |
US6436194B1 (en) | 2001-02-16 | 2002-08-20 | Applied Materials, Inc. | Method and a system for sealing an epitaxial silicon layer on a substrate |
US7354789B2 (en) * | 2003-11-04 | 2008-04-08 | Dongbu Electronics Co., Ltd. | CMOS image sensor and method for fabricating the same |
US7419496B2 (en) * | 2004-08-03 | 2008-09-02 | Staudner Rupert A | Trocar with retractable cutting surface |
US8889565B2 (en) * | 2009-02-13 | 2014-11-18 | Asm International N.V. | Selective removal of oxygen from metal-containing materials |
US9127340B2 (en) | 2009-02-13 | 2015-09-08 | Asm International N.V. | Selective oxidation process |
Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2930722A (en) * | 1959-02-03 | 1960-03-29 | Bell Telephone Labor Inc | Method of treating silicon |
US3380852A (en) * | 1964-11-23 | 1968-04-30 | Bell Telephone Labor Inc | Method of forming an oxide coating on semiconductor bodies |
US3583685A (en) * | 1968-09-26 | 1971-06-08 | Ibm | Method and apparatus for controlling quantity of a vapor in a gas |
DE1934957A1 (de) * | 1969-07-10 | 1971-01-28 | Ibm Deutschland | Verfahren zur Herstellung von Oberflaechen-Feldeffekt-Transistoren |
US3874919A (en) * | 1974-03-13 | 1975-04-01 | Ibm | Oxidation resistant mask layer and process for producing recessed oxide region in a silicon body |
US4186408A (en) * | 1975-05-20 | 1980-01-29 | International Business Machines Corporation | IGFET with partial planar oxide |
IN145547B (de) * | 1976-01-12 | 1978-11-04 | Rca Corp | |
US4139658A (en) * | 1976-06-23 | 1979-02-13 | Rca Corp. | Process for manufacturing a radiation hardened oxide |
JPS54125966A (en) * | 1978-03-24 | 1979-09-29 | Hitachi Ltd | Defect elimination method for semiconductor wafer |
US4267205A (en) * | 1979-08-15 | 1981-05-12 | Hughes Aircraft Company | Process for low-temperature surface layer oxidation of a semiconductor substrate |
AT362268B (de) * | 1979-10-03 | 1981-04-27 | Fehrer Ernst | Spinnanlage |
JPS5693344A (en) * | 1979-12-26 | 1981-07-28 | Fujitsu Ltd | Manufacture of semiconductor device |
JPS5762545A (en) * | 1980-10-03 | 1982-04-15 | Fujitsu Ltd | Manufacture of semiconductor device |
US4376796A (en) * | 1981-10-27 | 1983-03-15 | Thermco Products Corporation | Processing silicon wafers employing processing gas atmospheres of similar molecular weight |
JPS59181540A (ja) * | 1983-03-31 | 1984-10-16 | Internatl Rectifier Corp Japan Ltd | 半導体基板の熱酸化方法 |
JPS60122799A (ja) * | 1984-05-25 | 1985-07-01 | Hitachi Ltd | 半導体ウエハの熱処理方法 |
JPS6116531A (ja) * | 1984-07-03 | 1986-01-24 | Matsushita Electronics Corp | 半導体装置の製造方法 |
US4551910A (en) * | 1984-11-27 | 1985-11-12 | Intel Corporation | MOS Isolation processing |
US4599247A (en) * | 1985-01-04 | 1986-07-08 | Texas Instruments Incorporated | Semiconductor processing facility for providing enhanced oxidation rate |
NL8501720A (nl) * | 1985-06-14 | 1987-01-02 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij een siliciumplak plaatselijk wordt voorzien van veldoxide met kanaalonderbreker. |
JPS6210018A (ja) * | 1985-07-04 | 1987-01-19 | Oruto Bioka Kenkyusho:Kk | 肥満抑制組成物 |
-
1986
- 1986-12-08 NL NL8603111A patent/NL8603111A/nl not_active Application Discontinuation
-
1987
- 1987-12-01 JP JP62305488A patent/JPH07114199B2/ja not_active Expired - Fee Related
- 1987-12-02 CA CA000553385A patent/CA1330195C/en not_active Expired - Fee Related
- 1987-12-07 EP EP87202437A patent/EP0274779B1/de not_active Expired - Lifetime
- 1987-12-07 KR KR1019870013917A patent/KR970000703B1/ko not_active IP Right Cessation
- 1987-12-07 DE DE8787202437T patent/DE3777603D1/de not_active Expired - Lifetime
-
1989
- 1989-07-21 US US07/388,294 patent/US4906595A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
NL8603111A (nl) | 1988-07-01 |
EP0274779B1 (de) | 1992-03-18 |
US4906595A (en) | 1990-03-06 |
KR880008429A (ko) | 1988-08-31 |
JPH07114199B2 (ja) | 1995-12-06 |
KR970000703B1 (ko) | 1997-01-18 |
EP0274779A1 (de) | 1988-07-20 |
CA1330195C (en) | 1994-06-14 |
JPS63155750A (ja) | 1988-06-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: PHILIPS ELECTRONICS N.V., EINDHOVEN, NL |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N |
|
8320 | Willingness to grant licences declared (paragraph 23) | ||
8339 | Ceased/non-payment of the annual fee |