DE3687867D1 - Mikrorechner. - Google Patents

Mikrorechner.

Info

Publication number
DE3687867D1
DE3687867D1 DE8686111567T DE3687867T DE3687867D1 DE 3687867 D1 DE3687867 D1 DE 3687867D1 DE 8686111567 T DE8686111567 T DE 8686111567T DE 3687867 T DE3687867 T DE 3687867T DE 3687867 D1 DE3687867 D1 DE 3687867D1
Authority
DE
Germany
Prior art keywords
microcalculator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686111567T
Other languages
English (en)
Other versions
DE3687867T2 (de
Inventor
Tetsuro Kanai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NCR Voyix Corp
Original Assignee
NCR Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCR Corp filed Critical NCR Corp
Application granted granted Critical
Publication of DE3687867D1 publication Critical patent/DE3687867D1/de
Publication of DE3687867T2 publication Critical patent/DE3687867T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/106Data output latches
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7842Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
    • G06F15/786Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers) using a single memory module
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)
  • Memory System (AREA)
DE8686111567T 1985-08-21 1986-08-21 Mikrorechner. Expired - Fee Related DE3687867T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60184724A JPS6243744A (ja) 1985-08-21 1985-08-21 マイクロコンピユ−タ

Publications (2)

Publication Number Publication Date
DE3687867D1 true DE3687867D1 (de) 1993-04-08
DE3687867T2 DE3687867T2 (de) 1993-08-05

Family

ID=16158254

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686111567T Expired - Fee Related DE3687867T2 (de) 1985-08-21 1986-08-21 Mikrorechner.

Country Status (4)

Country Link
US (1) US4835684A (de)
EP (1) EP0212637B1 (de)
JP (1) JPS6243744A (de)
DE (1) DE3687867T2 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR950000341B1 (ko) * 1984-11-26 1995-01-13 가부시기가이샤 히다찌세이사꾸쇼 메모리를 내장한 반도체 집적회로 장치
US5287485A (en) * 1988-12-22 1994-02-15 Digital Equipment Corporation Digital processing system including plural memory devices and data transfer circuitry
JP2592979B2 (ja) * 1990-04-25 1997-03-19 株式会社東芝 信号処理用集積回路装置
JP2566064B2 (ja) * 1991-01-17 1996-12-25 株式会社東芝 入出力バッファ回路
US5245572A (en) * 1991-07-30 1993-09-14 Intel Corporation Floating gate nonvolatile memory with reading while writing capability
JPH05134973A (ja) * 1991-11-14 1993-06-01 Toshiba Corp データ転送装置
US5485588A (en) * 1992-12-18 1996-01-16 International Business Machines Corporation Memory array based data reorganizer
TW357295B (en) * 1994-02-08 1999-05-01 United Microelectronics Corp Microprocessor's data writing, reading operations
FR2717921B1 (fr) * 1994-03-24 1996-06-21 Texas Instruments France Dispositif de gestion de conflit d'accès entre un CPU et des mémoires.
US5873126A (en) * 1995-06-12 1999-02-16 International Business Machines Corporation Memory array based data reorganizer
US5818789A (en) * 1995-10-10 1998-10-06 Holtek Microelectronics, Inc. Device and method for memory access
US5737548A (en) * 1995-11-07 1998-04-07 Yach; Randy L. RISC-based microcontroller with peripheral function added to a split data bus
US5918073A (en) * 1997-06-27 1999-06-29 Advanced Micro Devices, Inc. System and method for equalizing data buffer storage and fetch rates of peripheral devices
US6542909B1 (en) * 1998-06-30 2003-04-01 Emc Corporation System for determining mapping of logical objects in a computer system
US6329985B1 (en) 1998-06-30 2001-12-11 Emc Corporation Method and apparatus for graphically displaying mapping of a logical object
US6282602B1 (en) * 1998-06-30 2001-08-28 Emc Corporation Method and apparatus for manipulating logical objects in a data storage system
US6393540B1 (en) * 1998-06-30 2002-05-21 Emc Corporation Moving a logical object from a set of source locations to a set of destination locations using a single command
US7383294B1 (en) 1998-06-30 2008-06-03 Emc Corporation System for determining the mapping of logical objects in a data storage system
US6883063B2 (en) 1998-06-30 2005-04-19 Emc Corporation Method and apparatus for initializing logical objects in a data storage system
CN112305961B (zh) * 2020-10-19 2022-04-12 武汉大学 新型信号探测采集设备

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3351913A (en) * 1964-10-21 1967-11-07 Gen Electric Memory system including means for selectively altering or not altering restored data
JPS5371537A (en) * 1976-12-08 1978-06-26 Hitachi Ltd Information processor
JPS5538668A (en) * 1978-09-12 1980-03-18 Nec Corp Memory unit
JPS584470A (ja) * 1981-07-01 1983-01-11 Hitachi Ltd メモリ制御装置
US4491910A (en) * 1982-02-22 1985-01-01 Texas Instruments Incorporated Microcomputer having data shift within memory
US4541075A (en) * 1982-06-30 1985-09-10 International Business Machines Corporation Random access memory having a second input/output port
JPS6059462A (ja) * 1983-09-12 1985-04-05 Nec Corp 双方向デ−タ・バスのパイプライン・アクセス・メモリ
JPS61104391A (ja) * 1984-10-23 1986-05-22 Fujitsu Ltd 半導体記憶装置

Also Published As

Publication number Publication date
EP0212637A3 (en) 1989-07-12
DE3687867T2 (de) 1993-08-05
EP0212637A2 (de) 1987-03-04
US4835684A (en) 1989-05-30
JPS6243744A (ja) 1987-02-25
EP0212637B1 (de) 1993-03-03

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Legal Events

Date Code Title Description
8380 Miscellaneous part iii

Free format text: DER PATENTINHABER LAUTET RICHTIG: NEC CORP., TOKIO/TOKYO, JP

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee