DE3588174D1 - Video system - Google Patents

Video system

Info

Publication number
DE3588174D1
DE3588174D1 DE3588174T DE3588174T DE3588174D1 DE 3588174 D1 DE3588174 D1 DE 3588174D1 DE 3588174 T DE3588174 T DE 3588174T DE 3588174 T DE3588174 T DE 3588174T DE 3588174 D1 DE3588174 D1 DE 3588174D1
Authority
DE
Germany
Prior art keywords
video system
video
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3588174T
Other languages
German (de)
Other versions
DE3588174T2 (en
Inventor
Jeffrey C Bond
Karl M Guttag
Robert C Thaden
Raymond Pinkham
Mark Novak
Mark W Watts
Jerry Vanaken
John V Moravec
Rudy J Albachten Iii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US06/633,385 external-priority patent/US4656597A/en
Priority claimed from US06/633,383 external-priority patent/US4660156A/en
Priority claimed from US06/633,388 external-priority patent/US4660155A/en
Priority claimed from US06/633,386 external-priority patent/US4656596A/en
Priority claimed from US06/633,367 external-priority patent/US4691289A/en
Priority claimed from US06/633,389 external-priority patent/US4654804A/en
Priority claimed from US06/633,384 external-priority patent/US4665495A/en
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE3588174D1 publication Critical patent/DE3588174D1/en
Publication of DE3588174T2 publication Critical patent/DE3588174T2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/001Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/005Adapting incoming signals to the display format of the display terminal
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/363Graphics controllers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/391Resolution modifying circuits, e.g. variable screen formats
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/393Arrangements for updating the contents of the bit-mapped memory
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/395Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
    • G09G5/397Arrangements specially adapted for transferring the contents of two or more bit-mapped memories to the screen simultaneously, e.g. for mixing or overlay
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/06Details of flat display driving waveforms
    • G09G2310/061Details of flat display driving waveforms for resetting or blanking
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00Aspects of the architecture of display systems
    • G09G2360/12Frame memory handling
    • G09G2360/126The frame memory having additional data ports, not inclusive of standard details of the output serial port of a VRAM
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00Aspects of the architecture of display systems
    • G09G2360/12Frame memory handling
    • G09G2360/128Frame memory using a Synchronous Dynamic RAM [SDRAM]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00Aspects of the architecture of display systems
    • G09G2360/18Use of a frame buffer in a display terminal, inclusive of the display panel
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/399Control of the bit-mapped memory using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Graphics (AREA)
  • Multimedia (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Image Input (AREA)
  • Digital Computer Display Output (AREA)
  • Memory System (AREA)
DE19853588174 1984-07-23 1985-07-23 Video system Expired - Fee Related DE3588174T2 (en)

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
US63338784A 1984-07-23 1984-07-23
US06/633,383 US4660156A (en) 1984-07-23 1984-07-23 Video system with single memory space for instruction, program data and display data
US06/633,388 US4660155A (en) 1984-07-23 1984-07-23 Single chip video system with separate clocks for memory controller, CRT controller
US06/633,386 US4656596A (en) 1984-07-23 1984-07-23 Video memory controller
US06/633,367 US4691289A (en) 1984-07-23 1984-07-23 State machine standard cell that supports both a Moore and a Mealy implementation
US06/633,389 US4654804A (en) 1984-07-23 1984-07-23 Video system with XY addressing capabilities
US06/633,385 US4656597A (en) 1984-07-23 1984-07-23 Video system controller with a row address override circuit
US06/633,384 US4665495A (en) 1984-07-23 1984-07-23 Single chip dram controller and CRT controller

Publications (2)

Publication Number Publication Date
DE3588174D1 true DE3588174D1 (en) 1998-02-19
DE3588174T2 DE3588174T2 (en) 1998-06-10

Family

ID=27575495

Family Applications (3)

Application Number Title Priority Date Filing Date
DE19853587744 Expired - Fee Related DE3587744T2 (en) 1984-07-23 1985-07-23 Control logic for a video system with a circuit that overrides the row address.
DE19853588173 Expired - Fee Related DE3588173T2 (en) 1984-07-23 1985-07-23 Video system
DE19853588174 Expired - Fee Related DE3588174T2 (en) 1984-07-23 1985-07-23 Video system

Family Applications Before (2)

Application Number Title Priority Date Filing Date
DE19853587744 Expired - Fee Related DE3587744T2 (en) 1984-07-23 1985-07-23 Control logic for a video system with a circuit that overrides the row address.
DE19853588173 Expired - Fee Related DE3588173T2 (en) 1984-07-23 1985-07-23 Video system

Country Status (3)

Country Link
EP (3) EP0182454B1 (en)
JP (2) JPH05281934A (en)
DE (3) DE3587744T2 (en)

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JPS63201791A (en) * 1987-02-12 1988-08-19 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン Processing system
US4884069A (en) * 1987-03-19 1989-11-28 Apple Computer, Inc. Video apparatus employing VRAMs
US5001652A (en) * 1987-03-20 1991-03-19 International Business Machines Corporation Memory arbitration for video subsystems
ATE84162T1 (en) * 1987-03-20 1993-01-15 Ibm COMPUTER SYSTEM WITH A VIDEO SUBSYSTEM.
JP2854867B2 (en) * 1987-09-14 1999-02-10 ジーディーイー システムズ インコーポレイテッド Image processing system and pixel data transfer method
US5113180A (en) * 1988-04-20 1992-05-12 International Business Machines Corporation Virtual display adapter
JP3068842B2 (en) * 1990-08-27 2000-07-24 任天堂株式会社 Direct memory access device in image processing device and external storage device used therefor
KR19990044196A (en) * 1995-08-28 1999-06-25 로버트 에프. 도노휴 Circuits and Methods for Controlling Refreshing of a Frame Buffer Including an Off-Screen Region
EP0772119A3 (en) * 1995-10-31 1997-12-29 Cirrus Logic, Inc. Automatic graphics operation
EP0786756B1 (en) * 1996-01-23 2009-03-25 Hewlett-Packard Company, A Delaware Corporation Data transfer arbitration for display controller
US6678204B2 (en) * 2001-12-27 2004-01-13 Elpida Memory Inc. Semiconductor memory device with high-speed operation and methods of using and designing thereof
WO2010027983A1 (en) * 2008-09-03 2010-03-11 Marvell World Trade Ltd. Progamming data into a multi-plane flash memory
US8300056B2 (en) * 2008-10-13 2012-10-30 Apple Inc. Seamless display migration
US8648868B2 (en) 2010-01-06 2014-02-11 Apple Inc. Color correction to facilitate switching between graphics-processing units
US8368702B2 (en) 2010-01-06 2013-02-05 Apple Inc. Policy-based switching between graphics-processing units
US8797334B2 (en) 2010-01-06 2014-08-05 Apple Inc. Facilitating efficient switching between graphics-processing units

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JPS5810135B2 (en) * 1973-03-20 1983-02-24 松下電器産業株式会社 High Gas Jiyou Kayoshiyoku Baitai
JPS5834836B2 (en) 1975-12-29 1983-07-29 株式会社日立製作所 data
US4125873A (en) * 1977-06-29 1978-11-14 International Business Machines Corporation Display compressed image refresh system
US4298931A (en) * 1978-06-02 1981-11-03 Hitachi, Ltd. Character pattern display system
US4288706A (en) 1978-10-20 1981-09-08 Texas Instruments Incorporated Noise immunity in input buffer circuit for semiconductor memory
US4286320A (en) 1979-03-12 1981-08-25 Texas Instruments Incorporated Digital computing system having auto-incrementing memory
JPS5926031B2 (en) * 1979-03-28 1984-06-23 日本電信電話株式会社 memory element
JPS5614346A (en) * 1979-07-12 1981-02-12 Toshiba Corp Write and read system for frame memory unit
JPS5631154A (en) * 1979-08-23 1981-03-28 Victor Co Of Japan Ltd Memory device
FR2465281A1 (en) * 1979-09-12 1981-03-20 Telediffusion Fse DEVICE FOR DIGITAL TRANSMISSION AND DISPLAY OF GRAPHICS AND / OR CHARACTERS ON A SCREEN
US4347587A (en) * 1979-11-23 1982-08-31 Texas Instruments Incorporated Semiconductor integrated circuit memory device with both serial and random access arrays
JPS5678881A (en) * 1979-12-03 1981-06-29 Hitachi Ltd Graphic display device
JPS56103642A (en) * 1980-01-18 1981-08-18 Shigekazu Nakamura Crane having outrigger
US4390780A (en) * 1980-11-10 1983-06-28 Burroughs Corporation LSI Timing circuit for a digital display employing a modulo eight counter
DE3138930C2 (en) * 1981-09-30 1985-11-07 Siemens AG, 1000 Berlin und 8000 München Data display device
DE3141882A1 (en) * 1981-10-22 1983-05-05 Agfa-Gevaert Ag, 5090 Leverkusen DYNAMIC WRITING AND READING MEMORY DEVICE
JPS58187996A (en) * 1982-04-28 1983-11-02 株式会社日立製作所 Display memory circuit
JPS58189690A (en) * 1982-04-30 1983-11-05 株式会社日立製作所 Image display
US4424372A (en) * 1982-09-20 1984-01-03 Timex Corporation 4-Substituted phenyl 4'-(5-N-alkyl-1,3-dioxan-2-yl) thiobenzoates
US4562435A (en) * 1982-09-29 1985-12-31 Texas Instruments Incorporated Video display system using serial/parallel access memories
JPS5960488A (en) * 1982-09-29 1984-04-06 フアナツク株式会社 Data writing unit for color graphic memory
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US4688197A (en) * 1983-12-30 1987-08-18 Texas Instruments Incorporated Control of data access to memory for improved video system
US4639890A (en) 1983-12-30 1987-01-27 Texas Instruments Incorporated Video display system using memory with parallel and serial access employing selectable cascaded serial shift registers
JPH01193792A (en) * 1983-12-30 1989-08-03 Texas Instr Inc <Ti> Memory and computer system using the same
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JP3347773B2 (en) * 1992-09-17 2002-11-20 川崎製鉄株式会社 Pure iron powder mixture for powder metallurgy
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JPH06100896A (en) * 1992-09-22 1994-04-12 Tatsuro Nagashima Production of granular detergent

Also Published As

Publication number Publication date
EP0481534A3 (en) 1992-08-26
DE3588174T2 (en) 1998-06-10
EP0182454A3 (en) 1988-03-23
EP0482678A2 (en) 1992-04-29
EP0481534B1 (en) 1998-01-14
EP0182454B1 (en) 1994-02-02
EP0482678B1 (en) 1998-01-14
DE3588173T2 (en) 1998-06-10
DE3587744T2 (en) 1994-05-19
JPH05281934A (en) 1993-10-29
EP0482678A3 (en) 1992-09-16
DE3587744D1 (en) 1994-03-17
DE3588173D1 (en) 1998-02-19
EP0481534A2 (en) 1992-04-22
EP0182454A2 (en) 1986-05-28
JPH1091136A (en) 1998-04-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee