DE3278865D1 - Semiconductor memory devices - Google Patents
Semiconductor memory devicesInfo
- Publication number
- DE3278865D1 DE3278865D1 DE8282305911T DE3278865T DE3278865D1 DE 3278865 D1 DE3278865 D1 DE 3278865D1 DE 8282305911 T DE8282305911 T DE 8282305911T DE 3278865 T DE3278865 T DE 3278865T DE 3278865 D1 DE3278865 D1 DE 3278865D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor memory
- memory devices
- devices
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
Landscapes
- Engineering & Computer Science (AREA)
- Databases & Information Systems (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56177477A JPS5880188A (ja) | 1981-11-05 | 1981-11-05 | 半導体記憶装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3278865D1 true DE3278865D1 (en) | 1988-09-08 |
Family
ID=16031593
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8282305911T Expired DE3278865D1 (en) | 1981-11-05 | 1982-11-05 | Semiconductor memory devices |
Country Status (5)
Country | Link |
---|---|
US (1) | US4511997A (de) |
EP (1) | EP0079220B1 (de) |
JP (1) | JPS5880188A (de) |
DE (1) | DE3278865D1 (de) |
IE (1) | IE54006B1 (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07118193B2 (ja) * | 1986-09-18 | 1995-12-18 | 富士通株式会社 | 半導体記憶装置 |
US4845677A (en) * | 1987-08-17 | 1989-07-04 | International Business Machines Corporation | Pipelined memory chip structure having improved cycle time |
KR910009444B1 (ko) * | 1988-12-20 | 1991-11-16 | 삼성전자 주식회사 | 반도체 메모리 장치 |
KR100201980B1 (ko) * | 1990-05-14 | 1999-06-15 | 스즈키 진이치로 | 반도체집적회로 |
KR0166044B1 (ko) * | 1995-10-10 | 1999-02-01 | 김주용 | 감지증폭기 어레이 |
US5701549A (en) * | 1996-01-22 | 1997-12-23 | Lexmark International, Inc. | Image forming apparatus with modular staging assembly |
JP2927243B2 (ja) * | 1996-07-11 | 1999-07-28 | 日本電気株式会社 | 半導体記憶装置 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3402398A (en) * | 1964-08-31 | 1968-09-17 | Bunker Ramo | Plural content addressed memories with a common sensing circuit |
US4330852A (en) * | 1979-11-23 | 1982-05-18 | Texas Instruments Incorporated | Semiconductor read/write memory array having serial access |
US4384347A (en) * | 1980-03-28 | 1983-05-17 | Fujitsu Limited | Semiconductor memory device |
JPS5951075B2 (ja) * | 1980-03-31 | 1984-12-12 | 富士通株式会社 | 半導体記憶装置 |
JPS5750385A (en) * | 1980-09-10 | 1982-03-24 | Nec Corp | Semiconductor device |
-
1981
- 1981-11-05 JP JP56177477A patent/JPS5880188A/ja active Granted
-
1982
- 1982-11-05 IE IE2644/82A patent/IE54006B1/en not_active IP Right Cessation
- 1982-11-05 US US06/439,507 patent/US4511997A/en not_active Expired - Lifetime
- 1982-11-05 DE DE8282305911T patent/DE3278865D1/de not_active Expired
- 1982-11-05 EP EP82305911A patent/EP0079220B1/de not_active Expired
Also Published As
Publication number | Publication date |
---|---|
EP0079220A2 (de) | 1983-05-18 |
IE822644L (en) | 1983-05-05 |
JPH0245273B2 (de) | 1990-10-08 |
EP0079220A3 (en) | 1985-09-18 |
EP0079220B1 (de) | 1988-08-03 |
IE54006B1 (en) | 1989-05-10 |
JPS5880188A (ja) | 1983-05-14 |
US4511997A (en) | 1985-04-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |