DE19733416A1 - Packung zum Verkleinern der mit einem Halbleiterchip verbundenen Parasitärinduktivität und Montagewerkzeug für deren Zusammenbau - Google Patents
Packung zum Verkleinern der mit einem Halbleiterchip verbundenen Parasitärinduktivität und Montagewerkzeug für deren ZusammenbauInfo
- Publication number
- DE19733416A1 DE19733416A1 DE19733416A DE19733416A DE19733416A1 DE 19733416 A1 DE19733416 A1 DE 19733416A1 DE 19733416 A DE19733416 A DE 19733416A DE 19733416 A DE19733416 A DE 19733416A DE 19733416 A1 DE19733416 A1 DE 19733416A1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor chip
- corners
- cavity
- center
- edges
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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- H—ELECTRICITY
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
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- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
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- H01L2924/161—Cap
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- H01L2924/30107—Inductance
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
- Packaging Frangible Articles (AREA)
- Wire Bonding (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8204746A JP2812313B2 (ja) | 1996-08-02 | 1996-08-02 | 半導体装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE19733416A1 true DE19733416A1 (de) | 1998-02-05 |
Family
ID=16495650
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19733416A Withdrawn DE19733416A1 (de) | 1996-08-02 | 1997-08-01 | Packung zum Verkleinern der mit einem Halbleiterchip verbundenen Parasitärinduktivität und Montagewerkzeug für deren Zusammenbau |
Country Status (3)
Country | Link |
---|---|
JP (1) | JP2812313B2 (ja) |
KR (1) | KR19980018322A (ja) |
DE (1) | DE19733416A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102013214486A1 (de) * | 2013-07-24 | 2015-01-29 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement und Verfahren zu seiner Herstellung |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW594888B (en) * | 2001-09-05 | 2004-06-21 | Hitachi Ltd | Semiconductor device and manufacturing method thereof and wireless communication device |
JP4624170B2 (ja) * | 2005-04-25 | 2011-02-02 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5314345A (en) * | 1976-07-26 | 1978-02-08 | Mitsubishi Electric Corp | Stability decision method of associated system |
JPH02146431U (ja) * | 1989-05-15 | 1990-12-12 | ||
JPH03214643A (ja) * | 1990-01-19 | 1991-09-19 | Hitachi Ltd | 真空吸着治具 |
JPH0465439U (ja) * | 1990-10-17 | 1992-06-08 |
-
1996
- 1996-08-02 JP JP8204746A patent/JP2812313B2/ja not_active Expired - Fee Related
-
1997
- 1997-08-01 DE DE19733416A patent/DE19733416A1/de not_active Withdrawn
- 1997-08-02 KR KR1019970037090A patent/KR19980018322A/ko not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102013214486A1 (de) * | 2013-07-24 | 2015-01-29 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement und Verfahren zu seiner Herstellung |
Also Published As
Publication number | Publication date |
---|---|
JP2812313B2 (ja) | 1998-10-22 |
KR19980018322A (ko) | 1998-06-05 |
JPH1050737A (ja) | 1998-02-20 |
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