DE112006004256A5 - Verfahren zur Herstellung eines SOI-Bauelements - Google Patents

Verfahren zur Herstellung eines SOI-Bauelements Download PDF

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Publication number
DE112006004256A5
DE112006004256A5 DE112006004256T DE112006004256T DE112006004256A5 DE 112006004256 A5 DE112006004256 A5 DE 112006004256A5 DE 112006004256 T DE112006004256 T DE 112006004256T DE 112006004256 T DE112006004256 T DE 112006004256T DE 112006004256 A5 DE112006004256 A5 DE 112006004256A5
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DE
Germany
Prior art keywords
producing
soi device
soi
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Pending
Application number
DE112006004256T
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English (en)
Inventor
Mario M. Pelella
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of DE112006004256A5 publication Critical patent/DE112006004256A5/de
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823481—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • H01L27/1207—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609—Diodes
    • H01L29/66128—Planar diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/8611—Planar PN junction diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
DE112006004256T 2005-05-11 2006-04-19 Verfahren zur Herstellung eines SOI-Bauelements Pending DE112006004256A5 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/127,329 2005-05-11
US11/127,329 US7361534B2 (en) 2005-05-11 2005-05-11 Method for fabricating SOI device

Publications (1)

Publication Number Publication Date
DE112006004256A5 true DE112006004256A5 (de) 2013-04-25

Family

ID=36716797

Family Applications (2)

Application Number Title Priority Date Filing Date
DE112006004256T Pending DE112006004256A5 (de) 2005-05-11 2006-04-19 Verfahren zur Herstellung eines SOI-Bauelements
DE112006001169T Expired - Fee Related DE112006001169B4 (de) 2005-05-11 2006-04-19 Verfahren zur Herstellung eines SOI-Bauelements

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE112006001169T Expired - Fee Related DE112006001169B4 (de) 2005-05-11 2006-04-19 Verfahren zur Herstellung eines SOI-Bauelements

Country Status (8)

Country Link
US (2) US7361534B2 (de)
JP (1) JP5079687B2 (de)
KR (1) KR101201489B1 (de)
CN (1) CN100562988C (de)
DE (2) DE112006004256A5 (de)
GB (1) GB2440861B (de)
TW (1) TWI390666B (de)
WO (1) WO2006124182A1 (de)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007004859A1 (de) * 2007-01-31 2008-08-14 Advanced Micro Devices, Inc., Sunnyvale SOI-Bauelement mit einer Substratdiode mit Prozess toleranter Konfiguration und Verfahren zur Herstellung des SOI-Bauelements
US7879663B2 (en) * 2007-03-08 2011-02-01 Freescale Semiconductor, Inc. Trench formation in a semiconductor material
US20080247101A1 (en) * 2007-04-09 2008-10-09 Advanced Micro Devices, Inc. Electronic device and method
DE102007052097B4 (de) * 2007-10-31 2010-10-28 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung eines SOI-Bauelements mit einer Substratdiode
US7875913B2 (en) * 2008-05-30 2011-01-25 Omnivision Technologies, Inc. Transistor with contact over gate active area
US8120110B2 (en) * 2008-08-08 2012-02-21 International Business Machines Corporation Semiconductor structure including a high performance FET and a high voltage FET on a SOI substrate
US8026131B2 (en) * 2008-12-23 2011-09-27 International Business Machines Corporation SOI radio frequency switch for reducing high frequency harmonics
US7999320B2 (en) * 2008-12-23 2011-08-16 International Business Machines Corporation SOI radio frequency switch with enhanced signal fidelity and electrical isolation
DE102008063403A1 (de) * 2008-12-31 2010-07-08 Advanced Micro Devices, Inc., Sunnyvale SOI-Bauelement mit einem vergrabenen isolierenden Material mit erhöhter Ätzwiderstandsfähigkeit
US8299537B2 (en) 2009-02-11 2012-10-30 International Business Machines Corporation Semiconductor-on-insulator substrate and structure including multiple order radio frequency harmonic supressing region
ATE535937T1 (de) * 2009-05-18 2011-12-15 Soitec Silicon On Insulator Herstellungsverfahren für ein hybrid- halbleitersubstrat
US8048753B2 (en) * 2009-06-12 2011-11-01 Globalfoundries Inc. Charging protection device
DE102009031114B4 (de) * 2009-06-30 2011-07-07 Globalfoundries Dresden Module One LLC & CO. KG, 01109 Halbleiterelement, das in einem kristallinen Substratmaterial hergestellt ist und ein eingebettetes in-situ n-dotiertes Halbleitermaterial aufweist, und Verfahren zur Herstellung desselben
US7955940B2 (en) * 2009-09-01 2011-06-07 International Business Machines Corporation Silicon-on-insulator substrate with built-in substrate junction
JP5721147B2 (ja) * 2010-03-09 2015-05-20 大学共同利用機関法人 高エネルギー加速器研究機構 半導体装置及び半導体装置の製造方法
DE102011002877B4 (de) * 2011-01-19 2019-07-18 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Verfahren zur Herstellung eines SOI-Halbleiterbauelements mit einer Substratdiode und einer Schichtdiode, die unter Anwendung einer gemeinsamen Wannenimplantationsmaske hergestellt sind
FR2985089B1 (fr) * 2011-12-27 2015-12-04 Commissariat Energie Atomique Transistor et procede de fabrication d'un transistor
KR20160058499A (ko) * 2014-11-17 2016-05-25 삼성전자주식회사 반도체 소자, 및 그 반도체 소자의 제조방법과 제조장치
US10446644B2 (en) * 2015-06-22 2019-10-15 Globalfoundries Inc. Device structures for a silicon-on-insulator substrate with a high-resistance handle wafer
WO2021035420A1 (zh) 2019-08-23 2021-03-04 京东方科技集团股份有限公司 显示面板及其制造方法、显示装置
WO2021035414A1 (zh) 2019-08-23 2021-03-04 京东方科技集团股份有限公司 像素电路及驱动方法、显示基板及驱动方法、显示装置
US11600234B2 (en) 2015-10-15 2023-03-07 Ordos Yuansheng Optoelectronics Co., Ltd. Display substrate and driving method thereof
CN105185816A (zh) * 2015-10-15 2015-12-23 京东方科技集团股份有限公司 阵列基板及其制造方法、显示装置
US10418380B2 (en) * 2017-07-31 2019-09-17 Globalfoundries Inc. High-voltage transistor device with thick gate insulation layers
US10699963B2 (en) * 2017-08-31 2020-06-30 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of semiconductor device structure with isolation feature
US10115837B1 (en) * 2017-09-28 2018-10-30 Globalfoundries Singapore Pte. Ltd. Integrated circuits with solar cells and methods for producing the same
EP4020596A4 (de) * 2019-08-23 2022-08-10 BOE Technology Group Co., Ltd. Anzeigevorrichtung und herstellungsverfahren dafür
EP4020575A4 (de) 2019-08-23 2022-12-14 BOE Technology Group Co., Ltd. Anzeigevorrichtung und herstellungsverfahren dafür
US11404451B2 (en) 2019-08-27 2022-08-02 Boe Technology Group Co., Ltd. Electronic device substrate, manufacturing method thereof, and electronic device

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6113662A (ja) * 1984-06-28 1986-01-21 Nippon Telegr & Teleph Corp <Ntt> 相補形ｍｉｓトランジスタ装置及びその製法
JPH0738413B2 (ja) * 1984-10-31 1995-04-26 富士通株式会社 半導体装置
JPH02102569A (ja) 1988-10-12 1990-04-16 Nippon Telegr & Teleph Corp <Ntt> 半導体装置
JPH0982814A (ja) * 1995-07-10 1997-03-28 Denso Corp 半導体集積回路装置及びその製造方法
JPH09115999A (ja) * 1995-10-23 1997-05-02 Denso Corp 半導体集積回路装置
US5847419A (en) * 1996-09-17 1998-12-08 Kabushiki Kaisha Toshiba Si-SiGe semiconductor device and method of fabricating the same
JP3415401B2 (ja) * 1997-08-28 2003-06-09 株式会社東芝 半導体集積回路装置及びその製造方法
US5869379A (en) * 1997-12-08 1999-02-09 Advanced Micro Devices, Inc. Method of forming air gap spacer for high performance MOSFETS'
JPH11238860A (ja) 1998-02-19 1999-08-31 Hitachi Ltd 半導体集積回路装置およびその製造方法
TW426998B (en) * 1998-05-04 2001-03-21 United Microelectronics Corp Layer-stacked integrated circuit structure
KR100344220B1 (ko) * 1999-10-20 2002-07-19 삼성전자 주식회사 에스·오·아이(ｓｏｉ) 구조를 갖는 반도체 소자 및 그 제조방법
US6303414B1 (en) * 2000-07-12 2001-10-16 Chartered Semiconductor Manufacturing Ltd. Method of forming PID protection diode for SOI wafer
KR100456526B1 (ko) * 2001-05-22 2004-11-09 삼성전자주식회사 식각저지막을 갖는 에스오아이 기판, 그 제조방법, 그위에 제작된 에스오아이 집적회로 및 그것을 사용하여에스오아이 집적회로를 제조하는 방법
JP2003224264A (ja) * 2002-01-29 2003-08-08 Sony Corp 半導体装置及びその製造方法
US6835622B2 (en) * 2002-06-04 2004-12-28 Taiwan Semiconductor Manufacturing Co., Ltd Gate electrode doping method for forming semiconductor integrated circuit microelectronic fabrication with varying effective gate dielectric layer thicknesses
US6849530B2 (en) * 2002-07-31 2005-02-01 Advanced Micro Devices Method for semiconductor gate line dimension reduction
US6835662B1 (en) * 2003-07-14 2004-12-28 Advanced Micro Devices, Inc. Partially de-coupled core and periphery gate module process
JP3962729B2 (ja) * 2004-06-03 2007-08-22 株式会社東芝 半導体装置

Also Published As

Publication number Publication date
CN100562988C (zh) 2009-11-25
GB2440861A (en) 2008-02-13
WO2006124182A1 (en) 2006-11-23
DE112006001169B4 (de) 2012-04-26
US20080138941A1 (en) 2008-06-12
US7741164B2 (en) 2010-06-22
JP2008541446A (ja) 2008-11-20
CN101180725A (zh) 2008-05-14
US20060258110A1 (en) 2006-11-16
GB0721841D0 (en) 2007-12-27
DE112006001169T5 (de) 2008-03-06
KR20080011227A (ko) 2008-01-31
JP5079687B2 (ja) 2012-11-21
US7361534B2 (en) 2008-04-22
TW200735263A (en) 2007-09-16
GB2440861B (en) 2010-06-16
KR101201489B1 (ko) 2012-11-14
TWI390666B (zh) 2013-03-21

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