DE10343256A1 - Anordnung zur Herstellung einer elektrischen Verbindung zwischen einem BGA-Package und einer Signalquelle, sowie Verfahren einer solchen Verbindung - Google Patents

Anordnung zur Herstellung einer elektrischen Verbindung zwischen einem BGA-Package und einer Signalquelle, sowie Verfahren einer solchen Verbindung Download PDF

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Publication number
DE10343256A1
DE10343256A1 DE10343256A DE10343256A DE10343256A1 DE 10343256 A1 DE10343256 A1 DE 10343256A1 DE 10343256 A DE10343256 A DE 10343256A DE 10343256 A DE10343256 A DE 10343256A DE 10343256 A1 DE10343256 A1 DE 10343256A1
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DE
Germany
Prior art keywords
bga package
establishing
arrangement
signal source
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE10343256A
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English (en)
Other versions
DE10343256B4 (de
Inventor
Andre Hanke
Stephan Dobritz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Priority to DE10343256A priority Critical patent/DE10343256B4/de
Priority to JP2004266191A priority patent/JP2005091359A/ja
Priority to US10/944,537 priority patent/US7068059B2/en
Publication of DE10343256A1 publication Critical patent/DE10343256A1/de
Application granted granted Critical
Publication of DE10343256B4 publication Critical patent/DE10343256B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/02—Contact members
    • H01R13/22—Contacts for co-operating by abutting
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/04—Housings; Supporting members; Arrangements of terminals
    • G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0433—Sockets for IC's or transistors
    • G01R1/0483—Sockets for un-leaded IC's having matrix type contact fields, e.g. BGA or PGA devices; Sockets for unpackaged, naked chips
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/325—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/118—Printed elements for providing electric connections to or between printed circuits specially for flexible printed circuits, e.g. using folded portions
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2009—Reinforced areas, e.g. for a specific part of a flexible printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16—Inspection; Monitoring; Aligning
    • H05K2203/167—Using mechanical means for positioning, alignment or registration, e.g. using rod-in-hole alignment
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H05K3/4015—Surface contacts, e.g. bumps using auxiliary conductive elements, e.g. pieces of metal foil, metallic spheres

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Metallurgy (AREA)
  • Manufacturing & Machinery (AREA)
  • Connecting Device With Holders (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

Die Erfindung betrifft eine Anordnung zur Herstellung einer elektrischen Verbindung zwischen einem BGA-Package und einer Signalquelle unter Verwendung eines Kontaktsockels mit Führungselementen für das BGA-Package sowie im Kontaktsockel befindlichen Kontaktstrukturen zur elektrischen Kontaktierung der Anschlüsse des BGA-Packages für den BurnIn und den Funktionaltest. Durch die Erfindung soll eine Anordnung zur Herstellung einer elektrischen Verbindung zwischen einem BGA-Package und einer Signalquelle unter Verwendung eines Kontaktsockels mit Führungselementen für das BGA-Package sowie im Kontaktsockel befindlichen Kontaktstrukturen zur elektrischen Kontaktierung der Anschlüsse des BGA-Packages für den BurnIn und den Funktionaltest geschaffen werden, die einfach und kostengünstig hergestellt werden kann. Erfindungsgemäß wird dies dadurch erreicht, dass die Kontaktstrukturen zu einer flexiblen PCB (3) gehören, die Cu-Leitbahnen (9) aufweist, die zwischen flexiblen Kunststoffschichten (7, 8) angeordnet sind, dass sich durch die flexible PCB (3) säulen- oder hülsenförmige Kontaktelemente (5) erstrecken, die mit den Cu-Leitbahnen (9) elektrisch verbunden sind und einseitig nach oben aus einer der Kunststoffschichten (7, 8) hervorstehen.
DE10343256A 2003-09-17 2003-09-17 Anordnung zur Herstellung einer elektrischen Verbindung zwischen einem BGA-Package und einer Signalquelle, sowie Verfahren zum Herstellen einer solchen Verbindung Expired - Fee Related DE10343256B4 (de)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE10343256A DE10343256B4 (de) 2003-09-17 2003-09-17 Anordnung zur Herstellung einer elektrischen Verbindung zwischen einem BGA-Package und einer Signalquelle, sowie Verfahren zum Herstellen einer solchen Verbindung
JP2004266191A JP2005091359A (ja) 2003-09-17 2004-09-14 Ｂｇａパッケージと信号源とを電気的に接続させる装置、および、このように接続させる方法
US10/944,537 US7068059B2 (en) 2003-09-17 2004-09-17 Arrangement for producing an electrical connection between a BGA package and a signal source, and method for producing such a connection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE10343256A DE10343256B4 (de) 2003-09-17 2003-09-17 Anordnung zur Herstellung einer elektrischen Verbindung zwischen einem BGA-Package und einer Signalquelle, sowie Verfahren zum Herstellen einer solchen Verbindung

Publications (2)

Publication Number Publication Date
DE10343256A1 true DE10343256A1 (de) 2005-05-04
DE10343256B4 DE10343256B4 (de) 2006-08-10

Family

ID=34398799

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10343256A Expired - Fee Related DE10343256B4 (de) 2003-09-17 2003-09-17 Anordnung zur Herstellung einer elektrischen Verbindung zwischen einem BGA-Package und einer Signalquelle, sowie Verfahren zum Herstellen einer solchen Verbindung

Country Status (3)

Country Link
US (1) US7068059B2 (de)
JP (1) JP2005091359A (de)
DE (1) DE10343256B4 (de)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005036563A1 (de) * 2005-08-03 2007-02-15 Siemens Ag Elektronisches Bauteil
WO2007054847A2 (en) * 2005-11-09 2007-05-18 Koninklijke Philips Electronics N.V. Method of manufacturing a package carrier for enclosing at least one microelectronic element and method of manufacturing a diagnostic device
DE102010019955A1 (de) * 2010-02-03 2011-08-04 Eutegra Ag, 60325 Elektrische Kontaktiereinrichtung

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* Cited by examiner, † Cited by third party
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JP3999759B2 (ja) * 2004-04-02 2007-10-31 富士通株式会社 基板及び電子機器
CN101063625B (zh) * 2006-04-30 2010-08-11 中芯国际集成电路制造(上海)有限公司 用于测试bga封装的bga封装保持器装置和方法
EP2143173A2 (de) * 2007-04-02 2010-01-13 Gryphics, Inc. Feingängige elektrische verbindungsanordnung
US20100255722A1 (en) * 2007-12-19 2010-10-07 Reinhard Sander Sealed pin header, pin header contact pin and method for providing a sealed electrical connection between electronic devices
TWI368398B (en) * 2008-03-05 2012-07-11 Tse Hsien Yeh Phase lock loop apparatus
TWI403722B (zh) * 2009-07-22 2013-08-01 King Yuan Electronics Co Ltd 具自我清潔之封裝件測試座
CN102435888B (zh) * 2011-10-18 2014-02-12 成都兴业雷安电子有限公司 Spd预期短路电流热稳定热脱扣综合测试台
US9341668B1 (en) * 2014-04-01 2016-05-17 Xilnix, Inc. Integrated circuit package testing
US10739381B2 (en) 2017-05-26 2020-08-11 Tektronix, Inc. Component attachment technique using a UV-cure conductive adhesive
SG11202000790YA (en) * 2017-09-25 2020-02-27 Johnstech Int Corporation High isolation contactor with test pin and housing for integrated circuit testing

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US5808474A (en) * 1994-11-30 1998-09-15 Lsi Logic Corporation Test socket for testing integrated circuit packages
JP2001015227A (ja) * 1999-06-30 2001-01-19 Matsushita Electronics Industry Corp 半導体装置の検査装置
US6330744B1 (en) * 1999-07-12 2001-12-18 Pjc Technologies, Inc. Customized electrical test probe head using uniform probe assemblies
WO2002009194A1 (en) * 2000-07-26 2002-01-31 The Research Foundation Of State University Of New York Method and system for bonding a semiconductor chip onto a carrier using micro-pins
US6416332B1 (en) * 2000-12-20 2002-07-09 Nortel Networks Limited Direct BGA socket for high speed use
US20020121911A1 (en) * 2001-03-02 2002-09-05 Wen-Kun Yang Wafer level probe card
US6468098B1 (en) * 1999-08-17 2002-10-22 Formfactor, Inc. Electrical contactor especially wafer level contactor using fluid pressure
US20030006790A1 (en) * 2001-01-18 2003-01-09 Holcombe Brent A. Method for constructing a flex-rigid laminate probe

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US4554505A (en) * 1983-06-10 1985-11-19 Rockwell International Corporation Test socket for a leadless chip carrier
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DE59609022D1 (de) * 1995-06-15 2002-05-08 Dyconex Patente Ag Zug Verbindungssubstrat
US5931834A (en) * 1996-10-15 1999-08-03 Eclipse Surgical Technologies, Inc. Method for non-synchronous laser-assisted myocardial revascularization
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Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5808474A (en) * 1994-11-30 1998-09-15 Lsi Logic Corporation Test socket for testing integrated circuit packages
JP2001015227A (ja) * 1999-06-30 2001-01-19 Matsushita Electronics Industry Corp 半導体装置の検査装置
US6330744B1 (en) * 1999-07-12 2001-12-18 Pjc Technologies, Inc. Customized electrical test probe head using uniform probe assemblies
US6468098B1 (en) * 1999-08-17 2002-10-22 Formfactor, Inc. Electrical contactor especially wafer level contactor using fluid pressure
WO2002009194A1 (en) * 2000-07-26 2002-01-31 The Research Foundation Of State University Of New York Method and system for bonding a semiconductor chip onto a carrier using micro-pins
US6416332B1 (en) * 2000-12-20 2002-07-09 Nortel Networks Limited Direct BGA socket for high speed use
US20030006790A1 (en) * 2001-01-18 2003-01-09 Holcombe Brent A. Method for constructing a flex-rigid laminate probe
US20020121911A1 (en) * 2001-03-02 2002-09-05 Wen-Kun Yang Wafer level probe card

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005036563A1 (de) * 2005-08-03 2007-02-15 Siemens Ag Elektronisches Bauteil
DE102005036563B4 (de) * 2005-08-03 2007-12-27 Siemens Ag Elektronisches Bauteil
WO2007054847A2 (en) * 2005-11-09 2007-05-18 Koninklijke Philips Electronics N.V. Method of manufacturing a package carrier for enclosing at least one microelectronic element and method of manufacturing a diagnostic device
WO2007054847A3 (en) * 2005-11-09 2007-10-25 Koninkl Philips Electronics Nv Method of manufacturing a package carrier for enclosing at least one microelectronic element and method of manufacturing a diagnostic device
DE102010019955A1 (de) * 2010-02-03 2011-08-04 Eutegra Ag, 60325 Elektrische Kontaktiereinrichtung

Also Published As

Publication number Publication date
US20050085105A1 (en) 2005-04-21
DE10343256B4 (de) 2006-08-10
US7068059B2 (en) 2006-06-27
JP2005091359A (ja) 2005-04-07

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