DE10311855B4 - Anordnung zum Übertragen von Informationen/Strukturen auf Wafer unter Verwendung eines Stempels - Google Patents

Anordnung zum Übertragen von Informationen/Strukturen auf Wafer unter Verwendung eines Stempels Download PDF

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Publication number
DE10311855B4
DE10311855B4 DE10311855A DE10311855A DE10311855B4 DE 10311855 B4 DE10311855 B4 DE 10311855B4 DE 10311855 A DE10311855 A DE 10311855A DE 10311855 A DE10311855 A DE 10311855A DE 10311855 B4 DE10311855 B4 DE 10311855B4
Authority
DE
Germany
Prior art keywords
stamp
wafers
structures
arrangement
transferring information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE10311855A
Other languages
English (en)
Other versions
DE10311855A1 (de
Inventor
Jens Staecker
Jens Bruch
Heiko Hommen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Polaris Innovations Ltd
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Priority to DE10311855A priority Critical patent/DE10311855B4/de
Priority to US10/802,618 priority patent/US7401549B2/en
Publication of DE10311855A1 publication Critical patent/DE10311855A1/de
Application granted granted Critical
Publication of DE10311855B4 publication Critical patent/DE10311855B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C99/00Subject matter not provided for in other groups of this subclass
    • B81C99/0075Manufacture of substrate-free structures
    • B81C99/009Manufacturing the stamps or the moulds
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00Manufacture or treatment of nanostructures
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0002Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Nanotechnology (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
DE10311855A 2003-03-17 2003-03-17 Anordnung zum Übertragen von Informationen/Strukturen auf Wafer unter Verwendung eines Stempels Expired - Fee Related DE10311855B4 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE10311855A DE10311855B4 (de) 2003-03-17 2003-03-17 Anordnung zum Übertragen von Informationen/Strukturen auf Wafer unter Verwendung eines Stempels
US10/802,618 US7401549B2 (en) 2003-03-17 2004-03-17 Arrangement for transferring information/structures to wafers

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE10311855A DE10311855B4 (de) 2003-03-17 2003-03-17 Anordnung zum Übertragen von Informationen/Strukturen auf Wafer unter Verwendung eines Stempels

Publications (2)

Publication Number Publication Date
DE10311855A1 DE10311855A1 (de) 2004-10-14
DE10311855B4 true DE10311855B4 (de) 2005-04-28

Family

ID=32980612

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10311855A Expired - Fee Related DE10311855B4 (de) 2003-03-17 2003-03-17 Anordnung zum Übertragen von Informationen/Strukturen auf Wafer unter Verwendung eines Stempels

Country Status (2)

Country Link
US (1) US7401549B2 (de)
DE (1) DE10311855B4 (de)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006019962A1 (de) * 2006-04-28 2007-11-08 Infineon Technologies Ag Imprint-Maske und Verfahren zum Ausrichten der Imprint-Maske
DE102008033903A1 (de) 2008-07-18 2010-01-21 Suss Microtec Test Systems Gmbh Vorrichtung und Verfahren zur Montage mehrerer Halbleiterbauelemente auf einem Zielsubstrat

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US7162810B2 (en) * 2004-08-11 2007-01-16 Intel Corporation Micro tool alignment apparatus and method
KR100647314B1 (ko) * 2005-01-31 2006-11-23 삼성전자주식회사 나노 임프린트 리소그래피용 정렬시스템 및 이를 채용한임프린트 리소그래피 방법
JP4290177B2 (ja) 2005-06-08 2009-07-01 キヤノン株式会社 モールド、アライメント方法、パターン形成装置、パターン転写装置、及びチップの製造方法
ATE549294T1 (de) * 2005-12-09 2012-03-15 Obducat Ab Vorrichtung und verfahren zum transfer von mustern mit zwischenstempel
JP5002523B2 (ja) * 2008-04-25 2012-08-15 日立オートモティブシステムズ株式会社 燃料の圧力脈動低減機構、及びそれを備えた内燃機関の高圧燃料供給ポンプ
US20100092599A1 (en) * 2008-10-10 2010-04-15 Molecular Imprints, Inc. Complementary Alignment Marks for Imprint Lithography
EP2199855B1 (de) * 2008-12-19 2016-07-20 Obducat Verfahren und Prozesse zur Modifizierung von Polymermaterialoberflächeninteraktionen
EP2199854B1 (de) * 2008-12-19 2015-12-16 Obducat AB Hybridpolymerform für nanoimprintverfahren und verfahren zu seiner herstellung
JP2010251360A (ja) * 2009-04-10 2010-11-04 Sony Corp 表示装置の製造方法および表示装置
TWI630374B (zh) * 2009-04-27 2018-07-21 美商品譜公司 快速驗證精密元件之公差之裝置
US20110151114A1 (en) * 2009-12-18 2011-06-23 Cooledge Lighting, Inc. Composite patterning device and method for removing elements from host substrate by establishing conformal contact between device and a contact surface
CN103513836A (zh) * 2012-06-28 2014-01-15 北儒精密股份有限公司 低色差触控面板的对位辨识方法
US20150037915A1 (en) * 2013-07-31 2015-02-05 Wei-Sheng Lei Method and system for laser focus plane determination in a laser scribing process
CN107077065B (zh) * 2014-09-22 2020-10-30 皇家飞利浦有限公司 传递方法和装置以及计算机程序产品
US20170084490A1 (en) * 2015-09-18 2017-03-23 Stmicroelectronics, Inc. Method for making ic with stepped sidewall and related ic devices

Citations (3)

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Publication number Priority date Publication date Assignee Title
US20020115002A1 (en) * 2000-10-12 2002-08-22 Todd Bailey Template for room temperature, low pressure micro-and nano-imprint lithography
US20020170880A1 (en) * 2001-03-22 2002-11-21 Yong Chen Scanning probe based lithographic alignment
WO2004013693A2 (en) * 2002-08-01 2004-02-12 Molecular Imprints, Inc. Scatterometry alignment for imprint lithography

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JP2890882B2 (ja) * 1990-04-06 1999-05-17 キヤノン株式会社 位置付け方法、半導体デバイスの製造方法及びそれを用いた投影露光装置
NL9100215A (nl) * 1991-02-07 1992-09-01 Asm Lithography Bv Inrichting voor het repeterend afbeelden van een maskerpatroon op een substraat.
US5243195A (en) * 1991-04-25 1993-09-07 Nikon Corporation Projection exposure apparatus having an off-axis alignment system and method of alignment therefor
US5414514A (en) * 1993-06-01 1995-05-09 Massachusetts Institute Of Technology On-axis interferometric alignment of plates using the spatial phase of interference patterns
JPH08243880A (ja) * 1994-12-07 1996-09-24 Us Amada Ltd 刻印装置を備えた工作機械
US6342941B1 (en) * 1996-03-11 2002-01-29 Nikon Corporation Exposure apparatus and method preheating a mask before exposing; a conveyance method preheating a mask before exposing; and a device manufacturing system and method manufacturing a device according to the exposure apparatus and method
US5866281A (en) * 1996-11-27 1999-02-02 Wisconsin Alumni Research Foundation Alignment method for multi-level deep x-ray lithography utilizing alignment holes and posts
US6707545B1 (en) * 1999-09-07 2004-03-16 Applied Materials, Inc. Optical signal routing method and apparatus providing multiple inspection collection points on semiconductor manufacturing systems
JP3802309B2 (ja) * 2000-03-28 2006-07-26 株式会社アドテックエンジニアリング 多層回路基板製造における位置合わせ装置及び露光装置
JP2001274080A (ja) * 2000-03-28 2001-10-05 Canon Inc 走査型投影露光装置及びその位置合わせ方法
JP3631956B2 (ja) * 2000-05-12 2005-03-23 富士通株式会社 半導体チップの実装方法
JP2002050560A (ja) * 2000-08-02 2002-02-15 Nikon Corp ステージ装置、計測装置及び計測方法、露光装置及び露光方法
US7196782B2 (en) * 2000-09-20 2007-03-27 Kla-Tencor Technologies Corp. Methods and systems for determining a thin film characteristic and an electrical property of a specimen
JP4618859B2 (ja) * 2000-10-10 2011-01-26 東レエンジニアリング株式会社 積層ウエハーのアライメント方法
US6579738B2 (en) * 2000-12-15 2003-06-17 Micron Technology, Inc. Method of alignment for buried structures formed by surface transformation of empty spaces in solid state materials
US6635941B2 (en) * 2001-03-21 2003-10-21 Canon Kabushiki Kaisha Structure of semiconductor device with improved reliability
US7027156B2 (en) 2002-08-01 2006-04-11 Molecular Imprints, Inc. Scatterometry alignment for imprint lithography
US7070405B2 (en) 2002-08-01 2006-07-04 Molecular Imprints, Inc. Alignment systems for imprint lithography
US6916584B2 (en) 2002-08-01 2005-07-12 Molecular Imprints, Inc. Alignment methods for imprint lithography
US6811938B2 (en) * 2002-08-29 2004-11-02 Eastman Kodak Company Using fiducial marks on a substrate for laser transfer of organic material from a donor to a substrate
US6975040B2 (en) * 2003-10-28 2005-12-13 Agere Systems Inc Fabricating semiconductor chips

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Publication number Priority date Publication date Assignee Title
US20020115002A1 (en) * 2000-10-12 2002-08-22 Todd Bailey Template for room temperature, low pressure micro-and nano-imprint lithography
WO2002067055A2 (en) * 2000-10-12 2002-08-29 Board Of Regents, The University Of Texas System Template for room temperature, low pressure micro- and nano-imprint lithography
US20020170880A1 (en) * 2001-03-22 2002-11-21 Yong Chen Scanning probe based lithographic alignment
WO2004013693A2 (en) * 2002-08-01 2004-02-12 Molecular Imprints, Inc. Scatterometry alignment for imprint lithography

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
DENG, Y., NEUREUTHER A.R.: Simulation of exposure and alignment for nano-imprint lithography, in: Proceedings of the SPIE, The International Societyfor Optical Engineering, USA, 2002, Vol. 4688, No. 1-2, S. 842-849 *
WHITE D.L., WOOD O.R.: Novel alignment system for imprint lithography, in: J. Vac. Sci. Technol. B, 2000, Vol. 18, No. 6, S. 3552-3556 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006019962A1 (de) * 2006-04-28 2007-11-08 Infineon Technologies Ag Imprint-Maske und Verfahren zum Ausrichten der Imprint-Maske
DE102008033903A1 (de) 2008-07-18 2010-01-21 Suss Microtec Test Systems Gmbh Vorrichtung und Verfahren zur Montage mehrerer Halbleiterbauelemente auf einem Zielsubstrat

Also Published As

Publication number Publication date
US20040219803A1 (en) 2004-11-04
DE10311855A1 (de) 2004-10-14
US7401549B2 (en) 2008-07-22

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: QIMONDA AG, 81739 MUENCHEN, DE

R081 Change of applicant/patentee

Owner name: INFINEON TECHNOLOGIES AG, DE

Free format text: FORMER OWNER: QIMONDA AG, 81739 MUENCHEN, DE

Owner name: POLARIS INNOVATIONS LTD., IE

Free format text: FORMER OWNER: QIMONDA AG, 81739 MUENCHEN, DE

R081 Change of applicant/patentee

Owner name: POLARIS INNOVATIONS LTD., IE

Free format text: FORMER OWNER: INFINEON TECHNOLOGIES AG, 85579 NEUBIBERG, DE

R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee