CS251055B2 - Clock signals checking connection in digital information system - Google Patents

Clock signals checking connection in digital information system Download PDF

Info

Publication number
CS251055B2
CS251055B2 CS766293A CS629376A CS251055B2 CS 251055 B2 CS251055 B2 CS 251055B2 CS 766293 A CS766293 A CS 766293A CS 629376 A CS629376 A CS 629376A CS 251055 B2 CS251055 B2 CS 251055B2
Authority
CS
Czechoslovakia
Prior art keywords
control
registers
clock
shift registers
clock signals
Prior art date
Application number
CS766293A
Other languages
Czech (cs)
English (en)
Inventor
Jens E Pehrson
Sture G Roos
Bartolo Valastro
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Publication of CS251055B2 publication Critical patent/CS251055B2/cs

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751Error or fault detection not based on redundancy
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/003Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation in serial memories

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Dc Digital Transmission (AREA)
  • Manipulation Of Pulses (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)
  • Alarm Systems (AREA)
  • Detection And Correction Of Errors (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Selective Calling Equipment (AREA)
CS766293A 1975-09-29 1976-09-29 Clock signals checking connection in digital information system CS251055B2 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
AUPC336475 1975-09-29

Publications (1)

Publication Number Publication Date
CS251055B2 true CS251055B2 (en) 1987-06-11

Family

ID=3766383

Family Applications (1)

Application Number Title Priority Date Filing Date
CS766293A CS251055B2 (en) 1975-09-29 1976-09-29 Clock signals checking connection in digital information system

Country Status (25)

Country Link
US (1) US4081662A (nl)
JP (1) JPS5930288B2 (nl)
AR (1) AR212340A1 (nl)
BE (1) BE846703A (nl)
BR (1) BR7606344A (nl)
CA (1) CA1074020A (nl)
CH (1) CH607460A5 (nl)
CS (1) CS251055B2 (nl)
DD (1) DD126299A5 (nl)
DE (1) DE2641700A1 (nl)
DK (1) DK153605C (nl)
EG (1) EG13396A (nl)
ES (1) ES451922A1 (nl)
FI (1) FI64474C (nl)
FR (1) FR2326080A1 (nl)
GB (1) GB1527167A (nl)
HU (1) HU174136B (nl)
IN (1) IN146507B (nl)
IT (1) IT1072928B (nl)
MY (1) MY8100229A (nl)
NL (1) NL187136C (nl)
NO (1) NO147199C (nl)
PL (1) PL108782B1 (nl)
SU (1) SU1109073A3 (nl)
YU (1) YU37408B (nl)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4095045A (en) * 1977-01-19 1978-06-13 General Datacomm Industries, Inc. Method and apparatus for signaling in a communication system
DE3317642A1 (de) * 1982-05-21 1983-11-24 International Computers Ltd., London Datenverarbeitungseinrichtung
FR2553559B1 (fr) * 1983-10-14 1988-10-14 Citroen Sa Controle du chargement de circuits integres du type registre serie parallele ayant un registre de chargement distinct des etages de sortie
US4542509A (en) * 1983-10-31 1985-09-17 International Business Machines Corporation Fault testing a clock distribution network
US4653054A (en) * 1985-04-12 1987-03-24 Itt Corporation Redundant clock combiner
US4800564A (en) * 1986-09-29 1989-01-24 International Business Machines Corporation High performance clock system error detection and fault isolation
EP0294505B1 (en) * 1987-06-11 1993-03-03 International Business Machines Corporation Clock generator system
DE8816680U1 (de) * 1988-02-18 1990-04-19 Dr. Johannes Heidenhain Gmbh, 83301 Traunreut Positionsmeßeinrichtung mit einer Schaltungsanordnung zur Erkennung von Störsignalen
US5077739A (en) * 1989-05-17 1991-12-31 Unisys Corporation Method for isolating failures of clear signals in instruction processors
DE19923231C1 (de) * 1999-05-20 2001-01-11 Beta Res Gmbh Digitale Analysierung von Frequenzen bei Chipkarten
US9115870B2 (en) * 2013-03-14 2015-08-25 Cree, Inc. LED lamp and hybrid reflector
US9897651B2 (en) * 2016-03-03 2018-02-20 Qualcomm Incorporated Ultra-fast autonomous clock monitoring circuit for safe and secure automotive applications

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE197047C1 (nl) *
US3056108A (en) * 1959-06-30 1962-09-25 Internat Bushiness Machines Co Error check circuit
US3176269A (en) * 1962-05-28 1965-03-30 Ibm Ring counter checking circuit
DE1537379C3 (de) * 1967-09-22 1980-07-03 Siemens Ag, 1000 Berlin Und 8000 Muenchen Sicherheitsschaltung zum Durchführen logischer Verknüpfungen für binäre Schaltvariable und deren antivalente Schaltvariable
US3659088A (en) * 1970-08-06 1972-04-25 Cogar Corp Method for indicating memory chip failure modes
US3805152A (en) * 1971-08-04 1974-04-16 Ibm Recirculating testing methods and apparatus
US3815025A (en) * 1971-10-18 1974-06-04 Ibm Large-scale integrated circuit testing structure
US3789205A (en) * 1972-09-28 1974-01-29 Ibm Method of testing mosfet planar boards
US3761695A (en) * 1972-10-16 1973-09-25 Ibm Method of level sensitive testing a functional logic system
US3961252A (en) * 1974-12-20 1976-06-01 International Business Machines Corporation Testing embedded arrays

Also Published As

Publication number Publication date
NO147199C (no) 1983-02-16
DE2641700A1 (de) 1977-04-07
YU232476A (en) 1983-04-27
NL7610427A (nl) 1977-03-31
PL108782B1 (en) 1980-04-30
NO147199B (no) 1982-11-08
NL187136B (nl) 1991-01-02
DK153605B (da) 1988-08-01
FI64474C (fi) 1983-11-10
NO763310L (nl) 1977-03-30
DD126299A5 (nl) 1977-07-06
JPS5243335A (en) 1977-04-05
FR2326080B1 (nl) 1982-12-03
FR2326080A1 (fr) 1977-04-22
SU1109073A3 (ru) 1984-08-15
ES451922A1 (es) 1977-09-01
YU37408B (en) 1984-08-31
DK153605C (da) 1988-12-19
HU174136B (hu) 1979-11-28
IT1072928B (it) 1985-04-13
MY8100229A (en) 1981-12-31
BR7606344A (pt) 1977-05-31
EG13396A (en) 1981-03-31
IN146507B (nl) 1979-06-23
JPS5930288B2 (ja) 1984-07-26
AR212340A1 (es) 1978-06-30
NL187136C (nl) 1991-06-03
FI64474B (fi) 1983-07-29
BE846703A (fr) 1977-01-17
US4081662A (en) 1978-03-28
GB1527167A (en) 1978-10-04
CH607460A5 (nl) 1978-12-29
DK436276A (da) 1977-03-30
CA1074020A (en) 1980-03-18
FI762704A (nl) 1977-03-30
DE2641700C2 (nl) 1987-10-29

Similar Documents

Publication Publication Date Title
US4688222A (en) Built-in parallel testing circuit for use in a processor
Hitchcock et al. Timing analysis of computer hardware
EP0006328B1 (en) System using integrated circuit chips with provision for error detection
CA1089031A (en) Level sensitive embedded array logic system
EP0130610B1 (en) System data path stressing
JP2590294B2 (ja) 回路ボードテストシステムとテストベクトル供給システム及び生成方法
US5001712A (en) Diagnostic error injection for a synchronous bus system
CA1126413A (en) Method and arrangement of testing sequential circuits represented by monolithically integrated semiconductor circuits
CS251055B2 (en) Clock signals checking connection in digital information system
JPH0281216A (ja) データ処理システム
US4879718A (en) Scan data path coupling
US4727548A (en) On-line, limited mode, built-in fault detection/isolation system for state machines and combinational logic
EP1776596B1 (en) Testing of a circuit that has an asynchronous timing circuit
EP0280848B1 (en) On-chip on-line ac and dc clock tree error detection system
US6618827B1 (en) System and method for parallel testing of IEEE 1149.1 compliant integrated circuits
US4507784A (en) Data processing systems
KR870000114B1 (ko) 데이타 처리 시스템
US6715093B1 (en) Method for triggering an asynchronous event by creating a lowest common denominator clock
JPH07113657B2 (ja) 発振器の縮退故障を特定する方法及び装置
EP0145866A2 (en) Test and maintenance system and method for a data processing system
US3649963A (en) Error detection arrangement for register-to-register data transmission
US4278898A (en) Frequency comparator for electronic clocks
JPH0320683A (ja) 集積回路の事象認定試験アーキテクチャ
US4462029A (en) Command bus
GB2120818A (en) Data processing systems