CN2938652Y - Detection circuit for port signal - Google Patents
Detection circuit for port signal Download PDFInfo
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- CN2938652Y CN2938652Y CN 200620088418 CN200620088418U CN2938652Y CN 2938652 Y CN2938652 Y CN 2938652Y CN 200620088418 CN200620088418 CN 200620088418 CN 200620088418 U CN200620088418 U CN 200620088418U CN 2938652 Y CN2938652 Y CN 2938652Y
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Abstract
The utility model discloses a port signal detection circuit, comprising a detection unit which detects the availability of the port input signal in real time and exports analog electric signals with different potentials according to detection result; a retention unit which receives the analog electric signals from the detection unit and maintains the potential status of the analog electric signal received for a certain period; an output unit which exports the detection result of the port status to a master system according to the potential status of the retention unit. The utility model detects the status of the input signals from each port of the television set, converts the detection result into digital signals and transmits the digital signals to the master system in real time, providing a basis of port switching for the master system. Thus, the utility model not only realizes the automatic detection function of the television set to the port signals, but also makes the selection of different signal sources easier for the user, avoiding the trouble that the user has to check each port signal one by one and saving the operating time.
Description
Technical field
The utility model belongs to the testing circuit technical field, specifically, relates to a kind of circuit of automatic detection television set port input state.
Background technology
Rise along with panel TV, before television function has surmounted far away can only TV reception stage, various interfaces more and more are integrated on the television set, comprise AV port, S port, SPDIF port, Y/PB/PR port, VGA port, HDMI port etc., make television set can export vision signal from the unlike signal source.How increasing along with port makes television set can automatically switch the information resources of various port, watches with the selection that makes things convenient for the consumer, is that present television set is made industry and is badly in need of one of subject matter that solves.
Summary of the invention
The utility model is in order to solve the problem that television set in the prior art can not automatically switch to its port signal, a kind of novel port signal testing circuit is provided, by simple circuit configuration having or not in real time of each port input signal of television set detected, and the testing result of each passage changed into digital signal, be real-time transmitted in the main system circuit, come the signal source of each port is switched output by main system, thereby made things convenient for the consumer that the selection of different port information is watched.
For solving the problems of the technologies described above, the utility model is achieved by the following technical solutions:
A kind of port signal testing circuit comprises: detecting unit having or not in real time of port input signal detected, and output has the analog electrical signal of different potentials according to testing result; Holding unit receives the analog electrical signal that detecting unit is exported, and the potential state of received analog electrical signal was kept in a period of time; Output unit is according to the potential state of holding unit, to master control system output port status detection result.
Consider that processor receives digital signal is convenient in the master control system, therefore, described output unit is according to the potential state of holding unit, generate the testing result corresponding digital signal represented with it, and then be transferred to wherein one road I/O mouth of processor in the master control system, to make things convenient for reception and the processing of processor to testing result.
Finishing the particular circuit configurations that the described function of detecting unit adopted in the utility model is: include a switching circuit in described detecting unit, the control end of described switching circuit receives the input signal from port, and, carry out having the analog electrical signal of different potentials to described holding unit output according to the break-make of controlling described switching circuit that has or not of input signal.Wherein, described switching circuit adopts a NPN type triode to realize that the base stage of described triode connects described port through coupling capacitance, grounded emitter, and collector electrode connects a direct current power supply on the one hand, connects described holding unit on the other hand.In order to control the on off operating mode of NPN type triode, the base stage one tunnel of described NPN type triode connects described DC power supply through first biasing resistor, another road second biasing resistor ground connection.
Finishing the particular circuit configurations that the described function of holding unit adopted in the utility model is: include a switching diode and a storage capacitor in described holding unit, the anode of described switching diode connects the collector electrode of described NPN type triode, negative electrode is on the one hand through bleeder resistance ground connection, on the other hand through described storage capacitor ground connection.In order to eliminate the High-frequency Interference in the circuit, the negative electrode of described switching diode is also by a filter capacitor ground connection.
Finishing the particular circuit configurations that the described function of output unit adopted in the utility model is: include a switching circuit in described output circuit, the control end of described switching circuit connects the output of described holding unit, and, carry out to described master control system output high level or low level signal according to the break-make of the described switching circuit of height State Control of holding unit output potential.Wherein, described switching circuit adopts a NPN type triode to realize that the base stage of described triode connects the negative electrode of described switching diode, grounded emitter, collector electrode connects described DC power supply on the one hand, connects wherein one road I/O mouth of processor in the described master control system on the other hand.
Compared with prior art, advantage of the present utility model and good effect are: the utility model detects by the state to the input signal of each port of television set, and convert testing result to digital signal and be real-time transmitted in the master control system, the foundation of port switching is provided for master control system, not only realized the automatic measuring ability of television set to port signal, and made things convenient for the user that the selection in unlike signal source is watched, the trouble of having avoided the user that having or not of each port signal watched has one by one been saved the operating time.By adopting the design of holding circuit, can effectively prevent error detection, avoid the generation of user misoperation.The port signal testing circuit that the utility model proposed is simple in structure, and cost is lower, and the parameter matching of various elements is fairly simple, and power consumption is less, can finish the switching output of each passage reliably.
Description of drawings
Fig. 1 is the schematic diagram of the utility model middle port signal deteching circuit.
Embodiment
Below in conjunction with the drawings and specific embodiments the utility model is done explanation in further detail.
The utility model has proposed a kind of port signal testing circuit of being made up of detecting unit, holding unit and output unit three parts in order to realize the automatic measuring ability of each port signal of television set.Wherein, detecting unit detected having or not in real time of port input signal, and exported the analog electrical signal with different potentials according to testing result; Holding unit receives the analog electrical signal of detecting unit output, and the potential state of received analog electrical signal was kept in a period of time; Output unit according to the potential state of holding unit, generates the testing result corresponding digital signal represented with it, and then is transferred to wherein one road I/O mouth of processor in the master control system, to make things convenient for reception and the processing of processor to testing result.The particular circuit configurations of described detecting unit, holding unit and output unit is referring to shown in Figure 1.
Fig. 1 is an embodiment of the present utility model, is a kind of testing circuit that is used in the high-definition signal passage.YPbPr2_DET is the input of high-definition signal among the figure, and DET_YPbPr2 is the output of detection signal.The YPbPr2_DET input connects base stage as the NPN type triode Q33 of switch element through coupling capacitance C1010, its grounded emitter, and collector electrode connects DC power supply VCCH_33 through resistance R 1054.In order to control the conducting state of triode Q33, the base stage of described triode Q33 connects DC power supply VCCH_33 through biasing resistor R1053, and, when the YPbPr2_DET input has the signal source input, make triode Q33 be in the lightly conducting state through biasing resistor R1060 ground connection.Switching diode D30 and storage capacitor TC64 form signal holding circuit.Wherein, the anode of switching diode D30 connects the collector electrode of triode Q33, and negative electrode is on the one hand through bleeder resistance R1059 ground connection, on the other hand through described storage capacitor TC64 ground connection.In order to eliminate the High-frequency Interference in the circuit, the negative electrode of described switching diode D30 is also by a filter capacitor C1011 ground connection, to realize the stable of output voltage waveforms.In described output circuit, also include a NPN type triode Q32 as switch element, its base stage connects the negative electrode of switching diode D30, grounded emitter, collector electrode connects DC power supply VCCH_33 through resistance R 1052 on the one hand, connect described DET_YPbPr2 output on the other hand, and then to master control system output high level or low level digital detection signal.
When the YPbPr2_DET input did not have the signal source input, triode Q33 ended, and DC power supply VCCH_33 charges to storage capacitor TC64 by resistance R 1054 and switching diode D30.At this moment, triode Q32 is in conducting state, to master control system output low level detection signal.When the YPbPr2_DET input has the signal source input, triode Q33 conducting, the anode potential of switching diode D30 is dragged down, and switching diode D30 oppositely ends, and storage capacitor TC64 discharges over the ground by bleeder resistance R1059.When voltage be reduced to make triode Q32 by the time, DC power supply VCCH_33 by resistance R 1052 through the DET_YPbPr2 output to master control system output high level detection signal.The velocity of discharge of storage capacitor TC64 can be regulated by the resistance of regulating discharge resistance R1059, and then can control the time that triode Q32 time-delay ends.The detected status input signal of testing circuit is kept a period of time, can effectively prevent error detection, thereby avoid the user that misoperation takes place.
The port testing circuit that the utility model proposed is simple in structure, highly versatile, can expand in other similar port testing circuits and be used, for the user provides greatly convenient, the operating time of effectively having saved the user to the accurate selection of different port signal source.Certainly; above-mentioned explanation is not to be to restriction of the present utility model; the utility model also is not limited in above-mentioned giving an example, and variation, remodeling, interpolation or replacement that those skilled in the art are made in essential scope of the present utility model also should belong to protection range of the present utility model.
Claims (10)
1. port signal testing circuit is characterized in that: comprise in described testing circuit:
Detecting unit detected having or not in real time of port input signal, and output has the analog electrical signal of different potentials according to testing result;
Holding unit receives the analog electrical signal that detecting unit is exported, and the potential state of received analog electrical signal was kept in a period of time;
Output unit is according to the potential state of holding unit, to master control system output port status detection result.
2. port signal testing circuit according to claim 1 is characterized in that: described output unit generates the testing result corresponding digital signal represented with it, and then is transferred in the master control system according to the potential state of holding unit.
3. port signal testing circuit according to claim 1 and 2, it is characterized in that: in described detecting unit, include a switching circuit, the control end of described switching circuit receives the input signal from port, and, carry out having the analog electrical signal of different potentials to described holding unit output according to the break-make of controlling described switching circuit that has or not of input signal.
4. port signal testing circuit according to claim 3, it is characterized in that: described switching circuit adopts a NPN type triode to realize, the base stage of described triode connects described port through coupling capacitance, grounded emitter, collector electrode connects a direct current power supply on the one hand, connects described holding unit on the other hand.
5. port signal testing circuit according to claim 4 is characterized in that: the base stage one tunnel of described NPN type triode connects described DC power supply through first biasing resistor, another road second biasing resistor ground connection.
6. port signal testing circuit according to claim 3, it is characterized in that: in described holding unit, include a switching diode and a storage capacitor, the anode of described switching diode connects the collector electrode of described NPN type triode, negative electrode is on the one hand through bleeder resistance ground connection, on the other hand through described storage capacitor ground connection.
7. port signal testing circuit according to claim 6, it is characterized in that: in described output circuit, include a switching circuit, the control end of described switching circuit connects the output of described holding unit, and, carry out to described master control system output high level or low level signal according to the break-make of the described switching circuit of height State Control of holding unit output potential.
8. port signal testing circuit according to claim 7, it is characterized in that: described switching circuit adopts a NPN type triode to realize, the base stage of described triode connects the negative electrode of described switching diode, grounded emitter, collector electrode connects described DC power supply on the one hand, connects described master control system on the other hand.
9. according to claim 6 or 7 described port signal testing circuits, it is characterized in that: the negative electrode of described switching diode is by a filter capacitor ground connection.
10. port signal testing circuit according to claim 7 is characterized in that: the output of described output circuit connects wherein one road I/O mouth of processor in the master control system.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200620088418 CN2938652Y (en) | 2006-08-23 | 2006-08-23 | Detection circuit for port signal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200620088418 CN2938652Y (en) | 2006-08-23 | 2006-08-23 | Detection circuit for port signal |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2938652Y true CN2938652Y (en) | 2007-08-22 |
Family
ID=38362680
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200620088418 Expired - Fee Related CN2938652Y (en) | 2006-08-23 | 2006-08-23 | Detection circuit for port signal |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2938652Y (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102780478A (en) * | 2012-06-06 | 2012-11-14 | 江苏中科天安智联科技有限公司 | Vehicle-mounted keying circuit structure |
| CN104641578A (en) * | 2014-11-25 | 2015-05-20 | 索尔思光电（成都）有限公司 | Direct-current level detection circuit between high-speed signal line ports, system comprising the circuit and manufacturing method and application method thereof |
-
2006
- 2006-08-23 CN CN 200620088418 patent/CN2938652Y/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102780478A (en) * | 2012-06-06 | 2012-11-14 | 江苏中科天安智联科技有限公司 | Vehicle-mounted keying circuit structure |
| CN102780478B (en) * | 2012-06-06 | 2014-11-19 | 江苏中科天安智联科技有限公司 | Vehicle-mounted keying circuit structure |
| CN104641578A (en) * | 2014-11-25 | 2015-05-20 | 索尔思光电（成都）有限公司 | Direct-current level detection circuit between high-speed signal line ports, system comprising the circuit and manufacturing method and application method thereof |
| CN104641578B (en) * | 2014-11-25 | 2017-05-10 | 索尔思光电（成都）有限公司 | Direct-current level detection circuit, system comprising the circuit and manufacturing method and application method |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20070822 Termination date: 20110823 |