CN2872753Y - Network failure protection connecting structure - Google Patents
Network failure protection connecting structure Download PDFInfo
- Publication number
- CN2872753Y CN2872753Y CN 200520036758 CN200520036758U CN2872753Y CN 2872753 Y CN2872753 Y CN 2872753Y CN 200520036758 CN200520036758 CN 200520036758 CN 200520036758 U CN200520036758 U CN 200520036758U CN 2872753 Y CN2872753 Y CN 2872753Y
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- Prior art keywords
- bus
- holding wire
- transceiver
- resistor
- signal line
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Abstract
The utility model discloses a network failure protective connection structure, and relates to communication technology, in particular to the protective technology of bus network. The utility model comprises a bus, a transceiver connected into the bus, and a bias resistor connected with each signal line of the bus. The utility model is characterized in: for transceiver close to connection point, its terminal connected with the connection point is connected with signal line via attenuation resistance. The utility model has the advantages of reliable signal recognition capability and reduced interference among connection points.
Description
Technical field
The utility model relates to the communication technology, particularly the resist technology of bus-network.
Background technology
RS-422 and RS-485 standard have stipulated that all the receiver thresholding is ± 200mV.Regulation can provide than higher noise inhibiting ability like this, and the relative pressure between receiver A, B is+when 200mV is above, be output as positive logic, otherwise, then be output as negative logic.But because the existence of elicit illness state, promptly when main frame after transmitting terminal distributes an information data, bus is placed elicit illness state, be that bus drives bus without any signal during the free time, make between A, the B voltage-200mV～+ 200mV is until being tending towards 0V, this has brought a problem: the receiver output state is uncertain.If receiver is output as 0V, slave will be interpreted as a new start bit to it in the network, and attempt to read subsequent byte, owing to have position of rest never, produce a frame error result, no longer include the device request bus, and network is in paralyzed state.Except that the above-mentioned described bus free time can cause two line voltage differences to be lower than the situation of 200mV, also this situation can appear when open circuit or short circuit.So should take certain measure to avoid receiver to be in nondeterministic statement.Normally on bus, be biased, when bus during idle or open circuit, utilize biasing resistor that bus is biased in a definite state (differential voltage 〉=200mV).As Fig. 1.To move on the A+5V, B pulls down to ground.Owing to use these advantages of biasing resistor, so a lot of RS-422 and RS-485 design and use person have adopted this method at each contact, as Fig. 2.
The deficiencies in the prior art part is, the individual character difference phase mutual interference on the contrary on each contact between the power supply, thus influenced the signal quality of communication.And because each connection point power itself has certain internal resistance, and the internal resistance of power supply is general all less than the internal resistance of interface chip, has reduced the impedance of whole bus so again.The impedance that has reduced bus has also just reduced the load capacity of bus, has just reduced the contact number that can connect on the bus.
The utility model content
Technical problem to be solved in the utility model is, a kind of network failure protection syndeton is provided, and reliable code distinguishability is not only arranged, and can also reduce the phase mutual interference between each contact.
The technical scheme that the utility model solve the technical problem employing is; network failure protection syndeton; the transceiver that comprises bus and access bus; each holding wire of bus connects biasing resistor respectively; it is characterized in that the terminal that is connected with tie point at the transceiver near the position at tie point place is connected with holding wire by damping resistance.
Further, described network is the RS485 bus network, and at the head end of its bus, first holding wire is connected to pull-up resistor, and the secondary signal line is connected to pull down resistor, and two terminals that are positioned at the transceiver of head end insert bus by resistance.
Perhaps, at the head end of its bus, first holding wire is connected to pull-up resistor, is serially connected with resistance on the transceiver that is positioned at head end and the terminal that first holding wire is connected; At the end of its bus, the secondary signal line is connected to pull down resistor, is positioned on terminal transceiver and the terminal that the secondary signal line is connected to be serially connected with resistance.
Perhaps, at the two ends of its bus, first holding wire is connected to pull-up resistor, and the secondary signal line is connected to pull down resistor, and two terminals that are positioned at the transceiver at two ends insert bus by resistance.
Perhaps, described network is the RS422 bus network, and at the head end of its bus, first holding wire and the 4th holding wire are connected to pull-up resistor, secondary signal line and the 3rd holding wire are connected to pull down resistor, and four terminals that are positioned at the transceiver of head end insert bus by resistance respectively.
Perhaps, at the two ends of its bus, first holding wire and the 4th holding wire are connected to pull-up resistor, and secondary signal line and the 3rd holding wire are connected to pull down resistor, and four terminals that are positioned at the transceiver at two ends insert bus by resistance respectively.
Aforementioned head end, terminal only definition voluntarily for ease of the two ends of distinguishing bus.
The beneficial effects of the utility model are that having has reliable code distinguishability, and has reduced the phase mutual interference between each contact.
Below in conjunction with the drawings and specific embodiments the utility model is further described.
Description of drawings
Fig. 1-2 is the background technology schematic diagram.
Fig. 3 (a) is the schematic diagram of embodiment 1.Fig. 3 (b) is the schematic diagram of embodiment 2.
Fig. 4 (a) is the schematic diagram of embodiment 3.Fig. 4 (b) is the schematic diagram of embodiment 4.
Fig. 5 is the schematic diagram of second kind of execution mode of the present utility model.
Among each figure, first holding wire, secondary signal line ... be according to serial number from top to bottom and get.
Embodiment
Referring to Fig. 3 (a).Present embodiment is applicable on the closer RS485 bus of communication distance.Only the end in bus uses biasing resistor, will move on the holding wire A+5V by biasing resistor, and B pulls down to ground with holding wire.The transceiver that is positioned at this end inserts bus by damping resistance, to reduce owing to having used the influence of power supply docking port chip behind the biasing resistor.Other tie points on the bus do not re-use biasing resistor.
Embodiment 2
Referring to Fig. 3 (b).Present embodiment is applicable on the closer RS422 bus of communication distance.End in bus uses biasing resistor, will move on A and the Y+5V, and B and Z pull down to ground.The transceiver that is positioned at this end inserts bus by damping resistance, to reduce owing to having used the influence of power supply docking port chip behind the biasing resistor.Other tie points on the bus do not re-use biasing resistor.
Embodiment 3
Referring to Fig. 4 (a).Present embodiment is used for the distant RS-485 bus of communication distance.Biasing resistor is used at the two ends of bus, will move on the A+5V, and B pulls down to ground.The transceiver that is positioned at the two ends end inserts bus by damping resistance, to reduce owing to having used the influence of power supply docking port chip behind the biasing resistor.Other tie points on the bus do not re-use biasing resistor.
Embodiment 4
Referring to Fig. 4 (b).Present embodiment is used for the distant RS-422 bus of communication distance.Biasing resistor is used at the two ends of bus, will move on A and the Y+SV, and B and Z pull down to ground.The transceiver that is positioned at the two ends end inserts bus by damping resistance, to reduce owing to having used the influence of power supply docking port chip behind the biasing resistor.Other contacts on the bus do not re-use biasing resistor.
Biasing resistor of the present utility model is not limited to be arranged on the one or both ends of bus, can also be arranged at other optional positions of bus, in order to reduce owing to having used the influence of power supply docking port chip behind the biasing resistor, on transceiver terminal near the tie point of biasing resistor and differential signal line, the damping resistance of contacting inserts holding wire again.
" terminal that the transceiver of the position at close tie point place is connected with tie point " as herein described is to emphasize " near the terminal of tie point ", but not " near the transceiver of tie point ".For example, if two biasing resistors lay respectively at the bus two ends, then the transceiver of an end only need get final product by the polyphone damping resistance on a terminal.As Fig. 5.
Claims (6)
1, network failure protection syndeton; the transceiver that comprises bus and access bus; each holding wire of bus connects biasing resistor respectively, it is characterized in that, the terminal that is connected with tie point at the transceiver near the position at tie point place is connected with holding wire by damping resistance.
2, network failure protection syndeton as claimed in claim 1; it is characterized in that; described network is the RS485 bus network; head end in its bus; first holding wire is connected to pull-up resistor; the secondary signal line is connected to pull down resistor, and two terminals that are positioned at the transceiver of head end insert bus by resistance.
3, network failure as claimed in claim 2 protection syndeton is characterized in that at the head end of its bus, first holding wire is connected to pull-up resistor, is serially connected with resistance on the transceiver that is positioned at head end and the terminal that first holding wire is connected; At the end of its bus, the secondary signal line is connected to pull down resistor, is positioned on terminal transceiver and the terminal that the secondary signal line is connected to be serially connected with resistance.
4, network failure protection syndeton as claimed in claim 2 is characterized in that at the two ends of its bus, first holding wire is connected to pull-up resistor, and the secondary signal line is connected to pull down resistor, and two terminals that are positioned at the transceiver at two ends insert bus by resistance.
5, network failure protection syndeton as claimed in claim 1; it is characterized in that; described network is the RS422 bus network; head end in its bus; first holding wire and the 4th holding wire are connected to pull-up resistor; secondary signal line and the 3rd holding wire are connected to pull down resistor, and four terminals that are positioned at the transceiver of head end insert bus by resistance respectively.
6, network failure protection syndeton as claimed in claim 5; it is characterized in that; two ends in its bus; first holding wire and the 4th holding wire are connected to pull-up resistor; secondary signal line and the 3rd holding wire are connected to pull down resistor, and four terminals that are positioned at the transceiver at two ends insert bus by resistance respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200520036758 CN2872753Y (en) | 2005-12-30 | 2005-12-30 | Network failure protection connecting structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200520036758 CN2872753Y (en) | 2005-12-30 | 2005-12-30 | Network failure protection connecting structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2872753Y true CN2872753Y (en) | 2007-02-21 |
Family
ID=37741093
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200520036758 Expired - Fee Related CN2872753Y (en) | 2005-12-30 | 2005-12-30 | Network failure protection connecting structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2872753Y (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104471859A (en) * | 2012-05-21 | 2015-03-25 | 施耐德电气It公司 | Systems and methods for biasing a bus |
| CN111385178A (en) * | 2019-12-24 | 2020-07-07 | 成都国翼电子技术有限公司 | RS422 bus link monitoring and network failure protection system |
-
2005
- 2005-12-30 CN CN 200520036758 patent/CN2872753Y/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104471859A (en) * | 2012-05-21 | 2015-03-25 | 施耐德电气It公司 | Systems and methods for biasing a bus |
| US9984033B2 (en) | 2012-05-21 | 2018-05-29 | Schneider Electric It Corporation | Systems and methods for biasing a bus |
| CN104471859B (en) * | 2012-05-21 | 2018-10-19 | 施耐德电气It公司 | System and method for being biased to bus |
| CN111385178A (en) * | 2019-12-24 | 2020-07-07 | 成都国翼电子技术有限公司 | RS422 bus link monitoring and network failure protection system |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Effective date of registration: 20090826 Pledge (preservation): Pledge |
|
| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Effective date of registration: 20090826 Pledge (preservation): Pledge |
|
| PC01 | Cancellation of the registration of the contract for pledge of patent right |
Date of cancellation: 20121219 Granted publication date: 20070221 Pledgee: The Agricultural Bank of Chengdu branch of Limited by Share Ltd Chinese Sichuan Pledgor: Tonghe Information Co., Ltd. Chengdu Registration number: 2009510000604 |
|
| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of utility model: Network failure protection connecting structure Effective date of registration: 20121219 Granted publication date: 20070221 Pledgee: The Agricultural Bank of Chengdu branch of Limited by Share Ltd Chinese Sichuan Pledgor: Tonghe Information Co., Ltd. Chengdu Registration number: 2012990000819 |
|
| PLDC | Enforcement, change and cancellation of contracts on pledge of patent right or utility model | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20070221 Termination date: 20141230 |
|
| EXPY | Termination of patent right or utility model |