CN2729901Y - Appearance test device of double-row direct insertion type package chip - Google Patents
Appearance test device of double-row direct insertion type package chip Download PDFInfo
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- CN2729901Y CN2729901Y CN 200420089194 CN200420089194U CN2729901Y CN 2729901 Y CN2729901 Y CN 2729901Y CN 200420089194 CN200420089194 CN 200420089194 CN 200420089194 U CN200420089194 U CN 200420089194U CN 2729901 Y CN2729901 Y CN 2729901Y
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Abstract
The utility model relates to an appearance test device of the double-row direct insertion type package chips belonging to the technical field of the appearance checking for chips, comprising an object platform for placing the double-row direct insertion type package chips, an image acquisition device, an image processor which is connected with the image acquisition device via a cable conductor and mechanical parts used for installing each device. The image acquisition device is arranged vertically on the object platform; the utility model also comprises a flat mirror array through which the image acquisition device can simultaneously receive the reflection ray of the pins of the two rows of chips, and the flat mirror array is arranged at the lower part of the object platform. The utility model has the advantages of simple design, low cost, short testing time and high testing precision.
Description
Technical field
The utility model belongs to the outward appearance detection technique field of chip, particularly relating to a kind of curved pin at dual in-line package (Dual In-line Package, be called for short DIP) chip, height pin and pin widths effectively detects and judges the appearance delection device that it is whether up to specification.
Background technology
Integrated circuit (IC) chip (IC) is after manufacturing process finishes; needing to test its electric property through the packaging and testing machine can shipment after qualified; but this test only limits to the electric property of testing product; and can not the outward appearance of product be detected; therefore; exist the product of defective also often to sneak into shipment together in the qualified products in appearance, cause the reduction of ex factory pass rate.Carry out the way that outward appearance detects in the mode of artificial sampling observation traditionally and also be extensive use of at present, but have obviously that production efficiency is low, shortcomings such as poor reliability and labour cost height.
By computer, image acquisition equipment and corresponding software, can constitute a cover and obtain subject image, image is carried out Treatment Analysis and obtains the device of article Dimensions, can replace the method for manual detection, it is characterized in that need not manual intervention, detection speed is fast and accuracy rate is high.At present, this class is more and more used in industrial production based on the outward appearance checkout equipment of computer and related algorithm thereof.
The DIP chip is as the important devices in the electronic product, at present still being extensive use of, particularly in the application scenario not high to the volume size requirements of product.The DIP chip is made of chip pipe shaft and two row chip pins, is symmetrical structure, and the number of pins that each row is comprised is identical and corresponding one by one.For the qualified DIP chip of a slice outward appearance, require the length of its each root pin and width identical, and can not have crooked situation to occur.
For each each pin that lists carries out the outward appearance detection to the DIP chip, detect content and comprise the length of pin, the width of pin and the linearity of pin.The appearance delection device of existing a kind of DIP chip as shown in Figure 1, is respectively installed a video camera 4 and the coupled computer (not shown) that image pick-up card is housed in the side of two row pins 3 of chip pipe shaft 2.But there is following significant disadvantages in this method:
1, need two video cameras, two image pick-up cards, even two computers just may finish the detection task, this has increased the cost of checkout equipment undoubtedly;
2, because the influence of shooting time, shooting angle and error, the simple concatenation of two width of cloth images is not equal to the true complexion of chip, that is to say, need carry out gradient respectively to two width of cloth images and detect and bench mark correction, increase the weight of the burden of system, prolonged detection time;
3, owing to be subjected to the restriction of the Aspect Ratio of chip pin, under the certain situation of the resolution of video camera, the pixel number that a row pin can occupy in image at most only equals number of total picture element that video camera can provide
Extremely
About, thereby caused the waste of mass efficient pixel.
Summary of the invention
The purpose of this utility model is the appearance delection device that a kind of dual in-line package chip is provided in order to address the above problem, it has overcome the shortcoming of existing device, reached the simplification device design, reduced equipment cost, the effect that shortens detection time and improve accuracy of detection.
The technical solution of the utility model comprises: place the article carrying platform of dual in-line package chip, image grabber, image processor that links to each other with this image acquiring device by cable and the mechanical part that each device is installed; It is characterized in that this image grabber is vertically set on this platform, comprise that also being installed in the article carrying platform below uses so that this image grabber receives the level crossing array of the reflection ray of two row chip pins simultaneously.
This level crossing array can be made up of two level crossings, and these two level crossing axial symmetry are placed, and the angle of each piece level crossing and horizontal plane can be between 25 degree-40 degree.
Said apparatus also can comprise the angle adjusting mechanism of regulating this level crossing array angle.
Above-mentioned mechanical part can comprise a base, be installed in article carrying platform and slide bar on this base, is installed in the travel(l)ing rest on the slide bar.
Above-mentioned image grabber can be made up of ccd video camera and optical lens.
Above-mentioned image processor can adopt the image processing system of ADSP-2181, and this image processing system can comprise ADSP-2181 digital signal processor and extensive Field Programmable Gate Array.
Advantage of the present utility model is, by placing one group of level crossing array in DIP chip pin both sides, only utilize a video camera being positioned over chip top that two row pins of chip are carried out one-time imaging, simultaneously by suitably adjusting the angle between minute surface and the pin plane, on the length direction of pin, obtain amplification to a certain degree, help follow-up image detection process.Reached the simplified system design, reduced equipment cost, the effect that shortens detection time and improve accuracy of detection.
Description of drawings
Fig. 1 is the existing DIP chip appearance delection device schematic diagram that utilizes two video cameras simultaneously.
Fig. 2 mainly forms device embodiment for the utility model and constitutes schematic diagram.
Fig. 3 is a mechanical part example structure schematic diagram of the present utility model.
The utility model is described in further detail below in conjunction with drawings and Examples.
Critical piece of the present utility model, as shown in Figure 2, comprise: place the article carrying platform 9 of dual in-line package chip 2, be installed in the image grabber 4 on this platform, image processor that links to each other with this image acquiring device by cable and the mechanical part (not shown) that each device is installed; This image grabber 4 is vertically set on this platform 5, comprises that also being installed in the article carrying platform below uses so that this image grabber receives the level crossing array 1 of the reflection ray of two row chip pins simultaneously.
Image grabber 4 embodiment of the present utility model can be made of jointly ccd video camera and optical lens group.What ccd video camera used is the UM-201 B that U.S. UNIQ company produces, and its resolution is 752 (H) * 582 (V), and the signal to noise ratio of 56dB can be provided.Ccd video camera be placed in article carrying platform directly over, be used to obtain the light that carries the chip under test image information that reflects from the level crossing array, ccd video camera is converted to the signal of telecommunication that carries image information equally with light signal, and this signal of telecommunication is transferred to image processor analyzes and detect.Ccd video camera can move up and down (by the slide bar of platform, as shown in Figure 3), to obtain best imaging effect.One group of optical lens group in the front end setting of ccd video camera is in order to allow the image of chip to be measured occupy maximum pixel numbers in the CCD image device, in other words, the imaging of chip is carried out suitable amplification occupying the maximum effective area among the CCD, thereby help carrying out more accurate detection.
The embodiment of image processor of the present utility model is based on the image processing system of ADSP-2181, finishes tasks such as comprising image preliminary treatment and analyzing and detecting.The core processing unit of this image processing system is the ADSP-2181 digital signal processor of ADI (AD), its instruction cycle only is 30ns, be equipped with the data storage of 16K * 16 bytes and the program storage of 16K * 24 bytes, can satisfy the requirement of general pattern Processing Algorithm speed and data access amount.The A/D of system, the SAA7111 of Dutch Philips company (Philips) and the ADV7176 of Analog Devices Inc have been adopted in the D/A conversion respectively, the former is that the YUV digital video signal of 4: 2: 2 forms of 16 supplies the ADSP-2181 Treatment Analysis with standard analog video (NTSC or PAL) conversion of signals, and the latter is converted to the standard analog vision signal for the monitor demonstration again with digital video signal after treatment.System has also adopted extensive Field Programmable Gate Array (FPGA), the processor problem that over-burden that causes with the complex time sequence that solves owing to video acquisition, it is mainly used to finish A/D and D/A controls the read-write operation of two frame buffers, also realizes the logic adhesion of interface between some devices simultaneously.
Mechanical part embodiment of the present utility model as shown in Figure 3, comprise a base 10, be installed in T shape article carrying platform 9 and slide bar 7 on this base 10, be installed in the travel(l)ing rest 6 that is used for fixing ccd video camera 4 and optical lens group 5 on the slide bar 7, by travel(l)ing rest 6, ccd video camera 4 and optical lens group 5 can steadily move up and down along slide bar 7, tested chip is fixed on the T shape article carrying platform 9, article carrying platform 9 is installed in base 10 tops, level crossing array 1 and coupled turning joint 8 are positioned in the both sides, below, plane of T shape article carrying platform 9, can adjust angle between level crossing array 1 and the chip pin plane by regulating turning joint 8, reach the imaging effect of the best.
Detection principle of the present utility model is, DIP chip to be detected is fixed on the article carrying platform 9, by regulating the angle that turning joint 8 is adjusted between level crossing array 1 and the chip pin plane, simultaneously by regulating travel(l)ing rest 6, adjust ccd video camera 4 and optical lens group 5 to the distance between the article carrying platform 9, make the imaging of two row pins of the chip that in ccd video camera 4, obtains maximum and complete display, ccd video camera 4 is converted to the signal of telecommunication with this imaging and is input in the image processing apparatus, the signal of telecommunication is transformed to digital signal through A/D converter spare SAA7111, digital signal is carried out analyzing and processing by ADSP-2181 in conjunction with corresponding image detection algorithm, calculate length and width falls short of specifications, and have the pin of inclination, and on monitor, show with highlighted.
Claims (6)
1, a kind of appearance delection device of dual in-line package chip comprises: place the article carrying platform of dual in-line package chip, image grabber, image processor that links to each other with this image acquiring device by cable and the mechanical part that each device is installed; It is characterized in that this image grabber is vertically set on this platform, comprise that also being installed in the article carrying platform below uses so that this image grabber receives the level crossing array of the reflection ray of two row chip pins simultaneously.
2, the appearance delection device of dual in-line package chip as claimed in claim 1, it is characterized in that, this level crossing array is made up of two level crossings, and these two level crossing axial symmetry are placed, and the angle of each piece level crossing and horizontal plane is between 25 degree-40 degree.
3, the appearance delection device of dual in-line package chip as claimed in claim 2 is characterized in that, described device also comprises linking to each other with this two level crossing regulates the angle adjusting mechanism of its angle.
4, the appearance delection device of dual in-line package chip as claimed in claim 1 is characterized in that, this mechanical part comprises a base, is installed in article carrying platform and slide bar on this base, is installed in the travel(l)ing rest on the slide bar.
5, the appearance delection device of dual in-line package chip as claimed in claim 1 is characterized in that, this image grabber is made up of ccd video camera and optical lens.
6, the appearance delection device of dual in-line package chip as claimed in claim 1, it is characterized in that, this image processor adopts the image processing system of ADSP-2181, and this image processing system can comprise ADSP-2181 digital signal processor and extensive Field Programmable Gate Array.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200420089194 CN2729901Y (en) | 2004-09-03 | 2004-09-03 | Appearance test device of double-row direct insertion type package chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200420089194 CN2729901Y (en) | 2004-09-03 | 2004-09-03 | Appearance test device of double-row direct insertion type package chip |
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| Publication Number | Publication Date |
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| CN2729901Y true CN2729901Y (en) | 2005-09-28 |
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| CN 200420089194 Expired - Fee Related CN2729901Y (en) | 2004-09-03 | 2004-09-03 | Appearance test device of double-row direct insertion type package chip |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102914497A (en) * | 2012-10-24 | 2013-02-06 | 华东光电集成器件研究所 | Bond strength measurement device |
| CN107478153A (en) * | 2017-08-11 | 2017-12-15 | 哈尔滨工业大学 | A kind of background light source structure for chip detection |
| CN108918528A (en) * | 2018-06-01 | 2018-11-30 | 深圳回收宝科技有限公司 | A kind of endpoint detection methods, device and storage medium |
-
2004
- 2004-09-03 CN CN 200420089194 patent/CN2729901Y/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102914497A (en) * | 2012-10-24 | 2013-02-06 | 华东光电集成器件研究所 | Bond strength measurement device |
| CN107478153A (en) * | 2017-08-11 | 2017-12-15 | 哈尔滨工业大学 | A kind of background light source structure for chip detection |
| CN108918528A (en) * | 2018-06-01 | 2018-11-30 | 深圳回收宝科技有限公司 | A kind of endpoint detection methods, device and storage medium |
| CN108918528B (en) * | 2018-06-01 | 2023-08-01 | 深圳回收宝科技有限公司 | Terminal detection method, device and storage medium |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20050928 Termination date: 20120903 |