CN221306433U - Display substrate - Google Patents
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- CN221306433U CN221306433U CN202322760426.4U CN202322760426U CN221306433U CN 221306433 U CN221306433 U CN 221306433U CN 202322760426 U CN202322760426 U CN 202322760426U CN 221306433 U CN221306433 U CN 221306433U
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Abstract
At least one embodiment of the present utility model provides a display substrate, including: a substrate base; the pixel unit is arranged on the substrate base plate in an array mode, wherein each pixel unit comprises a plurality of sub-pixels emitting light rays with different colors, and each sub-pixel comprises a light emitting element and a pixel driving circuit driving the corresponding light emitting element to emit light; a pixel defining layer disposed on a side of the pixel driving circuit away from the substrate; the pixel definition layer comprises a plurality of pixel openings, each pixel opening corresponds to one sub-pixel, the embodiment of the utility model realizes the preparation of an RGB full-color OLED pixelation device through the three-time deposition of luminous layers and functional layers with different colors and the two-time exposure etching patterning technology, solves the problem that the display resolution can not be further improved when the AMOLED evaporation technology is expanded into medium-and-large-size display products, and further improves the resolution and the display effect of the display device.
Description
Technical Field
Embodiments of the present utility model relate to a display substrate.
Background
Compared with a liquid crystal display panel, an Organic LIGHT EMITTING Diode (OLED) is a self-luminous display device which does not need any light source, namely an active light-emitting display device, and has the advantages of high light efficiency, wide viewing angle, high contrast ratio, low driving voltage, extremely high response speed, thinness, flexibility, low cost and the like, thereby having a better development prospect in the technical field of display. With the continuous development of Display technology, a Flexible Display device (Flexible Display) using an OLED as a light emitting device and using a thin film transistor (Thin Film Transistor, abbreviated as TFT) for signal control has become a mainstream product in the current Display field, and with the continuous development of Display technology, optimizing a Display effect has become a necessary trend.
The organic light emitting display device includes an organic light emitting diode corresponding to the self-luminous element, the organic light emitting diode including an emission layer formed between two electrodes. The organic light emitting diode generates excitons by injecting electrons and holes into the emission layer through the electron injection electrode (i.e., cathode) and the hole injection electrode (i.e., anode) and recombining the electrodes and holes within the emission layer, and emits light when the excitons are converted from an excited state to a ground state. The light emitting diodes are classified into a top emission mode, a bottom emission mode, and a bi-directional emission mode according to the light emission direction. The organic light emitting display device can also be classified into a passive matrix type and an active matrix type.
Disclosure of utility model
At least one embodiment of the present utility model provides a display substrate, including: a substrate base; the pixel unit is arranged on the substrate base plate in an array mode, wherein each pixel unit comprises a plurality of sub-pixels emitting light rays with different colors, and each sub-pixel comprises a light emitting element and a pixel driving circuit driving the corresponding light emitting element to emit light; a pixel defining layer disposed on a side of the pixel driving circuit away from the substrate; the pixel definition layer comprises a plurality of pixel openings, each pixel opening corresponds to one sub-pixel, the embodiment of the utility model realizes the preparation of an RGB full-color OLED pixelation device through the three-time deposition of luminous layers and functional layers with different colors and the two-time exposure etching patterning technology, solves the problem that the display resolution can not be further improved when the AMOLED evaporation technology is expanded into medium-and-large-size display products, and further improves the resolution and the display effect of the display device.
At least one embodiment of the present utility model provides a display substrate, including: a substrate base; the array is arranged on the substrate, wherein each pixel unit comprises a plurality of sub-pixels emitting light rays with different colors, and each sub-pixel comprises a light emitting element and a pixel driving circuit driving the corresponding light emitting element to emit light; a pixel defining layer disposed on a side of the pixel driving circuit remote from the substrate base plate; wherein the pixel defining layer includes a plurality of pixel openings, each of the pixel openings corresponding to one of the sub-pixels.
For example, in the display substrate provided in at least one embodiment of the present utility model, each of the pixel units includes three sub-pixels, and the light emitting element corresponding to each of the sub-pixels includes a first electrode and a light emitting unit that are stacked; the light emitting units included in the three sub-pixels in the same pixel unit respectively comprise a first color light emitting layer, a second color light emitting layer and a third color light emitting layer; a second electrode is arranged on one side, far away from the substrate, of the light-emitting unit, and a shielding layer is arranged on one side, far away from the substrate, of the second electrode; and a third color retaining film layer is arranged at the position of the shielding layer far away from the second color light-emitting layer and the position of the shielding layer far away from the first color light-emitting layer.
For example, in the display substrate provided in at least one embodiment of the present utility model, a second color-preserving film layer is further disposed at a position of the shielding layer away from the first color light emitting layer, and the second color-preserving film layer and the third color-preserving film layer are sequentially stacked in a direction away from the substrate.
For example, in the display substrate provided in at least one embodiment of the present utility model, a maximum distance between the third color-retaining film layer and the first color-emitting layer at a position of the shielding layer away from the first color-emitting layer is different from a maximum distance between the third color-retaining film layer and the second color-emitting layer at a position of the shielding layer away from the second color-emitting layer.
For example, in the display substrate provided in at least one embodiment of the present utility model, a packaging structure is disposed on a side of the third color retention film layer away from the substrate.
For example, in the display substrate provided in at least one embodiment of the present utility model, the display substrate includes a display area and a peripheral area disposed around the periphery of the display area; a first common voltage connecting wire, a second common voltage connecting wire and a third common voltage connecting wire are sequentially arranged in the peripheral area from a position close to the display area to a position far from the display area; in each of the pixel units, the light emitting element includes a first light emitting element, a second light emitting element, and a third light emitting element, and the first common voltage connection line, the second common voltage connection line, and the third common voltage connection line are electrically connected to the first light emitting element, the second light emitting element, and the third light emitting element, respectively.
For example, in the display substrate provided in at least one embodiment of the present utility model, the pixel defining layer further includes a plurality of spacers that space adjacent pixel openings apart, and an auxiliary electrode is disposed in each of the spacers, and the auxiliary electrode and the second electrode are electrically connected through a first via structure.
For example, in the display substrate provided in at least one embodiment of the present utility model, the auxiliary electrode includes a first titanium metal layer, an aluminum metal layer, a second titanium metal layer, and a metal oxide layer stacked in this order from a position close to the substrate to a position far from the substrate.
For example, in the display substrate provided in at least one embodiment of the present utility model, the thickness of the first titanium metal layer ranges from 100 a to 800 a, the thickness of the aluminum metal layer ranges from 2000 a to 6000 a, the thickness of the second titanium metal layer ranges from 100 a to 500 a, and the thickness of the metal oxide layer ranges from 100 a to 300 a.
For example, in the display substrate provided in at least one embodiment of the present utility model, the thicknesses of the first titanium metal layer, the aluminum metal layer, the second titanium metal layer, and the metal oxide layer are 500 angstroms, 5000 angstroms, 300 angstroms, and 200 angstroms, respectively.
For example, in the display substrate provided in at least one embodiment of the present utility model, the pixel defining layer further includes a plurality of spacers, the plurality of spacers includes a first spacer, a second spacer, and a third spacer that are sequentially adjacent, the first electrode is disposed between the first spacer and the second spacer, and the connection electrode is disposed between the second spacer and the third spacer.
For example, in the display substrate provided in at least one embodiment of the present utility model, the first electrode and the connection electrode are formed of the same material in the same process step, and the first electrode and the connection electrode are spaced apart from each other.
For example, in the display substrate provided in at least one embodiment of the present utility model, an auxiliary electrode is further disposed on a side of the layer where the pixel driving circuit is located, the side facing away from the substrate, a planarization layer is further disposed between the auxiliary electrode and the pixel defining layer, the connection electrode and the auxiliary electrode are electrically connected through a second via structure located in the planarization layer, and the connection electrode and the second electrode are electrically connected.
For example, in the display substrate provided in at least one embodiment of the present utility model, a plurality of the auxiliary electrodes are connected to form a grid structure.
For example, in the display substrate provided in at least one embodiment of the present utility model, the auxiliary electrode includes a stacked structure formed of a molybdenum metal layer, a copper metal layer, a titanium metal layer, an aluminum metal layer, and a titanium metal layer, or a stacked structure formed of an indium tin oxide layer, a silver metal layer, and an indium tin oxide layer.
For example, in the display substrate provided in at least one embodiment of the present utility model, the thickness of the auxiliary electrode is 1000 to 6000 angstroms, and the sheet resistance of the auxiliary electrode is 0 to 0.5 Ω/sq.
For example, in the display substrate provided in at least one embodiment of the present utility model, the connection resistance between the second electrode and the connection electrode is 0 to 0.1 Ω.
For example, in the display substrate provided in at least one embodiment of the present utility model, the first light emitting element, the second light emitting element, and the third light emitting element are electrically connected to a power supply voltage line through the first common voltage connection line, the second common voltage connection line, and the third common voltage connection line, respectively.
For example, in the display substrate provided in at least one embodiment of the present utility model, the light emitting unit includes a functional layer and a light emitting layer which are stacked, the functional layer includes a hole injecting layer, a hole transporting layer, an electron transporting layer, and an electron injecting layer which are stacked in a direction away from the first electrode in this order, and the light emitting layer is disposed between the hole transporting layer and the electron transporting layer, and the light emitting layer includes the first color light emitting layer, the second color light emitting layer, and the third color light emitting layer; the third color retention film layer comprises a third hole injection retention layer, a third hole transmission retention layer, a third color luminescence retention layer, a third electron transmission retention layer, a third electron injection retention layer, a second electrode retention third sub-layer and a third shielding retention layer which are arranged in a stacked mode.
For example, in the display substrate provided in at least one embodiment of the present utility model, the light emitting unit includes a functional layer and a light emitting layer which are stacked, the functional layer includes a hole injecting layer, a hole transporting layer, an electron transporting layer, and an electron injecting layer which are stacked in a direction away from the first electrode in this order, and the light emitting layer is disposed between the hole transporting layer and the electron transporting layer, and the light emitting layer includes the first color light emitting layer, the second color light emitting layer, and the third color light emitting layer; the second color retention film layer comprises a second hole injection retention layer, a second hole transport retention layer, a second color luminescence retention layer, a second electron transport retention layer, a second electron injection retention layer, a second electrode retention second sub-layer and a second shielding retention layer which are stacked; and the third color retention film layer comprises a third hole injection retention layer, a third hole transmission retention layer, a third color luminescence retention layer, a third electron transmission retention layer, a third electron injection retention layer, a second electrode retention third sub-layer and a third shielding retention layer which are stacked.
For example, in the display substrate provided in at least one embodiment of the present utility model, the light emitting unit includes a first light emitting unit and a second light emitting unit that are stacked, and the second electrode is disposed on a side of the second light emitting unit away from the substrate.
For example, in the display substrate provided in at least one embodiment of the present utility model, the light emitting layer includes a first organic emission layer and a second organic emission layer that are stacked; the first color light-emitting layer comprises a first color light-emitting first sub-layer and a first color light-emitting second sub-layer which are stacked; the second color light-emitting layer comprises a second color light-emitting first sub-layer and a second color light-emitting second sub-layer which are stacked; the third color light-emitting layer comprises a third color light-emitting first sub-layer and a third color light-emitting second sub-layer which are stacked; the first light emitting unit includes the first organic emission layer including the first color light emitting first sub-layer, the second color light emitting first sub-layer, and the third color light emitting first sub-layer; the second light emitting unit includes the second organic emission layer including the first color light emitting second sub-layer, the second color light emitting second sub-layer, and the third color light emitting second sub-layer.
For example, in the display substrate provided in at least one embodiment of the present utility model, the thickness of the first color light-emitting first sub-layer and the thickness of the first color light-emitting second sub-layer are different from each other; the second color light emitting first sub-layer and the second color light emitting second sub-layer have different thicknesses from each other; the thicknesses of the third color light-emitting first sub-layer and the third color light-emitting second sub-layer are different from each other.
For example, in the display substrate provided in at least one embodiment of the present utility model, the sum of the thicknesses of the first color light-emitting first sub-layer and the first color light-emitting second sub-layer, the sum of the thicknesses of the second color light-emitting first sub-layer and the second color light-emitting second sub-layer, and the sum of the thicknesses of the third color light-emitting first sub-layer and the third color light-emitting second sub-layer are different from each other.
For example, in the display substrate provided in at least one embodiment of the present utility model, a charge generating layer is provided at least between the first color light-emitting first sub-layer and the first color light-emitting second sub-layer, and/or between the second color light-emitting first sub-layer and the second color light-emitting second sub-layer, and/or between the third color light-emitting first sub-layer and the third color light-emitting second sub-layer.
For example, in the display substrate provided in at least one embodiment of the present utility model, the charge generation layer includes a first charge generation layer and a second charge generation layer that are stacked.
For example, in the display substrate provided in at least one embodiment of the present utility model, the first charge generation layer and the second charge generation layer are configured in accordance with a PN junction structure.
For example, in the display substrate provided in at least one embodiment of the present utility model, the first light emitting unit includes a hole injection layer, a first hole transport layer, a first electron blocking layer, the first organic emission layer, a first hole blocking layer, a first electron transport layer, and the first charge generation layer that are stacked; the second light emitting unit includes the second charge generation layer, a second hole transport layer, a second electron blocking layer, the second organic emission layer, a second hole blocking layer, a second electron transport layer, and an electron injection layer, which are stacked.
For example, in the display substrate provided in at least one embodiment of the present utility model, the third color-preserving film layer includes a stacked first portion including a third hole-injecting-preserving layer, a third hole-transporting first-preserving layer, a third electron-blocking first-preserving layer, a third color-emitting first-preserving layer, a third hole-blocking first-preserving layer, a third electron-transporting first-preserving layer, and a third charge-generating first-preserving layer, and a second portion including a stacked third charge-generating second-preserving layer, a third hole-transporting second-preserving layer, a third electron-blocking second-preserving layer, a third color-emitting second-preserving layer, a third hole-blocking second-preserving layer, a third electron-transporting second-preserving layer, a third electron-injecting-preserving layer, a second electrode-preserving third sub-layer, and a third blocking preserving layer.
For example, in the display substrate provided in at least one embodiment of the present utility model, the third color-preserving film layer includes a first portion and a second portion which are stacked, the first portion includes a third hole injection-preserving layer, a third hole transport-preserving layer, a third electron blocking-preserving layer, a third color light-emitting-preserving layer, a third hole blocking-preserving layer, a third electron transport-preserving layer, and a third charge generation-preserving layer which are stacked, and the second portion includes a third charge generation-preserving layer, a third hole transport-preserving layer, a third electron blocking-preserving layer, a third color light-emitting-preserving layer, a third hole blocking-preserving layer, a third electron transport-preserving layer, a third electron injection-preserving layer, a second electrode-preserving third sub-layer, and a third blocking-preserving layer which are stacked; and the second color retention film layer comprises a third portion and a fourth portion which are arranged in a stacked manner, wherein the third portion comprises a second hole injection retention layer, a second hole transmission first retention layer, a second electron blocking first retention layer, a second color luminescence first retention layer, a second hole blocking first retention layer, a second electron transmission first retention layer and a second charge generation first retention layer which are arranged in a stacked manner, and the fourth portion comprises a second charge generation second retention layer, a second hole transmission second retention layer, a second electron blocking second retention layer, a second color luminescence second retention layer, a second hole blocking second retention layer, a second electron transmission second retention layer, a second electron injection retention layer, a second electrode retention second sub-layer and a second shielding retention layer which are arranged in a stacked manner.
For example, in the display substrate provided in at least one embodiment of the present utility model, the first color light emitting layer, the second color light emitting layer, and the third color light emitting layer are a red light emitting layer, a green light emitting layer, and a blue light emitting layer, respectively, the first color light emitting layer, the second color light emitting layer, and the third color light emitting layer are phosphorescent light emitting layers, and the third color light emitting layer further has a boron element therein.
For example, in the display substrate provided in at least one embodiment of the present utility model, the red light emitting layer, the green light emitting layer, and the blue light emitting layer each include a host material and a phosphorescent material, and the molecular weight of the phosphorescent material included in the red light emitting layer is greater than the molecular weight of the phosphorescent material included in the green light emitting layer and greater than the molecular weight of the phosphorescent material included in the blue light emitting layer.
For example, in the display substrate provided in at least one embodiment of the present utility model, the first electrode includes a reflective metal layer and a transparent conductive layer that are stacked.
For example, in the display substrate provided in at least one embodiment of the present utility model, the material of the reflective metal layer includes at least one of aluminum and silver, and the material of the transparent conductive layer includes at least one of indium tin oxide and indium zinc oxide.
For example, in the display substrate provided in at least one embodiment of the present utility model, the second electrode includes a single-layer structure or a multi-layer structure formed of at least one of silver, aluminum, magnesium, lithium, calcium, lithium fluoride, indium tin oxide, and indium zinc oxide.
For example, in the display substrate provided in at least one embodiment of the present utility model, the transmittance of the first electrode is greater than 80%.
For example, in the display substrate provided in at least one embodiment of the present utility model, the pixel driving circuit includes a plurality of thin film transistors, at least one of the thin film transistors is a metal oxide thin film transistor, and at least one of the thin film transistors is a low temperature polysilicon thin film transistor.
The utility model also provides a display substrate, which comprises: a substrate base;
The array is arranged on the substrate, wherein each pixel unit comprises a plurality of sub-pixels emitting light rays with different colors, and each sub-pixel comprises a light emitting element and a pixel driving circuit driving the corresponding light emitting element to emit light; a pixel defining layer disposed on a side of the pixel driving circuit remote from the substrate base plate; wherein the pixel defining layer comprises a plurality of pixel openings, each pixel opening corresponding to one of the sub-pixels; the pixel defining layer further includes a plurality of spacers separating adjacent ones of the pixel openings, an auxiliary electrode disposed in each of the spacers, the auxiliary electrode and the second electrode being electrically connected by a first via structure.
For example, in the display substrate provided in at least one embodiment of the present utility model, each of the pixel units includes three sub-pixels, and the light emitting element corresponding to each of the sub-pixels includes a first electrode and a light emitting unit that are stacked; the light emitting units included in the three sub-pixels in the same pixel unit respectively comprise a first color light emitting layer, a second color light emitting layer and a third color light emitting layer; a second electrode is arranged on one side, far away from the substrate, of the light-emitting unit, and a shielding layer is arranged on one side, far away from the substrate, of the second electrode; and a third color retaining film layer is arranged at the position of the shielding layer far away from the second color light-emitting layer and the position of the shielding layer far away from the first color light-emitting layer.
For example, in the display substrate provided in at least one embodiment of the present utility model, a second color-preserving film layer is further disposed at a position of the shielding layer away from the first color light emitting layer, and the second color-preserving film layer and the third color-preserving film layer are sequentially stacked in a direction away from the substrate.
For example, in the display substrate provided in at least one embodiment of the present utility model, a maximum distance between the third color-retaining film layer and the first color-emitting layer at a position of the shielding layer away from the first color-emitting layer is different from a maximum distance between the third color-retaining film layer and the second color-emitting layer at a position of the shielding layer away from the second color-emitting layer.
For example, in the display substrate provided in at least one embodiment of the present utility model, a packaging structure is disposed on a side of the third color retention film layer away from the substrate.
For example, in the display substrate provided in at least one embodiment of the present utility model, the display substrate includes a display area and a peripheral area disposed around the periphery of the display area; a first common voltage connecting wire, a second common voltage connecting wire and a third common voltage connecting wire are sequentially arranged in the peripheral area from a position close to the display area to a position far from the display area; in each of the pixel units, the light emitting element includes a first light emitting element, a second light emitting element, and a third light emitting element, and the first common voltage connection line, the second common voltage connection line, and the third common voltage connection line are electrically connected to the first light emitting element, the second light emitting element, and the third light emitting element, respectively.
For example, in the display substrate provided in at least one embodiment of the present utility model, the auxiliary electrode includes a first titanium metal layer, an aluminum metal layer, a second titanium metal layer, and a metal oxide layer stacked in this order from a position close to the substrate to a position far from the substrate.
For example, in the display substrate provided in at least one embodiment of the present utility model, the thickness of the first titanium metal layer ranges from 100 a to 800 a, the thickness of the aluminum metal layer ranges from 2000 a to 6000 a, the thickness of the second titanium metal layer ranges from 100 a to 500 a, and the thickness of the metal oxide layer ranges from 100 a to 300 a.
For example, in the display substrate provided in at least one embodiment of the present utility model, the thicknesses of the first titanium metal layer, the aluminum metal layer, the second titanium metal layer, and the metal oxide layer are 500 angstroms, 5000 angstroms, 300 angstroms, and 200 angstroms, respectively.
For example, in the display substrate provided in at least one embodiment of the present utility model, the auxiliary electrode includes a multilayer structure that is stacked, and the multilayer structures included in the auxiliary electrode are connected in parallel through a via hole.
For example, the display substrate provided in at least one embodiment of the present utility model further includes a gate line, a data line, a power voltage signal line, and an initialization signal line, where the auxiliary electrode is disposed in a same layer as at least one of the gate line, the data line, the power voltage signal line, and the initialization signal line.
For example, the display substrate provided in at least one embodiment of the present utility model further includes a gate line, a data line, a power supply voltage signal line, an initialization signal line, a reference voltage signal line, and an induced voltage signal line, where the auxiliary electrode is disposed in a same layer as at least one of the gate line, the data line, the power supply voltage signal line, the initialization signal line, the reference voltage signal line, and the induced voltage signal line.
For example, in the display substrate provided in at least one embodiment of the present utility model, the light emitting unit includes a functional layer and a light emitting layer which are stacked, the functional layer includes a hole injecting layer, a hole transporting layer, an electron transporting layer, and an electron injecting layer which are stacked in a direction away from the first electrode in this order, and the light emitting layer is disposed between the hole transporting layer and the electron transporting layer, and the light emitting layer includes the first color light emitting layer, the second color light emitting layer, and the third color light emitting layer; the third color retention film layer comprises a third hole injection retention layer, a third hole transmission retention layer, a third color luminescence retention layer, a third electron transmission retention layer, a third electron injection retention layer, a second electrode retention third sub-layer and a third shielding retention layer which are arranged in a stacked mode.
For example, in the display substrate provided in at least one embodiment of the present utility model, the light emitting unit includes a functional layer and a light emitting layer which are stacked, the functional layer includes a hole injecting layer, a hole transporting layer, an electron transporting layer, and an electron injecting layer which are stacked in a direction away from the first electrode in this order, and the light emitting layer is disposed between the hole transporting layer and the electron transporting layer, and the light emitting layer includes the first color light emitting layer, the second color light emitting layer, and the third color light emitting layer; the second color retention film layer comprises a second hole injection retention layer, a second hole transport retention layer, a second color luminescence retention layer, a second electron transport retention layer, a second electron injection retention layer, a second electrode retention second sub-layer and a second shielding retention layer which are stacked; and the third color retention film layer comprises a third hole injection retention layer, a third hole transmission retention layer, a third color luminescence retention layer, a third electron transmission retention layer, a third electron injection retention layer, a second electrode retention third sub-layer and a third shielding retention layer which are stacked.
For example, in the display substrate provided in at least one embodiment of the present utility model, the light emitting unit includes a first light emitting unit and a second light emitting unit that are stacked, and the second electrode is disposed on a side of the second light emitting unit away from the substrate.
For example, in the display substrate provided in at least one embodiment of the present utility model, the light emitting layer includes a first organic emission layer and a second organic emission layer that are stacked; the first color light-emitting layer comprises a first color light-emitting first sub-layer and a first color light-emitting second sub-layer which are stacked; the second color light-emitting layer comprises a second color light-emitting first sub-layer and a second color light-emitting second sub-layer which are stacked; the third color light-emitting layer comprises a third color light-emitting first sub-layer and a third color light-emitting second sub-layer which are stacked; the first light emitting unit includes the first organic emission layer including the first color light emitting first sub-layer, the second color light emitting first sub-layer, and the third color light emitting first sub-layer; the second light emitting unit includes the second organic emission layer including the first color light emitting second sub-layer, the second color light emitting second sub-layer, and the third color light emitting second sub-layer.
For example, in the display substrate provided in at least one embodiment of the present utility model, the thickness of the first color light-emitting first sub-layer and the thickness of the first color light-emitting second sub-layer are different from each other; the second color light emitting first sub-layer and the second color light emitting second sub-layer have different thicknesses from each other; the thicknesses of the third color light-emitting first sub-layer and the third color light-emitting second sub-layer are different from each other.
For example, in the display substrate provided in at least one embodiment of the present utility model, the sum of the thicknesses of the first color light-emitting first sub-layer and the first color light-emitting second sub-layer, the sum of the thicknesses of the second color light-emitting first sub-layer and the second color light-emitting second sub-layer, and the sum of the thicknesses of the third color light-emitting first sub-layer and the third color light-emitting second sub-layer are different from each other.
For example, in the display substrate provided in at least one embodiment of the present utility model, a charge generating layer is provided at least between the first color light-emitting first sub-layer and the first color light-emitting second sub-layer, and/or between the second color light-emitting first sub-layer and the second color light-emitting second sub-layer, and/or between the third color light-emitting first sub-layer and the third color light-emitting second sub-layer.
For example, in the display substrate provided in at least one embodiment of the present utility model, the charge generation layer includes a first charge generation layer and a second charge generation layer that are stacked.
For example, in the display substrate provided in at least one embodiment of the present utility model, the first charge generation layer and the second charge generation layer are configured in accordance with a PN junction structure.
For example, in the display substrate provided in at least one embodiment of the present utility model, the first light emitting unit includes a hole injection layer, a first hole transport layer, a first electron blocking layer, the first organic emission layer, a first hole blocking layer, a first electron transport layer, and the first charge generation layer that are stacked; the second light emitting unit includes the second charge generation layer, a second hole transport layer, a second electron blocking layer, the second organic emission layer, a second hole blocking layer, a second electron transport layer, and an electron injection layer, which are stacked.
For example, in the display substrate provided in at least one embodiment of the present utility model, the third color-preserving film layer includes a stacked first portion including a third hole-injecting-preserving layer, a third hole-transporting first-preserving layer, a third electron-blocking first-preserving layer, a third color-emitting first-preserving layer, a third hole-blocking first-preserving layer, a third electron-transporting first-preserving layer, and a third charge-generating first-preserving layer, and a second portion including a stacked third charge-generating second-preserving layer, a third hole-transporting second-preserving layer, a third electron-blocking second-preserving layer, a third color-emitting second-preserving layer, a third hole-blocking second-preserving layer, a third electron-transporting second-preserving layer, a third electron-injecting-preserving layer, a second electrode-preserving third sub-layer, and a third blocking preserving layer.
For example, in the display substrate provided in at least one embodiment of the present utility model, the third color-preserving film layer includes a first portion and a second portion that are stacked, the first portion including a third hole-injecting-preserving layer, a third hole-transporting-first-preserving layer, a third electron-blocking-first-preserving layer, a third color-emitting-first-preserving layer, a third hole-blocking-first-preserving layer, a third electron-transporting-first-preserving layer, and a third charge-generating-first-preserving layer that are stacked, the second portion including a third charge-generating-second-preserving layer, a third hole-transporting-second-preserving layer, a third electron-blocking-second-preserving layer, a third color-emitting-second-preserving layer, a third hole-blocking-second-preserving layer, a third electron-injecting-preserving layer, a second electrode-preserving third sub-layer, and a third shielding-preserving layer that are stacked; and the second color retention film layer comprises a third portion and a fourth portion which are arranged in a stacked manner, wherein the third portion comprises a second hole injection retention layer, a second hole transport first retention layer, a second electron blocking first retention layer, a second color luminescence first retention layer, a second hole blocking first retention layer, a second electron transport first retention layer and a second charge generation first retention layer which are arranged in a stacked manner, and the fourth portion comprises a second charge generation second retention layer, a second hole transport second retention layer, a second electron blocking second retention layer, a second color luminescence second retention layer, a second hole blocking second retention layer, a second electron transport second retention layer, a second electron injection retention layer, a second electrode retention second sub-layer and a second shielding retention layer which are arranged in a stacked manner.
For example, in the display substrate provided in at least one embodiment of the present utility model, the first color light emitting layer, the second color light emitting layer, and the third color light emitting layer are a red light emitting layer, a green light emitting layer, and a blue light emitting layer, respectively, the first color light emitting layer, the second color light emitting layer, and the third color light emitting layer are phosphorescent light emitting layers, and the third color light emitting layer further has a boron element therein.
For example, in the display substrate provided in at least one embodiment of the present utility model, the red light emitting layer, the green light emitting layer, and the blue light emitting layer each include a host material and a phosphorescent material, and the molecular weight of the phosphorescent material included in the red light emitting layer is greater than the molecular weight of the phosphorescent material included in the green light emitting layer and greater than the molecular weight of the phosphorescent material included in the blue light emitting layer.
For example, in the display substrate provided in at least one embodiment of the present utility model, the first electrode includes a reflective metal layer and a transparent conductive layer that are stacked.
For example, in the display substrate provided in at least one embodiment of the present utility model, the material of the reflective metal layer includes at least one of aluminum and silver, and the material of the transparent conductive layer includes at least one of indium tin oxide and indium zinc oxide.
For example, in the display substrate provided in at least one embodiment of the present utility model, the second electrode includes a single-layer structure or a multi-layer structure formed of at least one of silver, aluminum, magnesium, lithium, calcium, lithium fluoride, indium tin oxide, and indium zinc oxide.
For example, in the display substrate provided in at least one embodiment of the present utility model, the transmittance of the first electrode is greater than 80%.
For example, in the display substrate provided in at least one embodiment of the present utility model, the pixel driving circuit includes a plurality of thin film transistors, at least one of the thin film transistors is a metal oxide thin film transistor, and at least one of the thin film transistors is a low temperature polysilicon thin film transistor.
The utility model also provides a preparation method of the display substrate, which comprises the following steps: providing a substrate; forming pixel units arranged in an array on the substrate, wherein each pixel unit comprises a plurality of sub-pixels for emitting light rays with different colors, and each sub-pixel comprises a light emitting element and a pixel driving circuit for driving the corresponding light emitting element to emit light; forming a pixel defining layer on a side of the pixel driving circuit remote from the substrate base plate; the pixel defining layer comprises a plurality of pixel openings, each pixel opening corresponds to one sub-pixel, and each pixel unit corresponds to a first color opening area, a second color opening area and a third color opening area which are adjacent in sequence; forming a first electrode in each pixel opening; forming a first color light emitting layer, a first functional layer, a second electrode first sub-layer and a first shielding layer at positions corresponding to the first color opening regions; forming a second color light emitting layer, a second functional layer, a second electrode second sub-layer and a second shielding layer at positions corresponding to the second color opening regions; and forming a third color luminescent film, a third functional film, a third sub-layer film of a second electrode and a third shielding film on one side of the first electrode, which is far away from the substrate and corresponds to the third color opening area, of the first shielding layer, the second shielding layer, the pixel defining layer and the third shielding film.
For example, in the manufacturing method provided in at least one embodiment of the present utility model, the third color light emitting film, the third functional film, the second electrode third sub-layer film, and the portion of the third shielding film at the position corresponding to the third color opening region are respectively used as a third color light emitting layer, a third functional layer, a second electrode third sub-layer, and a third shielding layer, and the remaining portion is used as a third color retention film layer.
For example, in the preparation method provided in at least one embodiment of the present utility model, the third functional layer includes a hole injection layer and a hole transport layer sequentially formed on a side of the third color light emitting layer close to the first electrode, and an electron transport layer and an electron injection layer sequentially formed on a side of the third color light emitting layer far from the first electrode; the third color retention film layer comprises a third hole injection retention layer, a third hole transmission retention layer, a third color luminescence retention layer, a third electron transmission retention layer, a third electron injection retention layer, a second electrode retention third sub-layer and a third shielding retention layer which are respectively formed on one sides of the first shielding layer and the second shielding layer, which are far away from the substrate.
For example, in the preparation method provided in at least one embodiment of the present utility model, in a process of forming the second color light emitting layer, the second functional layer, the second electrode second sub-layer, and the second shielding layer at a position corresponding to the second color opening area, the method further includes: and forming a second color retention film layer on the first shielding layer, wherein the second color retention film layer is arranged on one side of the third color retention film layer, which is close to the substrate.
For example, in the preparation method provided in at least one embodiment of the present utility model, the second color-preserving film layer includes a second hole injection-preserving layer, a second hole transport-preserving layer, a second color light-emitting-preserving layer, a second electron transport-preserving layer, a second electron injection-preserving layer, a second electrode-preserving second sub-layer, and a second shielding-preserving layer sequentially formed on a side of the first shielding layer away from the substrate.
For example, in the preparation method provided in at least one embodiment of the present utility model, the third color light-emitting layer includes a third color light-emitting first sub-layer and a third color light-emitting second sub-layer that are stacked, and the third color light-emitting first sub-layer is closer to the first electrode than the third color light-emitting second sub-layer; the third functional layer comprises a third functional first sub-layer and a third functional second sub-layer which are stacked, and the third functional first sub-layer is closer to the first electrode than the third functional second sub-layer; the third functional first sub-layer comprises a hole injection layer, a first hole transport layer and a first electron blocking layer which are sequentially formed on one side of the third color light-emitting first sub-layer, which is close to the first electrode, and a first hole blocking layer, a first electron transport layer and a first charge generation layer which are sequentially formed on one side of the third color light-emitting first sub-layer, which is far away from the first electrode; the third functional second sub-layer includes a second charge generation layer, a second hole transport layer, and a second electron blocking layer sequentially formed on a side of the third color light emitting second sub-layer near the first electrode, and a second hole blocking layer, a second electron transport layer, and an electron injection layer sequentially formed on a side of the third color light emitting second sub-layer far from the first electrode; the third color retention film layer comprises a third hole injection retention layer, a third hole transmission first retention layer, a third electron blocking first retention layer, a third color luminescence first retention layer, a third hole blocking first retention layer, a third electron transmission first retention layer, a third charge generation second retention layer, a third hole transmission second retention layer, a third electron blocking second retention layer, a third color luminescence second retention layer, a third hole blocking second retention layer, a third electron transmission second retention layer, a third electron injection retention layer, a second electrode retention third sub-layer and a third shielding retention layer which are respectively formed on one side of the first shielding layer and the second shielding layer away from the substrate in sequence.
For example, in the preparation method provided in at least one embodiment of the present utility model, in a process of forming the second color light emitting layer, the second functional layer, the second electrode second sub-layer, and the second shielding layer at a position corresponding to the second color opening area, the method further includes: and forming a second color retention film layer on the first shielding layer, wherein the second color retention film layer is arranged on one side of the third color retention film layer, which is close to the substrate.
For example, in the preparation method provided in at least one embodiment of the present utility model, the second color light-emitting layer includes a second color light-emitting first sub-layer and a second color light-emitting second sub-layer that are stacked, and the second color light-emitting first sub-layer is closer to the first electrode than the second color light-emitting second sub-layer; the second functional layer comprises a second functional first sub-layer and a second functional second sub-layer which are stacked, and the second functional first sub-layer is closer to the first electrode than the second functional second sub-layer; the second functional first sub-layer comprises a hole injection layer, a first hole transport layer and a first electron blocking layer which are sequentially formed on one side of the second color light-emitting first sub-layer, which is close to the first electrode, and a first hole blocking layer, a first electron transport layer and a first charge generation layer which are sequentially formed on one side of the second color light-emitting first sub-layer, which is far away from the first electrode; the second functional second sub-layer comprises a second charge generation layer, a second hole transport layer and a second electron blocking layer which are sequentially formed on one side of the second color light-emitting second sub-layer, which is close to the first electrode, and a second hole blocking layer, a second electron transport layer and an electron injection layer which are sequentially formed on one side of the second color light-emitting second sub-layer, which is far away from the first electrode; the second color retention film layer includes a second hole injection retention layer, a second hole transport first retention layer, a second electron blocking first retention layer, a second color luminescence first retention layer, a second hole blocking first retention layer, a second electron transport first retention layer, a second charge generation second retention layer, a second hole transport second retention layer, a second electron blocking second retention layer, a second color luminescence second retention layer, a second hole blocking second retention layer, a second electron transport second retention layer, a second electron injection retention layer, a second electrode retention second sub-layer, and a second blocking retention layer that are sequentially formed on a side of the first blocking layer and the second blocking layer away from the substrate, respectively.
For example, in the preparation method provided in at least one embodiment of the present utility model, forming the first color light emitting layer, the first functional layer, the second electrode first sub-layer, and the first shielding layer at positions corresponding to the first color opening regions includes: forming a first color light emitting film, a first functional film, a second electrode first sub-layer film, and a first shielding film on the pixel defining layer and a side of the first electrode away from the substrate; forming a first photoresist layer on the first shielding film and at a position corresponding to the first color opening area; patterning the first shielding film by taking the first photoresist layer as a mask to form a first shielding layer; and patterning the first color light-emitting film, the first functional film and the second electrode first sub-layer film by taking the first shielding layer as a mask so as to form the first color light-emitting layer, the first functional layer and the second electrode first sub-layer.
For example, in the preparation method provided in at least one embodiment of the present utility model, forming the second color light emitting layer, the second functional layer, the second electrode second sub-layer, and the second shielding layer at positions corresponding to the second color opening regions includes: forming a second color luminescent film, a second functional film, a second electrode second sub-layer film and a second shielding film on the first shielding layer, the pixel defining layer and the side of the first electrode corresponding to the second color opening region and the third color opening region, which is far away from the substrate; forming a second photoresist layer on the second shielding film and at positions corresponding to the first color opening area and the second color opening area; patterning the second shielding film by taking the second photoresist layer as a mask to form a second shielding layer; and patterning the second color light-emitting film, the second functional film and the second electrode second sub-layer film by taking the second shielding layer as a mask to form the second color light-emitting layer, the second functional layer and the second electrode second sub-layer, and forming a second color retaining film layer on the first shielding layer.
For example, in the preparation method provided in at least one embodiment of the present utility model, forming the second color light emitting layer, the second functional layer, the second electrode second sub-layer, and the second shielding layer at positions corresponding to the second color opening regions includes: forming a second color luminescent film, a second functional film, a second electrode second sub-layer film and a second shielding film on the first shielding layer, the pixel defining layer and the side of the first electrode corresponding to the second color opening region and the third color opening region, which is far away from the substrate; forming a second photoresist layer on the second shielding film and at a position corresponding to the second color opening area; patterning the second shielding film by taking the second photoresist layer as a mask to form a second shielding layer, and removing a second color retention film layer on the first shielding layer; and patterning the second color light emitting film, the second functional film and the second electrode second sub-layer film by taking the second shielding layer as a mask to form the second color light emitting layer, the second functional layer and the second electrode second sub-layer.
For example, the preparation method provided in at least one embodiment of the present utility model further includes forming a package structure on a side of the third shielding film away from the substrate.
For example, in the manufacturing method provided in at least one embodiment of the present utility model, the pixel defining layer includes a plurality of spacers that space adjacent pixel openings apart, forming an auxiliary electrode is further included before forming the pixel defining layer, and the auxiliary electrode is disposed in each of the spacers, and the auxiliary electrode and the second electrode are electrically connected through a first via structure.
For example, in the manufacturing method according to at least one embodiment of the present utility model, the pixel defining layer includes a plurality of spacers that space adjacent pixel openings, the plurality of spacers includes a first spacer, a second spacer, and a third spacer that are sequentially adjacent, and in forming the first electrode between the first spacer and the second spacer, a connection electrode is further formed between the second spacer and the third spacer.
For example, in the manufacturing method provided in at least one embodiment of the present utility model, after the pixel driving circuit is formed and before the pixel defining layer is formed, an auxiliary electrode, a planarization layer, and a second via structure penetrating through the planarization layer are further formed, the auxiliary electrode is disposed in the planarization layer, and the connection electrode and the auxiliary electrode are electrically connected through the second via structure.
For example, in the manufacturing method provided in at least one embodiment of the present utility model, the display substrate includes a display area and a peripheral area disposed around the periphery of the display area; a first common voltage connecting line, a second common voltage connecting line and a third common voltage connecting line are sequentially formed in the peripheral area from a position close to the display area to a position far from the display area; the first common voltage connection line, the second common voltage connection line, and the third common voltage connection line are electrically connected to a first light emitting element, a second light emitting element, and a third light emitting element including the first color light emitting layer, the second color light emitting layer, and the third color light emitting film, respectively.
For example, in the manufacturing method provided in at least one embodiment of the present utility model, the first light emitting element, the second light emitting element, and the third light emitting element are electrically connected through the first common voltage connection line, the second common voltage connection line, and the third common voltage connection line, and a power supply voltage line, respectively.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the following brief description of the drawings of the embodiments will make it apparent that the drawings in the following description relate only to some embodiments of the present utility model and are not limiting of the present utility model.
FIG. 1 is a schematic cross-sectional view of a display substrate according to at least one embodiment of the present disclosure;
Fig. 2 is a schematic circuit diagram of a pixel circuit according to an embodiment of the utility model;
FIG. 3 is a timing diagram of a driving method of the pixel circuit of FIG. 2;
FIG. 4 is a schematic cross-sectional view of another display substrate according to at least one embodiment of the present disclosure;
FIG. 5 is a schematic plan view of a display substrate according to at least one embodiment of the present disclosure;
FIG. 6 is a schematic cross-sectional view of the display substrate shown in FIG. 5;
FIG. 7 is a scanning electron microscope view showing a cross-sectional structure of the substrate shown in FIG. 6;
FIG. 8 is a schematic plan view of a display substrate according to at least one embodiment of the present disclosure;
FIG. 9 is a schematic cross-sectional view of the display substrate shown in FIG. 8;
FIG. 10 is a schematic cross-sectional view of a portion of a display substrate according to at least one embodiment of the present disclosure;
FIG. 11 is a schematic plan view of the first electrode and the connecting electrode shown in FIG. 10;
FIG. 12 is a schematic cross-sectional view of a display substrate according to at least one embodiment of the present disclosure;
FIG. 13 is a schematic cross-sectional view of a display substrate according to at least one embodiment of the present disclosure;
FIG. 14 is a schematic cross-sectional view of another display substrate according to at least one embodiment of the present disclosure;
FIG. 15 is a schematic cross-sectional view of another display substrate according to at least one embodiment of the present disclosure;
FIG. 16 is a schematic cross-sectional view of another display substrate according to at least one embodiment of the present disclosure;
FIG. 17 is a schematic plan view of a display substrate according to at least one embodiment of the present disclosure;
FIG. 18 is a schematic cross-sectional view of the display substrate shown in FIG. 17;
FIG. 19 is a schematic cross-sectional view of a display substrate according to at least one embodiment of the present disclosure;
FIG. 20 is a schematic cross-sectional view of a display substrate according to at least one embodiment of the present disclosure;
FIG. 21 is a schematic cross-sectional view of a display substrate according to at least one embodiment of the present disclosure;
FIG. 22 is a flowchart of a method for manufacturing a display substrate according to at least one embodiment of the present disclosure;
Fig. 23 to 29 are process diagrams illustrating a method for manufacturing a display substrate according to at least one embodiment of the present utility model;
fig. 23 to 30 are process diagrams illustrating a method for manufacturing a display substrate according to at least one embodiment of the present utility model;
fig. 31 to 37 are process diagrams illustrating a method for manufacturing a display substrate according to at least one embodiment of the present utility model;
fig. 31 to 38 are process diagrams illustrating a method for manufacturing a display substrate according to at least one embodiment of the present utility model;
Fig. 31 to 37 and fig. 39 to 41 are process diagrams illustrating another method for manufacturing a display substrate according to at least one embodiment of the present utility model;
fig. 31 to 37 and fig. 39 to 42 are process diagrams illustrating another method for manufacturing a display substrate according to at least one embodiment of the present utility model;
fig. 31 to 37 and fig. 39 to 43 are process diagrams illustrating another method for manufacturing a display substrate according to at least one embodiment of the present utility model;
Fig. 23 to 29 and fig. 44 to 49 are process diagrams illustrating another method for manufacturing a display substrate according to at least one embodiment of the present utility model;
FIGS. 23-29 and 44-50 are process diagrams illustrating another method for fabricating a display substrate according to at least one embodiment of the present disclosure; and
Fig. 23 to 29 and fig. 44 to 51 are process diagrams illustrating another method for manufacturing a display substrate according to at least one embodiment of the present utility model.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present utility model more clear, the technical solutions of the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present utility model. It will be apparent that the described embodiments are some, but not all, embodiments of the utility model. All other embodiments, which can be made by a person skilled in the art without creative efforts, based on the described embodiments of the present utility model fall within the protection scope of the present utility model.
Unless defined otherwise, technical or scientific terms used herein should be given the ordinary meaning as understood by one of ordinary skill in the art to which this utility model belongs. The terms "first," "second," and the like, as used herein, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate relative positional relationships, which may also be changed when the absolute position of the object to be described is changed.
Unless otherwise defined, features such as "parallel", "perpendicular" and "identical" as used in the embodiments of the present utility model include cases where "parallel", "perpendicular", "identical" and the like are in strict sense, and cases where "substantially parallel", "substantially perpendicular", "substantially identical" and the like include certain errors. For example, the above-described "approximately" may indicate that the difference of the compared objects is within 10%, or 5%, of the average value of the compared objects. Where in the following the number of an embodiment of the utility model is not specifically indicated, it means that the element or component may be one or more or it may be understood as at least one. "at least one" means one or more, and "a plurality" means at least two. The "same layer arrangement" in the embodiments of the present utility model refers to the relationship between multiple film layers formed by the same material after the same step (e.g., one-step patterning process). The term "same layer" herein does not always mean that the thickness of the plurality of film layers is the same or that the heights of the plurality of film layers are the same in the cross-sectional view.
The mass production process route of the active matrix organic light emitting Diode (Active Matrix Organic LIGHT EMITTING Diode, abbreviated as AMOLED) display technology can be divided into a large-size technology and a small-size technology, and as the RGB full-color display technology has the advantages of good display effect (high color purity), gorgeous color, high brightness, low power consumption and the like, the active matrix organic light emitting Diode occupies most market share at a mobile end, and as the display technology develops, the active matrix organic light emitting Diode has gradually expanded to the fields of vehicle-mounted technology, artificial intelligence and the like, but is limited by the current evaporation and Fine Metal Mask (FMM) technology level, the G6 (1500 x 1850 mm) and the generation lines above are still immature, the cost of the low-generation wire cutting technology is too high, so that the cost and the mass production efficiency cannot be considered, and the Half-Cut (Half Cut) adopted in the current generation line of the 6 th OLED has the defect that the utilization rate of a glass substrate is low, so that the development is not limited by the full-color scheme of the FMM technology becomes particularly important.
As the number of generations of the production line increases, the size of the equipment increases, and the investment scale increases accordingly, i.e., the investment scale of the 6 th generation production line increases greatly compared to the investment scale of the 4.5 th generation production line. Taking a rigid AMOLED production line as an example, the 4.5 th generation production line calculates about 50-70 hundred million investment according to 15K/month capacity, and the 6 th generation production line calculates about 100-140 hundred million investment according to 15K/month capacity. Under the condition of not considering other factors, the area of the glass substrate obtained by adopting the high-generation production line is larger, the generated economic effect is obvious, the yield is higher, and the investment cost of fixed assets for product allocation of the unit area display panel formed by adopting the high-generation production line is obviously reduced.
In addition, the main cutting size of the 4.5 th generation AMOLED production line is 1-4 inches, and the main cutting product is a panel product with smaller size such as intelligent wearing type. The 6 th generation AMOLED production line is mainly used for cutting products with a size of 5-17 inches, for example, products with a large panel size such as smartphones, tablet/notebook computers, and the like. Based on the consideration of cutting effectiveness, the large-size substrate is used for cutting the larger-size product, so that waste of substrate area caused by cutting the larger-size product by using the small-size substrate can be avoided, the utilization efficiency of the substrate is increased, and the cost is reduced. Moreover, the substrate size of the G6 generation or more is not mature and stable in FMM technology at present, so that the larger the substrate size is, the lower the cost per unit area is, which is not similar to the production line of the liquid crystal display panel.
Based on the design of the current G6 generation flexible LTPs-AMOLED production line, firstly, preparing a driving circuit on a flexible substrate with the size of 1500 x 1850, for example, the driving circuit comprises a pixel circuit, a GOA circuit, an EOA circuit, a capacitor, an ESD (electro-static discharge) and the like, then performing two-part cutting (one-part-two) to obtain a substrate with the size of 1500 x 385 mm, and then performing the process procedures of evaporation plating, film packaging and the like of an RGB full-color display device by utilizing an FMM (high-resolution membrane) technology, wherein the process design ensures that the substrate has disadvantages in cutting efficiency, preparation yield, production cost, medium-large-size high-resolution product planning and the like. For example, in the process of cutting and splitting the substrate in one-to-two manner, a cutting area and a buffer area with the width of 10-50 mm need to be reserved, and compared with the technical scheme of full-size evaporation, a certain proportion of substrate area is sacrificed, the yield of the substrate in unit area is reduced, and the cutting efficiency is reduced. In addition, the substrate can generate breaking loss in the process of cutting and splitting in one-to-two mode, so that the yield is reduced, the efficiency of the back-end packaging process is reduced by vapor deposition after splitting, and the preparation yield and the efficiency are required to be improved.
The inventors of the present utility model have noted that a full-scale array process, a vapor deposition process, and a packaging process may be employed to improve yield efficiency, and that RGB patterning film formation and preparation of an independent light emitting device may be achieved without using FMM technology, thereby saving manufacturing costs and cleaning costs of FMM. In addition, the RGB pixelation preparation is carried out only by means of partial equipment (such as an exposure machine and an etching machine) of the original production line, so that the position accuracy of the formed device is higher, and adverse phenomena such as color mixing, coating position deviation and the like are avoided. Moreover, as the size of display products increases, FMM processing difficulty increases significantly, especially high resolution (ppi > 320) FMM technology, but according to current exposure (CD > 2.0 μm) and etching process level (Space > 2.0 μm), the preparation of large-size high resolution display products has not been a major challenge, and the solution can also save process steps of dicing, splitting and edging, thereby further shortening the process flow.
The inventor of the utility model also notes that the preparation of the RGB full-color OLED pixelated device can be realized by three times of deposition of luminous layers and functional layers with different colors respectively and a patterning technology of twice exposure etching, namely under the condition of not using a Fine Metal Mask (FMM), so that the problem that the display resolution can not be further improved when the AMOLED evaporation technology is expanded into medium-and-large-size display products is solved, and the problems that the resolution of the products is limited by the FMM technology, the preparation difficulty of the medium-and-large-size high-resolution FMM is high and the production cost is high can be solved. The resolution and display effect of the display device can be improved by preparing large-size high-resolution RGB full-color AMOLED display products on the large-generation AMOLED production line through exposure and etching processes.
The inventor of the utility model notes that each film layer of the organic light emitting diode can be deposited on the driving backboard through mask plate thermal evaporation coating (EV), each film layer is protected by utilizing an ultrathin packaging layer, then the packaging layer and the OLED film layer deposited in partial areas are removed through exposure and etching, the OLED film layer comprises lamination layers of each functional layer of a cathode and an OLED, and the process is repeatedly carried out three times, so that the large-size high-resolution RGB pixelation can be realized, and the preparation of large-size high-resolution AMOLED products with the size of a G6 substrate of 1500 x 710 mm and above can be solved, and the application of the RGB full-color technology on the large size is not limited because of the preparation level of a fine metal mask plate (FMM).
At least one embodiment of the present utility model provides a display substrate, including: a substrate base; the pixel unit is arranged on the substrate base plate in an array mode, wherein each pixel unit comprises a plurality of sub-pixels emitting light rays with different colors, and each sub-pixel comprises a light emitting element and a pixel driving circuit driving the corresponding light emitting element to emit light; a pixel defining layer disposed on a side of the pixel driving circuit away from the substrate; the pixel defining layer includes a plurality of pixel openings, each pixel opening corresponding to one sub-pixel. For example, the display substrate is of a bottom emission type, that is, light is emitted from the bottom of the display substrate, which is a large-sized product and can be mass-produced.
For example, fig. 1 is a schematic cross-sectional structure of a display substrate according to at least one embodiment of the present utility model, and as shown in fig. 1, the display substrate 100 includes: a substrate 101, a pixel unit 102 disposed on the substrate 101 in an array, each pixel unit 102 including a plurality of sub-pixels 103 emitting light of different colors, each sub-pixel 103 including a light emitting element 1031 and a pixel driving circuit 1032 driving the corresponding light emitting element 1031 to emit light; a pixel defining layer 104 disposed on a side of the pixel driving circuit 1032 remote from the substrate 101, the pixel defining layer 104 including a plurality of pixel openings 1041, each pixel opening 1041 corresponding to one sub-pixel 103. For example, the display substrate having the structure is a large-sized display product, and the display product having the structure can be mass-produced, so that the production efficiency can be improved, and the production cost can be reduced.
For example, in one example, the display substrate 100 includes a plurality of pixel units 102 arranged in a matrix, each pixel unit 102 including red, green, and blue sub-pixels. Or each pixel cell 102 includes a white subpixel and a color conversion layer configured to convert white light emitted from the white subpixel into red, green, and blue light. The display substrate includes an active sub-pixel including a switching transistor, a capacitor, a driving transistor, and an organic light emitting diode. The switching transistor is configured to transmit a data signal in response to a scan signal, the capacitor is configured to store a data voltage corresponding to the data signal, the driving transistor is configured to generate a driving current corresponding to the data voltage, and the organic light emitting diode is configured to emit light corresponding to the driving current. For example, an active sub-pixel may be configured in a 2T1C (two transistors and one capacitor) structure, the 2T1C structure including a switching transistor, a capacitor, a driving transistor, and an organic light emitting diode, the active sub-pixel may be further configured to include at least one transistor and at least one capacitor to form a pixel circuit of other structure, and the sub-pixel may be formed in one of a top emission mode, a bottom emission mode, and a dual emission mode according to a light emitting direction.
For example, fig. 2 is a schematic circuit diagram of a pixel circuit according to an embodiment of the utility model, and as shown in fig. 2, the pixel circuit 121 includes: the first transistor T1, the second transistor T2, the driving transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, and the storage capacitor C.
For example, as shown in fig. 2, in order to further reduce the refresh frequency, the materials of the active layers of the first transistor T1 and the second transistor T2 may be designed as IGZO, and the second transistor G2 may be designed as a dual gate structure to reduce leakage current, thereby implementing adjustment of the 1-120 Hz dynamic refresh frequency, reducing driving power consumption, and extending the service life of the display substrate.
For example, as shown in fig. 2, the first transistor T1 is a first reset transistor T1, the second transistor T2 is a threshold compensation transistor T2, the fourth transistor T4 is a data writing transistor T4, the fifth transistor T5 is a second light emission control transistor T5, the sixth transistor T6 is a first light emission control transistor T6, and the seventh transistor T7 is a second reset control transistor T7.
For example, the first pole of the first transistor T1 is connected to the node N1, i.e. electrically connected to the gate of the driving transistor T3, the second pole of the first transistor T1 is connected to the first initial signal terminal Vinit1, i.e. electrically connected to the first reset signal line to receive the reset signal, and the gate of the first transistor T1 is connected to the first reset signal terminal Re1, i.e. electrically connected to the reset control signal line to receive the reset control signal; the first pole of the second transistor T2, namely the threshold compensation transistor, is connected with the N1 node, namely the first pole of the threshold compensation transistor is electrically connected with the grid electrode of the driving transistor T3, the second pole of the second transistor T2 is connected with the second pole of the driving transistor T3, and the grid electrode of the second transistor T2 is connected with the first grid electrode driving signal end G1 to receive a compensation control signal; the grid electrode of the driving transistor T3 is connected with the node N1 so as to be connected with the first polar plate of the storage capacitor C, the first pole of the first transistor T1 and the first pole of the second transistor T2; the first pole of the fourth transistor T4, i.e. the Data writing transistor, is connected to the Data signal terminal Data to receive the Data signal, the second pole of the fourth transistor T4 is connected to the first pole of the driving transistor T3, and the gate of the fourth transistor T4 is connected to the second gate driving signal terminal G2 to receive the scan signal; a first pole of the fifth transistor T5, that is, the second light emission control transistor is connected to the first power supply terminal VDD to receive the first power supply signal, a second pole of the fifth transistor T5 is connected to the first pole of the driving transistor T3, and a gate of the fifth transistor T5 is connected to the light emission control signal terminal EM to receive the light emission control signal; the first pole of the sixth transistor T6, i.e. the first light emitting control transistor is connected to the second pole of the driving transistor T3, the second pole of the sixth transistor T6 is connected to the first pole of the seventh transistor T7, and the gate of the sixth transistor T6 is connected to the light emitting control signal terminal EM to receive the light emitting control signal; the second pole of the seventh transistor T7 is connected to the second initial signal terminal Vinit2, i.e. electrically connected to the second reset power signal line to receive the reset signal Vinit, and the gate of the seventh transistor T7 is connected to the second reset signal terminal Re2, i.e. electrically connected to the reset control signal line to receive the reset control signal; the first polar plate of the storage capacitor C is connected with the N1 node and is electrically connected with the grid electrode of the driving transistor T3, and the second polar plate of the storage capacitor C is connected with the first power end VDD, namely, is connected with the first power signal line. The pixel circuit may be connected to the light emitting element 120, the light emitting element 120 may be an Organic Light Emitting Diode (OLED), the pixel circuit is configured to drive the light emitting element 120 to emit light, and the light emitting element 120 may be connected between the second electrode of the sixth transistor T6 and the second power terminal VSS, that is, connected to the second power signal line.
For example, the first power signal line refers to a signal line outputting a voltage signal VDD, and may be connected to a voltage source to output a constant voltage signal, such as a positive voltage signal. The second power signal line refers to a signal line outputting the voltage signal VSS, and may be connected to a voltage source to output a constant voltage signal, for example, a negative voltage signal.
For example, the scan signal and the compensation control signal may be the same, i.e., the gate of the data writing transistor T4 and the gate of the threshold compensation transistor T2 may be electrically connected to the same signal line to receive the same signal to reduce the number of signal lines. For example, the gate of the data writing transistor T4 and the gate of the threshold compensating transistor T2 may be electrically connected to different signal lines, respectively, that is, the gate of the data writing transistor T4 may be electrically connected to the second scan signal line (the second gate line), the gate of the threshold compensating transistor T2 may be electrically connected to the first scan signal line (the first gate line), and the signals transmitted by the first scan signal line and the second scan signal line may be the same or different, so that the gate of the data writing transistor T4 and the gate of the threshold compensating transistor T2 may be separately and individually controlled, thereby increasing flexibility in controlling the pixel circuit.
For example, the light emission control signals to which the first and second light emission control transistors T6 and T5 are input may be the same, i.e., the gate of the first light emission control transistor T6 and the gate of the second light emission control transistor T5 may be electrically connected to the same signal line to receive the same signal, reducing the number of signal lines. For example, the gate electrode of the first light emission control transistor T6 and the gate electrode of the second light emission control transistor T5 may be electrically connected to different light emission control signal lines, respectively, and in this case, signals transmitted by the different light emission control signal lines may be the same or different.
For example, the reset control signals to which the second reset transistor T7 and the first reset transistor T1 are input may be the same, i.e., the gate of the second reset transistor T7 and the gate of the first reset transistor T1 may be electrically connected to the same signal line to receive the same signal, reducing the number of signal lines. For example, the gate of the second reset transistor T7 and the gate of the first reset transistor T1 may be electrically connected to different reset control signal lines, respectively, and in this case, the signals on the different reset control signal lines may be the same or different.
For example, the first transistor T1 and the second transistor T2 may be N-type transistors. For example, the first transistor T1 and the second transistor T2 may be N-type metal oxide transistors, and the N-type metal oxide transistors have smaller leakage current, so that the light emitting stage can be avoided, and the N1 node leaks through the first transistor T1 and the second transistor T2. Meanwhile, the driving transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 may be P-type transistors, for example, the driving transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 may be P-type low temperature polysilicon transistors having higher carrier mobility, thereby being beneficial to realizing a display panel with high resolution, high reaction speed, high pixel density, and high aperture ratio. The first initial signal terminal Vinit1 and the second initial signal terminal Vinit2 may output the same or different voltage signals according to actual situations.
For example, fig. 3 is a timing chart of a driving method of the pixel circuit in fig. 2. For example, in fig. 3, G1 denotes the timing of the first gate driving signal terminal G1, G2 denotes the timing of the second gate driving signal terminal G2, re1 denotes the timing of the first reset signal terminal Re1, re2 denotes the timing of the second reset signal terminal Re2, EM denotes the timing of the emission control signal terminal EM, and Data denotes the timing of the Data signal terminal Data. The driving method of the pixel circuit may include a first reset phase t1, a compensation phase t2, a second reset phase t3, and a light emitting phase t4. In a first reset phase t1: the first reset signal terminal Re1 outputs a high level signal, the first transistor T1 is turned on, and the first initial signal terminal Vinit1 inputs an initial signal to the node N1. In the compensation phase t2: the first gate driving signal terminal G1 outputs a high level signal, the second gate driving signal terminal G2 outputs a low level signal, the fourth transistor T4 and the second transistor T2 are turned on, and the Data signal terminal Data outputs a driving signal to write a voltage vdata+vth (i.e. the sum of the voltages Vdata and Vth) to the node N1, wherein Vdata is the voltage of the driving signal, and Vth is the threshold voltage of the driving transistor T3. In the second reset phase T3, the second reset signal terminal Re2 outputs a low level signal, the seventh transistor T7 is turned on, and the second initial signal terminal Vinit2 inputs an initial signal to the second pole of the sixth transistor T6. Light emitting phase t4: the emission control signal terminal EM outputs a low level signal, and the sixth transistor T6 and the fifth transistor T5 are turned on, and the driving transistor T3 emits light under the voltage vdata+vth stored in the storage capacitor C.
It should be noted that, in the embodiment of the present utility model, each pixel circuit may be a structure including other number of transistors, such as a 7T2C structure, a 6T1C structure, a 6T2C structure, an 8T1C structure, or a 9T2C structure, besides the 7T1C structure (i.e., seven transistors and one capacitor) shown in fig. 2, which is not limited in the embodiment of the present utility model.
For example, as shown in fig. 1, a plurality of first electrodes 105 are respectively formed in different pixel openings 1041. In one example, the first electrode 105 is an anode formed of a transparent metal oxide, for example, the material of the first electrode 105 is indium gallium zinc oxide, and the first electrode 105 is defined as a red sub-pixel region, a green sub-pixel region, and a blue sub-pixel region, and the material of the first electrode 105 is a transparent metal oxide, and the display substrate is a bottom emission display substrate. For example, the transmittance of the first electrode 105 is greater than 80%.
For example, in another example, the first electrode 105 includes a first conductive layer and a second conductive layer that are stacked, the first conductive layer is made of a metal material having high reflectivity, and the second metal layer is made of a transparent conductive material. The material of the first conductive layer is at least one of metallic aluminum and metallic silver. The material of the second metal layer is at least one of indium tin oxide and indium zinc oxide.
For example, as shown in fig. 1, each pixel unit 102 includes three sub-pixels 103, and the colors of the light emitted by the three sub-pixels 103 are different, and may be red, green and blue, respectively. The light emitting element 1031 corresponding to each sub-pixel 103 includes a first electrode 105 and a light emitting unit 106 which are stacked, and three light emitting units 106 included in three sub-pixels 103 in the same pixel unit 102 include a first color light emitting layer 107, a second color light emitting layer 108, and a third color light emitting layer 109, respectively. In one example, the first, second, and third color light emitting layers 107, 108, and 109 may be red, green, and blue light emitting layers, respectively. For example, the second electrode 110 is disposed at a side of the light emitting unit 106 away from the substrate 101, the shielding layer 111 is disposed at a side of the second electrode 110 away from the substrate 101, and the third color-preserving film layer 112 is disposed at both a position of the shielding layer 111 away from the second color light emitting layer 108 and a position of the shielding layer 107 away from the first color light emitting layer, and patterning processes for the respective layer structures without using a fine mask can be realized by shielding the shielding layer 111 and photoresist, so that the method can be suitable for mass production.
For example, as shown in fig. 1, the light emitting unit 106 includes a functional layer and a light emitting layer which are stacked, the functional layer including a hole injecting layer 113, a hole transporting layer 114, an electron transporting layer 115, and an electron injecting layer 116 which are stacked in the direction away from the first electrode 105 in this order, the light emitting layer including a first color light emitting layer 107, a second color light emitting layer 108, and a third color light emitting layer 109, and the light emitting layer being disposed between the hole transporting layer 114 and the electron transporting layer 115 to realize recombination of holes and electrons in the light emitting layer to emit light.
For example, in one example, the material of the shielding layer 111 is an inorganic insulating material, and the material of the shielding layer 111 is at least one of silicon nitride, silicon carbonitride, and silicon carbide.
For example, in one example, as shown in fig. 1, a third color-retaining film layer 112 is further provided at a position of the shielding layer 111 away from the first color light-emitting layer 107, and at a position of the shielding layer 111 away from the second color light-emitting layer 108. The third color-retaining film layer 112 includes a third hole-injection retaining layer 1122, a third hole-transport retaining layer 1123, a third color-emission retaining layer 1121, a third electron-transport retaining layer 1124, and a third electron-injection retaining layer 1125, a second electrode-retaining third sub-layer 1126, and a third blocking retaining layer 1127, which are stacked. The third color-retaining film layer 112 includes a third color-light-emitting retaining layer 1121 and a third color-light-emitting layer 109 formed using the same material in the same process step. The third hole injection layer 1122 included in the third color retention film layer 112 and the hole injection layer 113 corresponding to the third color light emitting layer 109 are formed using the same material in the same process step. The third hole-transport layer 1123 included in the third color-retaining film layer 112 and the hole-transport layer 114 corresponding to the third color-emitting layer 109 are formed using the same material in the same process step. The third electron transport layer 1124 included in the third color preserving film layer 112 and the electron transport layer 115 corresponding to the third color light emitting layer 109 are formed using the same material in the same process step. The third electron injection retaining layer 1125 included in the third color retaining film layer 112 and the electron injection layer 116 corresponding to the third color light emitting layer 109 are formed using the same material in the same process step. The second electrode included in the third color-retaining film layer 112 retains the second electrode 110 corresponding to the third sub-layer 1126 and the third color light emitting layer 109 and is formed using the same material in the same process step. The third color-retaining film layer 112 includes a third shielding retaining layer 1127 and a shielding layer 111 corresponding to the third color light emitting layer 109 formed of the same material in the same process step.
For example, in one example, the second electrode 110 is a cathode disposed in a whole layer, and the material of the second electrode 110 may be a conductive metal.
For example, as shown in fig. 1, the maximum distance between the third color-retaining film layer 112 and the first color-emitting layer 107 at a position of the shielding layer 111 away from the first color-emitting layer 107 may be the same or different from the maximum distance between the third color-retaining film layer 112 and the second color-emitting layer 108 at a position of the shielding layer 111 away from the second color-emitting layer 108. For example, the sum of thicknesses of the first color light emitting layer 107 and the functional layer provided in a stacked manner therewith is larger than the sum of thicknesses of the second color light emitting layer 108 and the functional layer provided in a stacked manner therewith, for example, the sum of thicknesses of the hole injection layer 113, the hole transport layer 114, the first color light emitting layer 107, the electron transport layer 115, and the electron injection layer 116 included in the light emitting unit 106 including the first color light emitting layer 107 is larger than the sum of thicknesses of the hole injection layer 113, the hole transport layer 114, the second color light emitting layer 108, the electron transport layer 115, and the electron injection layer included in the light emitting unit 106 including the second color light emitting layer 108, so that the maximum distance between the third color retention film layer 112 and the first color light emitting layer 107 at a position of the shielding layer 111 distant from the first color light emitting layer 107 is larger than the maximum distance between the third color retention film layer 112 and the second color light emitting layer 108 at a position of the shielding layer 111 distant from the second color light emitting layer 108.
For example, as shown in fig. 1, an encapsulation structure 117 is disposed on a side of the third color-preserving film layer 112 away from the substrate 101, where the encapsulation structure 117 may include a first encapsulation layer, a second encapsulation layer, and a third encapsulation layer that are stacked, where the first encapsulation layer and the third encapsulation layer may be made of inorganic materials, the second encapsulation layer may be made of organic materials, and the second encapsulation layer is disposed between the first encapsulation layer and the third encapsulation layer, so that it may be ensured that external moisture cannot enter the light-emitting structure layer.
For example, fig. 4 is a schematic cross-sectional structure of another display substrate according to at least one embodiment of the present utility model, where the structure shown in fig. 4 is different from the structure shown in fig. 1 in that a second color-preserving film layer 122 is further disposed at a position of the shielding layer 111 away from the first color light emitting layer 107, and the second color-preserving film layer 122 and the third color-preserving film layer 112 are sequentially stacked in a direction away from the substrate 101. As shown in fig. 4, there are a second color-retaining film layer 122 and a third color-retaining film layer 112 that are stacked at a position of the shielding layer 111 away from the first color-emitting layer 107, and the second color-retaining film layer 122 is closer to the substrate 101 than the third color-retaining film layer 112. Only the third color-retaining film layer 112 is provided at a position of the shielding layer 111 away from the second color light emitting layer 108.
For example, as shown in fig. 4, the maximum distance between the third color-retaining film layer 112 and the first color-emitting layer 107 at a position of the shielding layer 111 away from the first color-emitting layer 107 is different from the maximum distance between the third color-retaining film layer 112 and the second color-emitting layer 108 at a position of the shielding layer 111 away from the second color-emitting layer 108, and a second color-retaining film layer 122 is spaced between the third color-retaining film layer 112 and the first color-emitting layer 107 at a position of the shielding layer 111 away from the first color-emitting layer 107, the second color-retaining film layer 122 including a multilayer laminated structure.
For example, as shown in fig. 4, the light emitting unit 106 includes a functional layer and a light emitting layer which are stacked, the functional layer including a hole injecting layer 113, a hole transporting layer 114, an electron transporting layer 115, and an electron injecting layer 116 which are stacked in this order in a direction away from the first electrode 105, the light emitting layer including a first color light emitting layer 107, a second color light emitting layer 108, and a third color light emitting layer 109, and the light emitting layer being disposed between the hole transporting layer 114 and the electron transporting layer 115 to realize recombination of holes and electrons in the light emitting layer to emit light. For example, the first color light emitting layer 107, the second color light emitting layer 108, and the third color light emitting layer 109 are provided on the same layer. The second color-retaining film layer 122 includes a second hole injection retaining layer 1222, a second hole transport retaining layer 1223, a second color light-emitting retaining layer 1221, a second electron transport retaining layer 1224, a second electron injection retaining layer 1225, a second electrode retaining second sub-layer 1226, and a second blocking retaining layer 1227 which are stacked, and the third color-retaining film layer 112 includes a third hole injection retaining layer 1122, a third hole transport retaining layer 1123, a third color light-emitting retaining layer 1121, a third electron transport retaining layer 1124, a third electron injection retaining layer 1125, a second electrode retaining third sub-layer 1126, and a third blocking retaining layer 1127 which are stacked.
For example, as shown in fig. 4, the third color-retaining film layer 112 provided at a position of the shielding layer 111 distant from the second color light emitting layer 108 includes a third hole injection retaining layer 1122, a third hole transport retaining layer 1123, a third color light emitting retaining layer 1121, a third electron transport retaining layer 1124, a third electron injection retaining layer 1125, a second electrode retaining third sub-layer 1126, and a third shielding retaining layer 1127, which are provided in a stacked manner. The respective layer structures included in the third color-retaining film layer 112 provided at a position of the shielding layer 111 away from the second color light emitting layer 108 and the corresponding respective layer structures included in the third color-retaining film layer 112 provided at a position of the shielding layer 111 away from the first color light emitting layer 107 are provided at different layers.
For example, fig. 5 is a schematic plan view of a display substrate according to at least one embodiment of the present utility model, as shown in fig. 5, the display substrate 100 includes a display area 130 and a peripheral area 140 disposed around the periphery of the display area 130, for example, the display area 130 is an area for display, and the peripheral area 140 is provided with traces and a flip-chip film 150. For example, as shown in fig. 5, on one side of the peripheral region 140 except for the flip chip film 150, on the other three sides, a first common voltage connection line 141, a second common voltage connection line 142, and a third common voltage connection line 143 are sequentially provided from a position close to the display region 130 to a position far from the display region 130, respectively, the first common voltage connection line 141, the second common voltage connection line 142, and the third common voltage connection line 143 being provided in different layers and all being connected to the flip chip film 150. A first cathode 1101a is disposed in a region surrounded by the first common voltage connection line 141 and the flip chip film 150, a second cathode 1101b is disposed in a region surrounded by the second common voltage connection line 142 and the flip chip film 150, a third cathode 1101c is disposed in a region surrounded by the third common voltage connection line 143 and the flip chip film 150, and the first cathode 1101a, the second cathode 1101b and the third cathode 1101c are located in different layer structures and are connected through the corresponding first common voltage connection line 141, second common voltage connection line 142 and the third common voltage connection line 143 and the flip chip film 150, respectively.
For example, fig. 6 is a schematic cross-sectional structure of the display substrate shown in fig. 5, and the cross-sectional structure shown in fig. 6 is described taking as an example that the second color-retaining film layer 122 and the third color-retaining film layer 112 are provided in a stacked manner at a position of the shielding layer 111 away from the first color-emitting layer 107, and only the third color-retaining film layer 112 is provided at a position of the shielding layer 111 away from the second color-emitting layer 108. Fig. 7 is a scanning electron microscope view showing a cross-sectional structure of the display substrate shown in fig. 6, and in each pixel unit, the light emitting element 1031 includes a first light emitting element 1031a, a second light emitting element 1031b, and a third light emitting element 1031c, the first light emitting element 1031a, the second light emitting element 1031b, and the third light emitting element 1031c include a first cathode 1101a, a second cathode 1101b, and a third cathode 1101c in different layers, respectively, and the first common voltage connection line 141, the second common voltage connection line 142, and the third common voltage connection line 143 are electrically connected to the first light emitting element 1031a, the second light emitting element 1031b, and the third light emitting element 1031c, respectively, in conjunction with fig. 5 and 6.
Although the first cathode 1101a, the second cathode 1101b, and the third cathode 1101c are located at the same layer in the schematic cross-sectional structure shown in fig. 6, in the actual product structure, the first cathode 1101a, the second cathode 1101b, and the third cathode 1101c are located at different layers as shown in fig. 7. Referring to fig. 5 to 7, the first cathode 1101a has a hollowed-out region at a position corresponding to the second light emitting element 1031b and the third light emitting element 1031 c; the second cathode 1101b has a hollowed-out area at a position corresponding to the first light emitting element 1031a and the third light emitting element 1031 c; the third cathode 1101c has a hollowed-out area at a position corresponding to the first light emitting element 1031a and the second light emitting element 1031 b.
For example, in conventional designs, the organic light emitting diode display device generally adopts a single-layer common cathode structure, that is, the cathodes corresponding to the sub-pixels with different colors are of the same layer structure, the cathode disposed on the whole layer is lapped on a power voltage signal line on an outer ring, and the power voltage signal line is electrically connected with the flip-chip thin film. However, in the manufacturing process of the display substrate provided by the embodiment of the utility model, after the light emitting layer, the functional layer, the cathode and the packaging layer corresponding to the first light emitting element are formed, the area covered by the packaging layer is larger than the area covered by the cathode, so that the packaging layer covers the edge of the cathode, or the packaging layer is not removed completely, or the thicknesses of the light emitting layer and the functional layer corresponding to the light emitting elements with different colors are different, so that the cathodes corresponding to the light emitting elements with different colors are positioned on different layers and are not electrically connected, and further, the light emitting elements with different colors cannot be electrically connected with the power supply voltage signal line by arranging a whole cathode. The embodiment of the present utility model makes it possible to make the first, second and third cathodes 1101a, 1101b and 1101c electrically connected by making the first, second and third light emitting elements 1031a, 1031b and 1031c respectively include the first, second and third cathodes 1101a, 1101b and 1101c electrically connected by making the first, second and third common voltage connection lines 141, 142 and 143 electrically connected to the first, second and third cathodes 1101a, 1101b electrically connected to the power voltage line and making the power voltage line and the flip-chip film 150 electrically connected by making the first, second and third common voltage connection lines 141, 142 and 143 electrically connected to the power voltage line on the peripheral area 140 of the periphery of the display area 130, and making the first, second and third common voltage connection lines 141, 142 and 143 electrically connected to the first, second and third cathodes 1101a, 1101b electrically connected to the first, 1101b and the flip-chip film 150 electrically connected by the simple manufacturing process provided by the embodiment of the present utility model.
It should be noted that, in another example, fig. 6 may also be a design based on the cross-sectional structure shown in fig. 1, that is, an example is described in which the third color retention film layer 112 is provided at a position of the shielding layer 111 away from the first color light emitting layer 107, and no retention structure is provided at a position of the shielding layer 111 away from the second color light emitting layer 108. In yet another example, fig. 6 may also be described taking the example that there is no remaining structure at a position of the shielding layer 111 away from the first color light emitting layer 107 and at a position of the shielding layer 111 away from the second color light emitting layer 108, and the specific structure is not illustrated.
For example, fig. 8 is a schematic plan view of another display substrate according to at least one embodiment of the present utility model, as shown in fig. 8, the display substrate 100 includes a display area 130 and a peripheral area 140 disposed around the periphery of the display area 130, for example, the display area 130 is an area for display, and the peripheral area 140 is provided with traces and a flip-chip film 150. For example, as shown in fig. 8, on one side of the peripheral region 140 except for the flip-chip film 150, on the other three sides, a first common voltage connection line 141, a second common voltage connection line 142, and a third common voltage connection line 143 are sequentially provided from a position close to the display region 130 to a position far from the display region 130, respectively, the first common voltage connection line 141, the second common voltage connection line 142, and the third common voltage connection line 143 are each connected to a power supply voltage line 133, the power supply voltage line 133 is connected to the flip-chip film 150, and an auxiliary electrode 1043 is further provided between adjacent light emitting elements in the display region 130.
For example, fig. 9 is a schematic cross-sectional structure of the display substrate shown in fig. 8, and the cross-sectional structure shown in fig. 9 is described taking as an example that there is no retention structure at a position of the shielding layer 111 away from the first color light emitting layer 107 and at a position of the shielding layer 111 away from the second color light emitting layer 108. In each pixel unit, as shown in fig. 8 and 9, the second electrode 110 is a cathode, the light emitting element 1031 includes a first light emitting element 1031a, a second light emitting element 1031b, and a third light emitting element 1031c, the first light emitting element 1031a, the second light emitting element 1031b, and the third light emitting element 1031c include a first cathode 1101a, a second cathode 1101b, and a third cathode 1101c in different layers, respectively, and the first common voltage connection line 141, the second common voltage connection line 142, and the third common voltage connection line 143 are electrically connected to the first light emitting element 1031a, the second light emitting element 1031b, and the third light emitting element 1031c, respectively.
For example, as shown in fig. 9, the pixel defining layer 104 further includes a plurality of spacers 1042 that space adjacent pixel openings 1041 apart, an auxiliary electrode 1043 is disposed in each of the spacers 1042, and the auxiliary electrode 1043 and the second electrode 110 are electrically connected through the first via structure 1044. For example, each auxiliary electrode 1043 is electrically connected to the cathode of the corresponding light emitting element, and the auxiliary electrode 1043 can realize reduction of the resistance of the cathode.
For example, in one example, the auxiliary electrode 1043 includes a multilayer structure that is stacked, and the multilayer structure included in the auxiliary electrode 1043 is connected in parallel through a via hole.
For example, in one example, the display substrate further includes a gate line, a data line, a power voltage signal line, and an initialization signal line, which are located in different layer structures, and the auxiliary electrode 1043 is disposed in a same layer as at least one of the gate line, the data line, the power voltage signal line, and the initialization signal line. For example, in one example, the auxiliary electrode 1043 includes a multi-layered structure disposed in the same layers as the gate line, the data line, the power supply voltage signal line, and the initialization signal line, respectively.
For example, in one example, the auxiliary electrodes 1043 corresponding to the first, second, and third light emitting elements 1031a, 1031b, and 1031c may be located at different layers.
Although the first cathode 1101a, the second cathode 1101b, and the third cathode 1101c are located at the same layer in the schematic cross-sectional structure shown in fig. 9, in the actual product structure, the first cathode 1101a, the second cathode 1101b, and the third cathode 1101c are located at different layers as shown in fig. 10. Referring to fig. 8 to 10, the first cathode 1101a has a hollowed-out region at a position corresponding to the second light emitting element 1031b and the third light emitting element 1031 c; the second cathode 1101b has a hollowed-out area at a position corresponding to the first light emitting element 1031a and the third light emitting element 1031 c; the third cathode 1101c has a hollowed-out area at a position corresponding to the first light emitting element 1031a and the second light emitting element 1031 b.
For example, in one example, the auxiliary electrode 1043 includes a first titanium metal layer, an aluminum metal layer, a second titanium metal layer, and a metal oxide layer, which are stacked in this order from a position close to the substrate 101 to a position distant from the substrate 101. For example, the first titanium metal layer has a thickness ranging from 100 to 800 angstroms, the aluminum metal layer has a thickness ranging from 2000 to 6000 angstroms, the second titanium metal layer has a thickness ranging from 100 to 500 angstroms, and the metal oxide layer has a thickness ranging from 100 to 300 angstroms. For example, in yet another example, the first titanium metal layer, aluminum metal layer, second titanium metal layer, and metal oxide layer are 500 angstroms, 5000 angstroms, 300 angstroms, and 200 angstroms, respectively, in thickness.
For example, in one example, a first interlayer insulating layer and a second interlayer insulating layer are provided between adjacent layers formed of a first titanium metal layer, an aluminum metal layer, a second titanium metal layer, and a metal oxide layer, the first interlayer insulating layer being an organic insulating layer, the thickness of the first interlayer insulating layer being 1.5 μm, the material of the second interlayer insulating layer being an inorganic insulating layer, the material of the second interlayer insulating layer specifically being silicon nitride, the thickness of the second interlayer insulating layer being 300 to 1000 angstroms.
For example, in one example, the auxiliary electrode 1043 includes a first titanium metal layer, an aluminum metal layer, a second titanium metal layer, and a metal oxide layer, which are stacked in this order from a position close to the substrate 101 to a position distant from the substrate 101.
For example, as shown in fig. 9, a package structure 117 is disposed on a side of the second electrode 110 away from the substrate 101, where the package structure 117 includes a first package layer 1171, a second package layer 1172, and a third package layer 1173 that are stacked, the first package layer 1171 and the third package layer 1173 may be made of an inorganic material, the second package layer 1172 may be made of an organic material, the second package layer 1172 is disposed between the first package layer 1171 and the third package layer 1173, and the stacked package structure 117 may ensure that external moisture cannot enter the light emitting layers of the respective light emitting elements.
For example, fig. 10 is a schematic cross-sectional structure of a portion of another display substrate according to at least one embodiment of the present utility model, fig. 11 is a schematic plan view of a first electrode and a connection electrode shown in fig. 10, and, in combination with fig. 10 and 11, the display substrate 100 includes a pixel driving circuit 1032, a planarization layer 118 and a pixel defining layer 104 disposed on a side of the pixel driving circuit 1032 away from the substrate 101, the pixel defining layer 104 further includes a plurality of spacers 119, the plurality of spacers 119 includes a first spacer 1191, a second spacer 1192 and a third spacer 1193 that are sequentially adjacent, a first electrode 105 is disposed between the first spacer 1191 and the second spacer 1192, and a connection electrode 161 is disposed between the second spacer 1192 and the third spacer 1193, that is, the first electrode 105 or the connection electrode 161 is disposed between the adjacent two spacers 119, and the length of the first electrode 105 and the connection electrode 161 are sequentially alternately disposed.
For example, as shown in fig. 10, the first electrode 105 and the connection electrode 161 are formed using the same material in the same process step. For example, the first electrode 105 and the connection electrode 161 are each formed of indium tin oxide, and the thickness of the first electrode 105 and the connection electrode 161 is smaller than the thickness of the spacer.
For example, as shown in fig. 10, an auxiliary electrode 1043 is further disposed on a side of the layer where the pixel driving circuit 1032 is located, which is away from the substrate 101, and a planarization layer 118 is further disposed between the auxiliary electrode 1043 and the pixel defining layer 104, and the connection electrode 161 and the auxiliary electrode 1043 are electrically connected through a second via structure 1045 located in the planarization layer 118, so that the connection electrode 161 and the second electrode 110 are electrically connected, so as to further reduce the resistance of the second electrode 110.
For example, in one example, the plurality of auxiliary electrodes 1043 are connected to form a grid-like structure, and the grid-like structure may reduce the resistance of the auxiliary electrode 1043, and eventually further reduce the resistance of the second electrode 110 connected to the auxiliary electrode 1043.
For example, in one example, the auxiliary electrode 1043 includes a stacked structure formed of a molybdenum metal layer, a copper metal layer, a titanium metal layer, an aluminum metal layer, and a titanium metal layer, or a stacked structure formed of an indium tin oxide layer, a silver metal layer, and an indium tin oxide layer, and the auxiliary electrode 1043 is formed of a multi-layered stacked structure, which can further reduce the resistance of the auxiliary electrode 1043.
For example, in one example, the auxiliary electrode 1043 has a thickness of 1000 to 6000 angstroms, and the sheet resistance of the auxiliary electrode 1043 is 0 to 0.5 Ω/sq. For example, the auxiliary electrode 1043 has a thickness of 1000 angstroms, 2000 angstroms, 3000 angstroms, 4000 angstroms, 5000 angstroms and 6000 angstroms, and the corresponding sheet resistances may be 0.1 Ω/sq, 0.2 Ω/sq, 0.3 Ω/sq, 0.4 Ω/sq, 0.45 Ω/sq and 0.5 Ω/sq, respectively.
For example, in one example, the connection resistance of the second electrode 110 and the connection electrode 161 is 0 to 0.1 Ω, that is, the connection resistance of the second electrode 110 and the connection electrode 161 is greatly reduced with respect to the second electrode 110 alone.
For example, as shown in fig. 11, the first electrodes 105 and the connection electrodes 161 are arranged at intervals from each other, and at least two connection electrodes 161 are arranged between each adjacent two of the first electrodes 105.
For example, the structure in this embodiment is combined with the embodiment shown in fig. 8, and as shown in fig. 8 and 10, the first light emitting element 1031a, the second light emitting element 1031b, and the third light emitting element 1031c are electrically connected to the power supply voltage line 133 through the first common voltage connection line 141, the second common voltage connection line 142, and the third common voltage connection line 143, respectively, and the power supply voltage line 133 is connected to the flip-chip film 150.
For example, fig. 12 is a schematic cross-sectional structure of a further display substrate according to at least one embodiment of the present utility model, as shown in fig. 12, each light emitting unit 106 includes a first light emitting unit 1061 and a second light emitting unit 1062 that are stacked, and the second electrode 110 is disposed on a side of the second light emitting unit 1062 away from the substrate 101, where the efficiency of light emission by the light emitting unit 106 can be improved by stacking the first light emitting unit 1061 and the second light emitting unit 1062 to form one light emitting unit 106, and the color purity of light emitted by the light emitting unit 106 can be made to be greater.
For example, as shown in fig. 12, the light emitting layers 133 include a first color light emitting layer 107, a second color light emitting layer 108, and a third color light emitting layer 109, and each light emitting layer 133 includes a first organic light emitting layer 1331 and a second organic light emitting layer 1332 that are stacked; the first color light emitting layer 107 includes a first color light emitting first sub-layer 1071 and a first color light emitting second sub-layer 1072 which are stacked; the second color light emitting layer 108 includes a second color light emitting first sub-layer 1081 and a second color light emitting second sub-layer 1082 which are stacked; the third color light emitting layer 109 includes a third color light emitting first sub-layer 1091 and a third color light emitting second sub-layer 1092 which are stacked; the first light emitting unit 1061 includes a first organic emission layer 1331, the first organic emission layer 1331 including a first color light emitting first sub-layer 1071, a second color light emitting first sub-layer 1081, and a third color light emitting first sub-layer 1091; the second light emitting unit 1062 includes a second organic emission layer 1332, and the second organic emission layer 1332 includes a first color light emitting second sub-layer 1072, a second color light emitting second sub-layer 1082, and a third color light emitting second sub-layer 1092.
For example, in one example, the thickness of the first color light emitting first sub-layer 1071 and the thickness of the first color light emitting second sub-layer 1072 are different from each other; the second color light emitting first sub-layer 1081 and the second color light emitting second sub-layer 1082 are different in thickness from each other; the thicknesses of the third color light emitting first sub-layer 1091 and the third color light emitting second sub-layer 1092 are different from each other. For example, the thickness of the first color light emitting first sub-layer 1071 and the thickness of the first color light emitting second sub-layer 1072 are set to be different from each other, the thickness of the second color light emitting first sub-layer 1081 and the second color light emitting second sub-layer 1082 are set to be different from each other, and the thickness of the third color light emitting first sub-layer 1091 and the third color light emitting second sub-layer 1092 are designed to be different from each other, it is possible to reduce the difference in distance between the light emitting layer in the first light emitting unit 1061 and the light emitting layer in the second light emitting unit 1062 and the first electrode or the second electrode, which results in the difference in efficiency of the outgoing light effect, that is, the above-described design is possible to allow the efficiency of the first light emitting unit 1061 and the second light emitting unit 1062 to emit light.
For example, in one example, the sum of the thicknesses of the first color-emitting first sub-layer 1071 and the first color-emitting second sub-layer 1072 is different from the sum of the thicknesses of the second color-emitting first sub-layer 1081 and the second color-emitting second sub-layer 1082 and the sum of the thicknesses of the third color-emitting first sub-layer 1091 and the third color-emitting second sub-layer 1092.
For example, in one example, the charge generation layer 123 is disposed at least between the first color-emitting first sub-layer 1071 and the first color-emitting second sub-layer 1072, and/or between the second color-emitting first sub-layer 1081 and the second color-emitting second sub-layer 1082, and/or between the third color-emitting first sub-layer 1091 and the third color-emitting second sub-layer 1092.
For example, in one example, the charge generation layer 123 includes a first charge generation layer 1231 and a second charge generation layer 1232 that are stacked. For example, the first charge generation layer 1231 and the second charge generation layer 1232 are structured in a PN junction structure, the first charge generation layer 1231 being an N-type charge generation layer, the second charge generation layer 1232 being a P-type charge generation layer.
For example, in one example, as shown in fig. 12, the first light emitting unit 1061 includes a hole injection layer 113, a first hole transport layer 1141, a first electron blocking layer 124, a first organic emission layer 1331, a first hole blocking layer 125, a first electron transport layer 1151, and a first charge generation layer 1231, which are stacked; the second light emitting unit 1062 includes a second charge generating layer 1232, a second hole transporting layer 1142, a second electron blocking layer 126, a second organic emission layer 1332, a second hole blocking layer 127, a second electron transporting layer 1152, and an electron injecting layer 116, which are stacked.
For example, in one example, as shown in fig. 12, the third color-retaining film layer 112 includes a first portion 112a and a second portion 112b which are stacked, the first portion 112a includes a third hole-injection retaining layer 1122, a third hole-transport first retaining layer 1123a, a third electron-blocking first retaining layer 1241, a third color-emission first retaining layer 1121a, a third hole-blocking first retaining layer 1251, a third electron-transport first retaining layer 1124a, and a third charge-generation first retaining layer 1231a which are stacked, and the second portion 112b includes a third charge-generation second retaining layer 1231b, a third hole-transport second retaining layer 1123b, a third electron-blocking second retaining layer 1261, a third color-emission second retaining layer 1121b, a third hole-blocking second retaining layer 1252, a third electron-transport second retaining layer 1124b, a third electron-injection retaining layer 1125, a second electrode-retaining third sub-layer 1126, and a third blocking retaining layer 1127 which are stacked.
For example, fig. 13 is a schematic cross-sectional structure of a display substrate according to at least one embodiment of the present utility model, where, as shown in fig. 13, the third color retention film 112 includes a first portion 112a and a second portion 112b stacked together, the first portion 112a includes a third hole injection retention layer 1122, a third hole transport first retention layer 1123a, a third electron blocking first retention layer 1241, a third color light emitting first retention layer 1121a, a third hole blocking first retention layer 1251, a third electron transport first retention layer 1124a, and a third charge generation first retention layer 1231a stacked together, and the second portion 112b includes a third charge generation second retention layer 1231b, a third hole transport second retention layer 1123b, a third electron blocking second retention layer 1261, a third color light emitting second retention layer 1121b, a third hole blocking second retention layer 1252, a third electron transport second retention layer 1124b, a third electron injection retention layer 1125, a third electrode 1126, and a third electrode 1127 retention layer; and the second color retention film layer 122 includes a third portion 122a and a fourth portion 122b which are stacked, the third portion 122a includes a second hole injection retention layer 1222, a second hole transport first retention layer 12231, a second electron blocking first retention layer 1262, a second color light emitting first retention layer 1221a, a second hole blocking first retention layer 1271, a second electron transport first retention layer 12241, a second charge generation first retention layer 12321, and the fourth portion 122b includes a second charge generation second retention layer 12322, a second hole transport second retention layer 12231, a second electron blocking second retention layer 1263, a second color light emitting second retention layer 1222b, a second hole blocking second retention layer 1253, a second electron transport second retention layer 12242, a second electron injection retention layer 1225, a second electrode retention second sub-layer 1226, and a second blocking retention layer 1227 which are stacked.
For example, in one example, as shown in fig. 12 and 13, the first color light emitting layer 107, the second color light emitting layer 108, and the third color light emitting layer 109 are a red light emitting layer, a green light emitting layer, and a blue light emitting layer, respectively, the first color light emitting layer 107, the second color light emitting layer 108, and the third color light emitting layer 109 are phosphorescent light emitting layers, and the third color light emitting layer 109 further has a boron element therein.
For example, in one example, the red, green, and blue light emitting layers each include a host material and a phosphorescent material, and the red light emitting layer includes a phosphorescent material having a molecular weight greater than that of the green light emitting layer and greater than that of the blue light emitting layer.
For example, in one example, the first electrode 105 includes a reflective metal layer and a transparent conductive layer that are stacked, which may reduce the resistance of the first electrode 105, and the display substrate is a top-emission display substrate.
For example, in one example, the material of the reflective metal layer includes at least one of aluminum and silver, and the material of the transparent conductive layer includes at least one of indium tin oxide and indium zinc oxide.
For example, in one example, the second electrode 110 includes a single-layer structure or a multi-layer structure formed of at least one of silver, aluminum, magnesium, lithium, calcium, lithium fluoride, indium tin oxide, and indium zinc oxide.
For example, in one example, the display substrate is a bottom emission display substrate, and the transmittance of the first electrode is greater than 80%.
For example, in one example, the pixel driving circuit 1032 includes a plurality of thin film transistors 1032a, at least one thin film transistor 1032a is a metal oxide thin film transistor, and at least one thin film transistor is a low temperature polysilicon thin film transistor.
In another embodiment of the present utility model, for example, fig. 14 is a schematic cross-sectional structure of another display substrate provided in at least one embodiment of the present utility model, as shown in fig. 14, the display substrate 100 includes: a substrate 101; pixel units 102 arranged on the substrate 101 in an array, each pixel unit 102 including a plurality of sub-pixels 103 emitting light of different colors, each sub-pixel 103 including a light emitting element 1031 and a pixel driving circuit 1032 driving the corresponding light emitting element 1031 to emit light; a pixel defining layer 104 provided on a side of the pixel driving circuit 1032 remote from the substrate 101; the pixel defining layer 104 includes a plurality of pixel openings 1041, each pixel opening 1041 corresponding to one sub-pixel 103, and the pixel defining layer 104 further includes a plurality of spacers 119 separating adjacent pixel openings 1041, and an auxiliary electrode 1043 is disposed in each of the spacers 119, and the auxiliary electrode 1043 and the second electrode 110 are electrically connected through the first via structure 1044 to reduce the resistance of the second electrode 110.
For example, in one example, the boundary of the second electrode 110 is located in the display region, and the second electrode 110 is electrically connected in the display region to one of the gate line layer, the data line layer, and the power supply voltage line layer.
For example, in one example, the auxiliary electrode 1043 includes a first titanium metal layer, an aluminum metal layer, a second titanium metal layer, and a metal oxide layer, which are stacked in this order from a position close to the substrate 101 to a position distant from the substrate 101. For example, the first titanium metal layer has a thickness ranging from 100 to 800 angstroms, the aluminum metal layer has a thickness ranging from 2000 to 6000 angstroms, the second titanium metal layer has a thickness ranging from 100 to 500 angstroms, and the metal oxide layer has a thickness ranging from 100 to 300 angstroms. For example, in yet another example, the first titanium metal layer, aluminum metal layer, second titanium metal layer, and metal oxide layer are 500 angstroms, 5000 angstroms, 300 angstroms, and 200 angstroms, respectively, in thickness.
For example, in one example, a first interlayer insulating layer and a second interlayer insulating layer are provided between adjacent layers formed of a first titanium metal layer, an aluminum metal layer, a second titanium metal layer, and a metal oxide layer, the first interlayer insulating layer being an organic insulating layer, the thickness of the first interlayer insulating layer being 1.5 μm, the material of the second interlayer insulating layer being an inorganic insulating layer, the material of the second interlayer insulating layer specifically being silicon nitride, the thickness of the second interlayer insulating layer being 300 to 1000 angstroms.
For example, in one example, the auxiliary electrode 1043 includes a first titanium metal layer, an aluminum metal layer, a second titanium metal layer, and a metal oxide layer, which are stacked in this order from a position close to the substrate 101 to a position distant from the substrate 101.
For example, in one example, the plurality of auxiliary electrodes 1043 are connected to form a grid-like structure, and the grid-like structure may reduce the resistance of the auxiliary electrode 1043, and eventually further reduce the resistance of the second electrode 110 connected to the auxiliary electrode 1043.
For example, as shown in fig. 14, each pixel unit 102 includes three sub-pixels 103, the light emitting element 1031 corresponding to each sub-pixel 103 includes a first electrode 105 and a light emitting unit 106 which are stacked, and the light emitting units 106 included in the three sub-pixels 103 in the same pixel unit 102 include a first color light emitting layer 107, a second color light emitting layer 108, and a third color light emitting layer 109, respectively; the second electrode 110 is disposed on a side of the light emitting unit 106 away from the substrate 101, and the package structure 117 is disposed on a side of the second electrode 110 away from the substrate 101, although only a single-layer structure is illustrated in fig. 14, in other examples, the package structure 117 may include a first package layer, a second package layer, and a third package layer that are stacked, the first package layer and the third package layer may be made of an inorganic material, the second package layer may be made of an organic material, and the second package layer is disposed between the first package layer and the third package layer, so that external moisture may not enter the light emitting structure layer.
For example, although the second electrodes 110 corresponding to the adjacent three sub-pixels 103 are located at the same layer in the schematic cross-sectional structure shown in fig. 14, the second electrodes 110 corresponding to the adjacent three sub-pixels 103 are located at different layers in the actual product structure.
For example, fig. 15 is a schematic cross-sectional structure of another display substrate according to at least one embodiment of the present utility model, where the structure of the display substrate shown in fig. 15 is different from the structure of the display substrate shown in fig. 14 in that a shielding layer 111 is further disposed on a side of the second electrode 110 away from the substrate 101, that is, the shielding layer 111 is located between the second electrode 110 and the package structure 117. For example, the material of the shielding layer 111 is an inorganic insulating material.
For example, in the embodiment of the present utility model, since unnecessary portions for forming the corresponding light emitting element are removed by the photoresist material, the shielding layer 111 is required to be shielded, so that the shielding layer 111 is maintained.
For example, the structure of the display substrate shown in fig. 15 is also different from that of the display substrate shown in fig. 14 in that a third color-retaining film layer 112 is provided at a position of the shielding layer 111 away from the second color light-emitting layer 108 and at a position away from the first color light-emitting layer 107. The cross-sectional structure shown in fig. 15 is the same as that shown in fig. 14, and is not described in detail herein, only the differences are described.
For example, in one example, the third color-preserving film layer 112 includes a third hole-injection-preserving layer 1122, a third hole-transport-preserving layer 1123, a third color-emission-preserving layer 1121, a third electron-transport-preserving layer 1124, and a third electron-injection-preserving layer 1125, a second electrode-preserving third sub-layer 1126, and a third blocking-preserving layer 1127, which are stacked. The third color-retaining film layer 112 includes a third color-light-emitting retaining layer 1121 and a third color-light-emitting layer 109 formed using the same material in the same process step. The third hole injection layer 1122 included in the third color retention film layer 112 and the hole injection layer 113 corresponding to the third color light emitting layer 109 are formed using the same material in the same process step. The third hole-transport layer 1123 included in the third color-retaining film layer 112 and the hole-transport layer 114 corresponding to the third color-emitting layer 109 are formed using the same material in the same process step. The third electron transport layer 1124 included in the third color preserving film layer 112 and the electron transport layer 115 corresponding to the third color light emitting layer 109 are formed using the same material in the same process step. The third electron injection retaining layer 1125 included in the third color retaining film layer 112 and the electron injection layer 116 corresponding to the third color light emitting layer 109 are formed using the same material in the same process step. The second electrode included in the third color-retaining film layer 112 retains the second electrode 110 corresponding to the third sub-layer 1126 and the third color light emitting layer 109 and is formed using the same material in the same process step. The third color-retaining film layer 112 includes a third shielding retaining layer 1127 and a shielding layer 111 corresponding to the third color light emitting layer 109 formed of the same material in the same process step.
For example, fig. 16 is a schematic cross-sectional structure of another display substrate according to at least one embodiment of the present utility model, where the structure of the display substrate shown in fig. 16 is different from the structure of the display substrate shown in fig. 15 in that a second color-preserving film layer 122 is further disposed at a position of the shielding layer 111 away from the first color light emitting layer 107, that is, the second color-preserving film layer 122 and the third color-preserving film layer 112 are sequentially stacked in a direction away from the substrate 101, but only the third color-preserving film layer 112 is disposed at a position of the shielding layer 111 away from the second color light emitting layer 108. The cross-sectional structure shown in fig. 16 is the same as that shown in fig. 15, and is not described in detail herein, only the differences are described.
For example, as shown in fig. 16, the maximum distance between the third color-retaining film layer 112 and the first color-emitting layer 107 at a position of the shielding layer 111 away from the first color-emitting layer 107 is different from the maximum distance between the third color-retaining film layer 112 and the second color-emitting layer 108 at a position of the shielding layer 111 away from the second color-emitting layer 108, and a second color-retaining film layer 122 is spaced between the third color-retaining film layer 112 and the first color-emitting layer 107 at a position of the shielding layer 111 away from the first color-emitting layer 107, the second color-retaining film layer 122 including a multilayer laminated structure.
For example, as shown in fig. 16, the light emitting unit 106 includes a functional layer and a light emitting layer which are stacked, the functional layer including a hole injecting layer 113, a hole transporting layer 114, an electron transporting layer 115, and an electron injecting layer 116 which are stacked in this order in a direction away from the first electrode 105, the light emitting layer including a first color light emitting layer 107, a second color light emitting layer 108, and a third color light emitting layer 109, and the light emitting layer being disposed between the hole transporting layer 114 and the electron transporting layer 115 to realize recombination of holes and electrons in the light emitting layer to emit light. For example, the first color light emitting layer 107, the second color light emitting layer 108, and the third color light emitting layer 109 are provided on the same layer. The second color-retaining film layer 122 includes a second hole injection retaining layer 1222, a second hole transport retaining layer 1223, a second color light-emitting retaining layer 1221, a second electron transport retaining layer 1224, a second electron injection retaining layer 1225, a second electrode retaining second sub-layer 1226, and a second blocking retaining layer 1227 which are stacked, and the third color-retaining film layer 112 includes a third hole injection retaining layer 1122, a third hole transport retaining layer 1123, a third color light-emitting retaining layer 1121, a third electron transport retaining layer 1124, a third electron injection retaining layer 1125, a second electrode retaining third sub-layer 1126, and a third blocking retaining layer 1127 which are stacked.
For example, as shown in fig. 16, the third color-retaining film layer 112 provided at a position of the shielding layer 111 distant from the second color light emitting layer 108 includes a third hole injection retaining layer 1122, a third hole transport retaining layer 1123, a third color light emitting retaining layer 1121, a third electron transport retaining layer 1124, a third electron injection retaining layer 1125, a second electrode retaining third sub-layer 1126, and a third shielding retaining layer 1127, which are provided in a stacked manner. The respective layer structures included in the third color-retaining film layer 112 provided at a position of the shielding layer 111 away from the second color light emitting layer 108 and the corresponding respective layer structures included in the third color-retaining film layer 112 provided at a position of the shielding layer 111 away from the first color light emitting layer 107 are provided at different layers.
For example, as shown in fig. 16, an encapsulation structure 117 is disposed on a side of the third color-preserving film layer 112 away from the substrate 101, and features of the encapsulation structure 117 may be referred to in the above description, which is not repeated herein.
For example, fig. 17 is a schematic plan view of a display substrate according to at least one embodiment of the present utility model, as shown in fig. 17, the display substrate 100 includes a display area 130 and a peripheral area 140 disposed around the periphery of the display area 130, for example, the display area 130 is an area for display, and the peripheral area 140 is provided with traces and a flip-chip film 150. For example, as shown in fig. 17, on one side of the peripheral region 140 except for the flip-chip film 150, on the other three sides, a first common voltage connection line 141, a second common voltage connection line 142, and a third common voltage connection line 143 are sequentially provided from a position close to the display region 130 to a position far from the display region 130, respectively, the first common voltage connection line 141, the second common voltage connection line 142, and the third common voltage connection line 143 are each connected to a power supply voltage line 133, the power supply voltage line 133 is connected to the flip-chip film 150, and an auxiliary electrode 1043 is further provided between adjacent light emitting elements in the display region 130.
For example, fig. 18 is a schematic cross-sectional structure of the display substrate shown in fig. 17, and the cross-sectional structure shown in fig. 18 is described taking as an example that there is no retention structure at a position of the shielding layer 111 away from the first color light emitting layer 107 and at a position of the shielding layer 111 away from the second color light emitting layer 108. In each pixel unit, as shown in fig. 17 and 18, the second electrode 110 is a cathode, the light emitting element 1031 includes a first light emitting element 1031a, a second light emitting element 1031b, and a third light emitting element 1031c, the first light emitting element 1031a, the second light emitting element 1031b, and the third light emitting element 1031c include a first cathode 1101a, a second cathode 1101b, and a third cathode 1101c in different layers, respectively, and the first common voltage connection line 141, the second common voltage connection line 142, and the third common voltage connection line 143 are electrically connected to the first light emitting element 1031a, the second light emitting element 1031b, and the third light emitting element 1031c, respectively.
For example, as shown in fig. 18, the pixel defining layer 104 further includes a plurality of spacers 1042 that space adjacent pixel openings 1041 apart, an auxiliary electrode 1043 is disposed in each of the spacers 1042, and the auxiliary electrode 1043 and the second electrode 110 are electrically connected through the first via structure 1044. For example, each auxiliary electrode 1043 is electrically connected to the cathode of the corresponding light emitting element, and the auxiliary electrode 1043 can realize reduction of the resistance of the cathode.
It should be noted that, although the first cathode 1101a, the second cathode 1101b, and the third cathode 1101c are located on the same layer in the schematic cross-sectional structure shown in fig. 18, the first cathode 1101a, the second cathode 1101b, and the third cathode 1101c are located on different layers in the actual product structure. Referring to fig. 17 and 18, the first cathode 1101a has a hollowed-out region at a position corresponding to the second light emitting element 1031b and the third light emitting element 1031 c; the second cathode 1101b has a hollowed-out area at a position corresponding to the first light emitting element 1031a and the third light emitting element 1031 c; the third cathode 1101c has a hollowed-out area at a position corresponding to the first light emitting element 1031a and the second light emitting element 1031 b.
For example, in one example, the auxiliary electrode 1043 includes a first titanium metal layer, an aluminum metal layer, a second titanium metal layer, and a metal oxide layer, which are stacked in this order from a position close to the substrate 101 to a position distant from the substrate 101. For example, the first titanium metal layer has a thickness ranging from 100 to 800 angstroms, the aluminum metal layer has a thickness ranging from 2000 to 6000 angstroms, the second titanium metal layer has a thickness ranging from 100 to 500 angstroms, and the metal oxide layer has a thickness ranging from 100 to 300 angstroms. For example, in yet another example, the first titanium metal layer, aluminum metal layer, second titanium metal layer, and metal oxide layer are 500 angstroms, 5000 angstroms, 300 angstroms, and 200 angstroms, respectively, in thickness.
For example, in one example, a first interlayer insulating layer and a second interlayer insulating layer are provided between adjacent layers formed of a first titanium metal layer, an aluminum metal layer, a second titanium metal layer, and a metal oxide layer, the first interlayer insulating layer being an organic insulating layer, the thickness of the first interlayer insulating layer being 1.5 μm, the material of the second interlayer insulating layer being an inorganic insulating layer, the material of the second interlayer insulating layer specifically being silicon nitride, the thickness of the second interlayer insulating layer being 300 to 1000 angstroms.
For example, in one example, the auxiliary electrode 1043 includes a first titanium metal layer, an aluminum metal layer, a second titanium metal layer, and a metal oxide layer, which are stacked in this order from a position close to the substrate 101 to a position distant from the substrate 101.
For example, as shown in fig. 18, the light emitting unit 106 includes a functional layer and a light emitting layer which are stacked, the functional layer including a hole injecting layer 113, a hole transporting layer 114, an electron transporting layer 115, and an electron injecting layer 116 which are stacked in the direction away from the first electrode 105 in this order, and the light emitting layer being provided between the hole transporting layer 114 and the electron transporting layer 115 to realize recombination of holes and electrons in the light emitting layer to emit light. The light emitting layers include a first color light emitting layer 107, a second color light emitting layer 108, and a third color light emitting layer 109. The third color-retaining film layer 112 includes a third hole injection retaining layer 1122, a third hole transport retaining layer 1123, a third color light-emitting retaining layer 1121, a third electron transport retaining layer 1124, and a third electron injection retaining layer 1125, a second electrode retaining third sub-layer 1126, and a third blocking retaining layer 1127, which are stacked.
For example, as shown in fig. 18, the second color-retaining film layer 122 includes a second hole-injection retaining layer 1222, a second hole-transport retaining layer 1223, a second color-emission retaining layer 1221, a second electron-transport retaining layer 1224, a second electron-injection retaining layer 1225, a second electrode-retaining second sub-layer 1226, and a second blocking retaining layer 1227 which are stacked, and the third color-retaining film layer 112 includes a third hole-injection retaining layer 1122, a third hole-transport retaining layer 1123, a third color-emission retaining layer 1121, a third electron-transport retaining layer 1124, a third electron-injection retaining layer 1125, a second electrode-retaining third sub-layer 1126, and a third blocking retaining layer 1127 which are stacked.
It is to be noted that, although it is shown in fig. 18 that there are the second color retention film layer 122 and the third color retention film layer 112 which are provided in a stacked manner at the position of the shielding layer 111 away from the first color light emitting layer 107, and the second color retention film layer 122 is closer to the substrate 101 than the third color retention film layer 112, only the third color retention film layer 112 is provided at the position of the shielding layer 111 away from the second color light emitting layer 108, the embodiment shown in fig. 17 is also applicable to the case where the third color retention film layer 112 is provided at both the positions of the shielding layer 111 away from the first color light emitting layer 107 and away from the second color light emitting layer 108, and also to the case where the second color retention film layer 122 and the third color retention film layer 112 are not provided at the positions of the shielding layer 111 away from the first color light emitting layer 107 and away from the second color light emitting layer 108.
For example, fig. 19 is a schematic cross-sectional structure of another display substrate according to at least one embodiment of the present utility model, where the cross-sectional structure shown in fig. 19 is illustrated by taking the case that the shielding layer 111 has no retention structure at a position far from the first color light emitting layer 107 and at a position far from the second color light emitting layer 108.
For example, as shown in fig. 19, each light emitting unit 106 includes a first light emitting unit 1061 and a second light emitting unit 1062 which are stacked and disposed, and the second electrode 110 is disposed on a side of the second light emitting unit 1062 away from the substrate 101, the efficiency of light emission by the light emitting unit 106 can be improved by stacking the first light emitting unit 1061 and the second light emitting unit 1062 to form one light emitting unit 106, and the color purity of light emitted by the light emitting unit 106 can be made greater.
For example, as shown in fig. 19, the light emitting layers 133 include a first color light emitting layer 107, a second color light emitting layer 108, and a third color light emitting layer 109, and each light emitting layer 133 includes a first organic light emitting layer 1331 and a second organic light emitting layer 1332 that are stacked; the first color light emitting layer 107 includes a first color light emitting first sub-layer 1071 and a first color light emitting second sub-layer 1072 which are stacked; the second color light emitting layer 108 includes a second color light emitting first sub-layer 1081 and a second color light emitting second sub-layer 1082 which are stacked; the third color light emitting layer 109 includes a third color light emitting first sub-layer 1091 and a third color light emitting second sub-layer 1092 which are stacked; the first light emitting unit 1061 includes a first organic emission layer 1331, the first organic emission layer 1331 including a first color light emitting first sub-layer 1071, a second color light emitting first sub-layer 1081, and a third color light emitting first sub-layer 1091; the second light emitting unit 1062 includes a second organic emission layer 1332, and the second organic emission layer 1332 includes a first color light emitting second sub-layer 1072, a second color light emitting second sub-layer 1082, and a third color light emitting second sub-layer 1092.
For example, in one example, as shown in fig. 19, the thickness of the first color light-emitting first sub-layer 1071 and the thickness of the first color light-emitting second sub-layer 1072 are different from each other; the second color light emitting first sub-layer 1081 and the second color light emitting second sub-layer 1082 are different in thickness from each other; the thicknesses of the third color light emitting first sub-layer 1091 and the third color light emitting second sub-layer 1092 are different from each other. For example, the thickness of the first color light emitting first sub-layer 1071 and the thickness of the first color light emitting second sub-layer 1072 are set to be different from each other, the thickness of the second color light emitting first sub-layer 1081 and the second color light emitting second sub-layer 1082 are set to be different from each other, and the thickness of the third color light emitting first sub-layer 1091 and the third color light emitting second sub-layer 1092 are designed to be different from each other, it is possible to reduce the difference in distance between the light emitting layer in the first light emitting unit 1061 and the light emitting layer in the second light emitting unit 1062 and the first electrode or the second electrode, which results in the difference in efficiency of the outgoing light effect, that is, the above-described design is possible to allow the efficiency of the first light emitting unit 1061 and the second light emitting unit 1062 to emit light.
For example, in one example, the sum of the thicknesses of the first color-emitting first sub-layer 1071 and the first color-emitting second sub-layer 1072 is different from the sum of the thicknesses of the second color-emitting first sub-layer 1081 and the second color-emitting second sub-layer 1082 and the sum of the thicknesses of the third color-emitting first sub-layer 1091 and the third color-emitting second sub-layer 1092.
For example, in one example, the charge generation layer 123 is disposed at least between the first color-emitting first sub-layer 1071 and the first color-emitting second sub-layer 1072, and/or between the second color-emitting first sub-layer 1081 and the second color-emitting second sub-layer 1082, and/or between the third color-emitting first sub-layer 1091 and the third color-emitting second sub-layer 1092.
For example, as shown in fig. 19, the charge generation layer 123 includes a first charge generation layer 1231 and a second charge generation layer 1232 which are stacked. For example, the first charge generation layer 1231 and the second charge generation layer 1232 are structured in a PN junction structure, the first charge generation layer 1231 being an N-type charge generation layer, the second charge generation layer 1232 being a P-type charge generation layer.
For example, in one example, as shown in fig. 19, the first light emitting unit 1061 includes a hole injection layer 113, a first hole transport layer 1141, a first electron blocking layer 124, a first organic emission layer 1331, a first hole blocking layer 125, a first electron transport layer 1151, and a first charge generation layer 1231, which are stacked; the second light emitting unit 1062 includes a second charge generating layer 1232, a second hole transporting layer 1142, a second electron blocking layer 126, a second organic emission layer 1332, a second hole blocking layer 127, a second electron transporting layer 1152, and an electron injecting layer 116, which are stacked.
For example, as shown in fig. 19, the first cathode 1101a, the second cathode 1101b, and the third cathode 1101c corresponding to the first color light emitting layer 107, the second color light emitting layer 108, and the third color light emitting layer 109 are electrically connected through the first via structure 1044 and the auxiliary electrode 1043, respectively. For example, each auxiliary electrode 1043 is electrically connected to the cathode of the corresponding light emitting element, and the auxiliary electrode 1043 can realize reduction of the resistance of the cathode.
For example, in the display substrate shown in fig. 19, the first cathode 1101a, the second cathode 1101b, and the third cathode 1101c are located in different layers.
For example, fig. 20 is a schematic cross-sectional structure of a display substrate according to at least one embodiment of the present utility model, as shown in fig. 20, a first cathode 1101a, a second cathode 1101b and a third cathode 1101c corresponding to a first color light emitting layer 107, a second color light emitting layer 108 and a third color light emitting layer 109 are electrically connected through a first via structure 1044 and an auxiliary electrode 1043, respectively. For example, each auxiliary electrode 1043 is electrically connected to the cathode of the corresponding light emitting element, and the auxiliary electrode 1043 can realize reduction of the resistance of the cathode. The display substrate shown in fig. 20 is the same as the display substrate shown in fig. 19 and will not be described in detail herein.
For example, as shown in fig. 20, a third color-retaining film layer 112 is provided at a position of the shielding layer 111 away from the second color light-emitting layer 108 and at a position away from the first color light-emitting layer 107. The third color-retaining film layer 112 includes a first portion 112a and a second portion 112b which are stacked, the first portion 112a includes a third hole injection retaining layer 1122, a third hole transporting first retaining layer 1123a, a third electron blocking first retaining layer 1241, a third color light emitting first retaining layer 1121a, a third hole blocking first retaining layer 1251, a third electron transporting first retaining layer 1124a, and a third charge generating first retaining layer 1231a which are stacked, and the second portion 112b includes a third charge generating second retaining layer 1231b, a third hole transporting second retaining layer 1123b, a third electron blocking second retaining layer 1261, a third color light emitting second retaining layer 1121b, a third hole blocking second retaining layer 1252, a third electron transporting second retaining layer 1124b, a third electron injection retaining layer 1125, a second electrode retaining third sub-layer 1126, and a third blocking retaining layer 1127 which are stacked.
For example, fig. 21 is a schematic cross-sectional structure of a display substrate according to at least one embodiment of the present utility model, as shown in fig. 21, a first cathode 1101a, a second cathode 1101b and a third cathode 1101c corresponding to the first color light emitting layer 107, the second color light emitting layer 108 and the third color light emitting layer 109 are electrically connected through a first via structure 1044 and an auxiliary electrode 1043, respectively. For example, each auxiliary electrode 1043 is electrically connected to the cathode of the corresponding light emitting element, and the auxiliary 141 electrode 1043 may realize a reduction in the resistance of the cathode. The display substrate shown in fig. 21 is the same as the display substrate shown in fig. 19 and will not be described in detail herein.
For example, as shown in fig. 21, a third color-retaining film layer 112 is provided at a position of the shielding layer 111 away from the second color-emitting layer 108, and a laminated structure of the third color-retaining film layer 112 and the second color-retaining film layer 122 is provided at a position of the shielding layer 111 away from the first color-emitting layer 107. The third color retention film layer 112 includes a first portion 112a and a second portion 112b which are stacked, the first portion 112a includes a third hole injection retention layer 1122, a third hole transporting first retention layer 1123a, a third electron blocking first retention layer 1241, a third color light emitting first retention layer 1121a, a third hole blocking first retention layer 1251, a third electron transporting first retention layer 1124a, and a third charge generating first retention layer 1231a which are stacked, the second portion 112b includes a third charge generating second retention layer 1231b, a third hole transporting second retention layer 1123b, a third electron blocking second retention layer 1261, a third color light emitting second retention layer 1121b, a third hole blocking second retention layer 1252, a third electron transporting second retention layer 1124b, a third electron injection retention layer 1125, a second electrode retention third sub-layer 1126, and a third blocking layer 1127 which are stacked; and the second color retention film layer 122 includes a third portion 122a and a fourth portion 122b which are stacked, the third portion 122a includes a second hole injection retention layer 1222, a second hole transport first retention layer 12231, a second electron blocking first retention layer 1262, a second color light emitting first retention layer 1221a, a second hole blocking first retention layer 1271, a second electron transport first retention layer 12241, a second charge generation first retention layer 12321, and the fourth portion 122b includes a second charge generation second retention layer 12322, a second hole transport second retention layer 12231, a second electron blocking second retention layer 1263, a second color light emitting second retention layer 1222b, a second hole blocking second retention layer 1253, a second electron transport second retention layer 12242, a second electron injection retention layer 1225, a second electrode retention second sub-layer 1226, and a second blocking retention layer 1227 which are stacked.
For example, in the embodiment shown in fig. 21, it is also shown that a first common voltage connecting line 141, a second common voltage connecting line 142, and a third common voltage connecting line 143 are sequentially provided from a position near the display region to a position far from the display region, the first common voltage connecting line 141, the second common voltage connecting line 142, and the third common voltage connecting line 143 being provided in different layers, the first common voltage connecting line 141, the second common voltage connecting line 142, and the third common voltage connecting line 143 being connected to the first cathode 1101a, the second cathode 1101b, and the third cathode 1101c, respectively.
In fig. 19 and 20, the first common voltage connection line 141, the second common voltage connection line 142, and the third common voltage connection line 143 are also provided, and the first common voltage connection line 141, the second common voltage connection line 142, and the third common voltage connection line 143 are provided in different layers and are connected to the first cathode 1101a, the second cathode 1101b, and the third cathode 1101c, respectively.
For example, in one example, as shown in fig. 19 to 21, the first color light emitting layer 107, the second color light emitting layer 108, and the third color light emitting layer 109 are a red light emitting layer, a green light emitting layer, and a blue light emitting layer, respectively, the first color light emitting layer 107, the second color light emitting layer 108, and the third color light emitting layer 109 are phosphorescent light emitting layers, and the third color light emitting layer 109 further has a boron element therein.
For example, in one example, the red, green, and blue light emitting layers each include a host material and a phosphorescent material, and the red light emitting layer includes a phosphorescent material having a molecular weight greater than that of the green light emitting layer and greater than that of the blue light emitting layer.
For example, in one example, the first electrode 105 includes a reflective metal layer and a transparent conductive layer that are stacked, which may reduce the resistance of the first electrode 105.
For example, in one example, the material of the reflective metal layer includes at least one of aluminum and silver, and the material of the transparent conductive layer includes at least one of indium tin oxide and indium zinc oxide.
For example, in one example, the second electrode 110 includes a single-layer structure or a multi-layer structure formed of at least one of silver, aluminum, magnesium, lithium, calcium, lithium fluoride, indium tin oxide, and indium zinc oxide.
For example, in one example, the pixel driving circuit 1032 includes a plurality of thin film transistors 1032a, at least one thin film transistor 1032a is a metal oxide thin film transistor, and at least one thin film transistor is a low temperature polysilicon thin film transistor.
The utility model also provides a preparation method of the display substrate, which comprises the following steps: providing a substrate; forming pixel units arranged in an array on a substrate, wherein each pixel unit comprises a plurality of sub-pixels for emitting light rays with different colors, and each sub-pixel comprises a light emitting element and a pixel driving circuit for driving the corresponding light emitting element to emit light; forming a pixel defining layer on a side of the pixel driving circuit away from the substrate; the pixel defining layer comprises a plurality of pixel openings, each pixel opening corresponds to one sub-pixel, and each pixel unit corresponds to a first color opening area, a second color opening area and a third color opening area which are adjacent in sequence; forming a first electrode in each pixel opening; forming a first color light emitting layer, a first functional layer and a first shielding layer at positions corresponding to the first color opening regions; forming a second color light emitting layer, a second functional layer and a second shielding layer at positions corresponding to the second color opening regions; the third color luminescent film, the third functional film and the third shielding film are formed on the first shielding layer, the second shielding layer, the pixel defining layer and the side, away from the substrate, of the first electrode corresponding to the third color opening area. The resolution and display effect of the display device can be improved by preparing large-size high-resolution RGB full-color AMOLED display products on the large-generation AMOLED production line through exposure and etching processes.
For example, fig. 22 is a flowchart of a method for manufacturing a display substrate according to at least one embodiment of the present utility model, and fig. 23 to 29 are process diagrams of a method for manufacturing a display substrate according to at least one embodiment of the present utility model, and the method for manufacturing the display substrate includes the following steps in combination with fig. 22 and fig. 23 to 29.
Step S101: providing a substrate;
Step S102: forming pixel units arranged in an array on a substrate, wherein each pixel unit comprises a plurality of sub-pixels for emitting light rays with different colors, and each sub-pixel comprises a light emitting element and a pixel driving circuit for driving the corresponding light emitting element to emit light;
Step S103: forming a pixel defining layer on a side of the pixel driving circuit away from the substrate; the pixel defining layer comprises a plurality of pixel openings, each pixel opening corresponds to one sub-pixel, and each pixel unit corresponds to a first color opening area, a second color opening area and a third color opening area which are adjacent in sequence;
Step S104: forming a first electrode in each pixel opening;
Step S105: forming a first color light emitting layer, a first functional layer, a second electrode first sub-layer and a first shielding layer at positions corresponding to the first color opening regions;
Step S106: forming a second color light emitting layer, a second functional layer, a second electrode second sub-layer and a second shielding layer at positions corresponding to the second color opening regions;
Step S107: and forming a third color luminescent film, a third functional film, a third sub-layer film of the second electrode and a third shielding film on the first shielding layer, the second shielding layer, the pixel defining layer and the side, away from the substrate, of the first electrode corresponding to the third color opening area.
For example, as shown in fig. 23, a substrate 101 is provided, and the substrate 101 may be a glass substrate, a quartz substrate, a flexible display substrate, or the like, which is not limited by the embodiment of the present utility model.
For example, as shown in fig. 24, pixel units arranged in an array are formed on a substrate 101, wherein each pixel unit includes a plurality of sub-pixels that emit light of different colors, each sub-pixel including a light emitting element and a pixel driving circuit 1032 that drives the corresponding light emitting element to emit light.
Although fig. 24 shows a pixel unit and sub-pixels included therein, and light-emitting elements corresponding to the respective sub-pixels, the pixel driving circuit 1032 is formed in close-up in this step because the stacked structure of the respective light-emitting elements is large and cannot be used in this step.
For example, as shown in fig. 25, a pixel defining layer 104 is formed on a side of the pixel driving circuit 1032 away from the substrate 101, the pixel defining layer 104 includes a plurality of pixel openings 1041, each pixel opening 1041 corresponds to one sub-pixel, and each pixel unit corresponds to a first color opening region 1041a, a second color opening region 1041b, and a third color opening region 1041c that are adjacent in sequence.
For example, as shown in fig. 26, the first electrodes 105 are formed in each pixel opening 1041, respectively.
For example, in the structure shown in fig. 26, each adjacent sub-pixel is divided by the first electrode 105, that is, one sub-pixel is corresponding to each first electrode 105 formed in each pixel opening 1041.
For example, fig. 27A to 27E are process diagrams of forming a first color light emitting layer, a first functional layer, a second electrode first sub-layer, and a first shielding layer at positions corresponding to the first color opening regions.
For example, as shown in fig. 27A, forming the first color light emitting layer 107, the first functional layer 171, the second electrode first sub-layer 177, and the first shielding layer 172 at positions corresponding to the first color opening regions 1041a includes: a first color light emitting film 107', a first functional film 171', a second electrode first sub-layer film 177', and a first shielding film 172' are formed on the pixel defining layer 104 and the side of the first electrode 105 away from the substrate 101.
For example, the first functional film 171 'is a structure formed by stacking a plurality of layers, and although only a position corresponding to one layer is indicated in fig. 27A, the first functional film 171' includes two film layers on the side of the first color light emitting film 107 'close to the substrate 101 and two film layers on the side away from the substrate 101 in fig. 27A, that is, the first functional film 171' includes at least a four-layer structure in which the layers are stacked. The first color light emitting film 107' may also include a multi-layered stacked structure.
For example, as shown in fig. 27B, a first photoresist layer 181 is formed over the first shielding film 172' and at a position corresponding to the first color opening region 1041 a. For example, the material of the first photoresist layer 181 may be a conventional material, and will not be described herein.
For example, as shown in fig. 27C, the first blocking film 172' is patterned with the first photoresist layer 181 as a mask to form the first blocking layer 172.
For example, in the structure shown in fig. 27C, the first shielding layer 172 covers only the region corresponding to the leftmost subpixel.
For example, the material of the first shielding layer 172 may be an inorganic insulating material. For example, the material of the first shielding layer 172 is at least one of silicon nitride, silicon dioxide, silicon oxynitride, and the like.
For example, as shown in fig. 27D, the first photoresist layer 181 of the side of the first shielding layer 172 remote from the substrate base plate 101 is removed.
For example, as shown in fig. 27E, the first color light emitting film 107', the first functional film 171', and the second electrode first sub-layer film 177' are patterned with the first blocking layer 172 as a mask to form the first color light emitting layer 107, the first functional layer 171, and the second electrode first sub-layer 177.
For example, fig. 28A to 28E are process diagrams of forming a second color light emitting layer, a second functional layer, a second electrode second sub-layer, and a second shielding layer at positions corresponding to the second color opening regions.
For example, as shown in fig. 28A, forming the second color light emitting layer 108, the second functional layer 173, the second electrode second sub-layer 178, and the second shielding layer 174 at positions corresponding to the second color opening regions 1041b includes: a second color light emitting film 108', a second functional film 173', a second electrode second sub-layer film 178', and a second shielding film 174' are formed on the first shielding layer 172, the pixel defining layer 104, and the side of the first electrode 105 away from the substrate 101 corresponding to the second color opening region 1041b, the third color opening region 1041 c.
For example, as shown in fig. 28B, a second photoresist layer 182 is formed on the second shielding film 174' and at positions corresponding to the first color opening regions 1041a and the second color opening regions 1041B.
For example, as shown in fig. 28C, the second blocking film 174' is patterned with the second photoresist layer 182 as a mask to form the second blocking layer 174. For example, the second shielding layer 174 covers a region corresponding to the left subpixel and the middle subpixel. For example, the material of the second shielding layer 174 is the same as that of the first shielding layer 172, which is not described in detail in the embodiments of the present utility model.
For example, as shown in fig. 28D, the second photoresist layer 182 on the side of the second shielding layer 174 remote from the substrate 101 is removed.
For example, as shown in fig. 28E, the second color light emitting film 108', the second functional film 173', and the second electrode second sub-layer film 178' are patterned with the second shielding layer 174 as a mask to form the second color light emitting layer 108, the second functional layer 173, and the second electrode second sub-layer 178, and the second color retention film layer 122 is formed on the first shielding layer 172.
For example, the structure of the second color-preserving film 122 can be referred to in the related description of other embodiments, and will not be described herein.
For example, fig. 29 is a process diagram of forming a third color light emitting film, a third functional film, a second electrode third sub-layer film, and a third shielding film on the first shielding layer, the second shielding layer, the pixel defining layer, and the side of the first electrode corresponding to the third color opening region away from the substrate. For example, as shown in fig. 29, a third color light emitting film 109', a third functional film 175', a second electrode third sub-layer film 179', and a third shielding film 176' are formed on the first shielding layer 172, the second shielding layer 174, the pixel defining layer 104, and the side of the first electrode 105 away from the substrate 101 corresponding to the third color opening region 1041 c.
For example, as shown in fig. 29, portions of the third color light emitting film 109', the third functional film 175', the second electrode third sub-layer film 179', and the third shielding film 176' at positions corresponding to the third color opening region 1041c function as the third color light emitting layer 109, the third functional layer 175, the second electrode third sub-layer 179, and the third shielding layer 176, respectively, and the remaining portions function as the third color retaining film layer 121.
For example, the structures of the second color-preserving film layer 122 and the third color-preserving film layer 121 can be referred to the related descriptions in other embodiments, and will not be repeated here.
For example, in another example, as shown in fig. 30, on the basis of the structure shown in fig. 29, the method for manufacturing a display substrate further includes forming a packaging structure 117 on a side of the third shielding film 176' away from the substrate 101, where the packaging structure 117 may be a three-layer structure, and the layer structure included in the packaging structure may be referred to the related description in the foregoing description and will not be repeated herein.
For example, in one example, the display substrate shown in fig. 30, that is, the display substrate shown in fig. 4, formed by using the preparation method provided by the embodiment of the present utility model, and as shown in fig. 30 and fig. 4, the light emitting layers include the first color light emitting layer 107, the second color light emitting layer 108, and the third color light emitting layer 109, and the functional layers include the first functional layer 171, the second functional layer 173, and the third functional layer 175. The first functional layer 171 includes a hole injection layer 113 and a hole transport layer 114 sequentially formed on a side of the second color light emitting layer 108 close to the first electrode 105, and an electron transport layer 115 and an electron injection layer 116 sequentially formed on a side of the second color light emitting layer 108 remote from the first electrode 105. The second functional layer 173 includes a hole injection layer 113 and a hole transport layer 114 sequentially formed on a side of the second color light emitting layer 108 close to the first electrode 105, and an electron transport layer 115 and an electron injection layer 116 sequentially formed on a side of the second color light emitting layer 108 remote from the first electrode 105. The third functional layer 175 includes a hole injection layer 113 and a hole transport layer 114 sequentially formed on a side of the third color light emitting layer 108 close to the first electrode 105, and an electron transport layer 115 and an electron injection layer 116 sequentially formed on a side of the third color light emitting layer 108 remote from the first electrode 105.
For example, as shown in connection with fig. 30 and 4, the third color-retaining film layer 112 includes a third hole injection retaining layer 1122, a third hole transport retaining layer 1123, a third color light-emitting retaining layer 1121, a third electron transport retaining layer 1124, a third electron injection retaining layer 1125, a second electrode retaining third sub-layer 1126, and a third shielding retaining layer 1127, which are sequentially formed on the sides of the first shielding layer 172, the second shielding layer 174, and the substrate 101, respectively.
For example, as shown in connection with fig. 30 and 4, the second color-retaining film layer 123 includes a second hole injection retaining layer 1222, a second hole transport retaining layer 1223, a second color light emission retaining layer 1221, a second electron transport retaining layer 1224, a second electron injection retaining layer 1225, a second electrode retaining second sub-layer 1226, and a second shielding retaining layer 1227, which are sequentially formed on the side of the first shielding layer 172 away from the substrate 101.
For example, in the display substrate shown in fig. 4, 29 and 30, each light emitting element corresponds to one light emitting unit, the second color retention film 122 and the third color retention film 112 are formed stacked on the first shielding layer 172, and the second color retention film 122 is formed on the side of the third color retention film 112 close to the substrate 101, and only the third color retention film 112 is formed on the second shielding layer 174.
For example, in another example, the display substrate shown in fig. 30, that is, the display substrate shown in fig. 13, formed by using the preparation method provided in the embodiment of the present utility model, that is, each functional layer and light-emitting layer in fig. 30 are thinned into the structure shown in fig. 13, and each light-emitting unit 106 includes a first light-emitting unit 1061 and a second light-emitting unit 1062 that are stacked, as shown in fig. 30 and 13, and the second electrode 110 is disposed on a side of the second light-emitting unit 1062 away from the substrate 101.
For example, as shown in conjunction with fig. 30 and 13, the light emitting layers 133 include the first color light emitting layer 107, the second color light emitting layer 108, and the third color light emitting layer 109, and each light emitting layer 133 includes a first organic light emitting layer 1331 and a second organic light emitting layer 1332 that are stacked; the first color light emitting layer 107 includes a first color light emitting first sub-layer 1071 and a first color light emitting second sub-layer 1072 which are stacked; the second color light emitting layer 108 includes a second color light emitting first sub-layer 1081 and a second color light emitting second sub-layer 1082 which are stacked; the third color light emitting layer 109 includes a third color light emitting first sub-layer 1091 and a third color light emitting second sub-layer 1092 which are stacked; the first light emitting unit 1061 includes a first organic emission layer 1331, the first organic emission layer 1331 including a first color light emitting first sub-layer 1071, a second color light emitting first sub-layer 1081, and a third color light emitting first sub-layer 1091; the second light emitting unit 1062 includes a second organic emission layer 1332, and the second organic emission layer 1332 includes a first color light emitting second sub-layer 1072, a second color light emitting second sub-layer 1082, and a third color light emitting second sub-layer 1092.
For example, the functional layers include the first functional layer 171, the second functional layer 173, and the third functional layer 175 described above. The first functional layer 171 includes a first functional first sub-layer and a first functional second sub-layer that are stacked and disposed, and the first functional first sub-layer is closer to the first electrode 105 than the first functional second sub-layer, and the first functional first sub-layer includes a hole injection layer 113, a first hole transport layer 1141, and a first electron blocking layer 124 that are sequentially formed on a side of the first color light emitting first sub-layer 1071 that is close to the first electrode 105, and a first hole blocking layer 125, a first electron transport layer 1151, and a first charge generating layer 1231 that are sequentially formed on a side of the first color light emitting first sub-layer 1071 that is away from the first electrode 105. The first functional second sub-layer 1072 includes a second charge generation layer 1232, a second hole transport layer 1142, and a second electron blocking layer 126 sequentially formed on a side of the first color light emitting second sub-layer 1072 near the first electrode 105, and a second hole blocking layer 127, a second electron transport layer 1152, and an electron injection layer 116 sequentially formed on a side of the third color light emitting second sub-layer 1072 remote from the first electrode 105. the second functional layer 173 includes a second functional first sub-layer and a second functional second sub-layer which are stacked and disposed, and the second functional first sub-layer is closer to the first electrode 105 than the second functional second sub-layer, and the second functional first sub-layer includes a hole injection layer 113, a first hole transport layer 1141, and a first electron blocking layer 124 which are sequentially formed on a side of the second color light emitting first sub-layer 1731 close to the first electrode 105, and a first hole blocking layer 125, a first electron transport layer 1151, and a first charge generating layer 1231 which are sequentially formed on a side of the second color light emitting first sub-layer 1731 remote from the first electrode 105. The second functional second sub-layer 1732 includes a second charge generation layer 1232, a second hole transport layer 1142, and a second electron blocking layer 126 sequentially formed on a side of the second color light emitting second sub-layer 1732 near the first electrode 105, and a second hole blocking layer 127, a second electron transport layer 1152, and an electron injection layer 116 sequentially formed on a side of the second color light emitting second sub-layer 1732 remote from the first electrode 105. The third functional layer 175 includes a third functional first sub-layer and a third functional second sub-layer which are stacked and disposed, and the third functional first sub-layer is closer to the first electrode 105 than the third functional second sub-layer, and includes a hole injection layer 113, a first hole transport layer 1141, and a first electron blocking layer 124 which are sequentially formed on a side of the third color light emitting first sub-layer 1091 close to the first electrode 105, and a first hole blocking layer 125, a first electron transport layer 1151, and a first charge generating layer 1231 which are sequentially formed on a side of the third color light emitting first sub-layer 1091 remote from the first electrode 105. The third functional second sub-layer 1092 includes a second charge generation layer 1232, a second hole transport layer 1142, and a second electron blocking layer 126 sequentially formed on a side of the third color light emitting second sub-layer 1092 near the first electrode 105, and a second hole blocking layer 127, a second electron transport layer 1152, and an electron injection layer 116 sequentially formed on a side of the third color light emitting second sub-layer 1092 remote from the first electrode 105.
For example, the charge generation layer 123 includes a first charge generation layer 1231 and a second charge generation layer 1232 which are stacked. The first light emitting unit 1061 includes a hole injection layer 113, a first hole transport layer 1141, a first electron blocking layer 124, a first organic emission layer 1331, a first hole blocking layer 125, a first electron transport layer 1151, and a first charge generation layer 1231, which are stacked; the second light emitting unit 1062 includes a second charge generating layer 1232, a second hole transporting layer 1142, a second electron blocking layer 126, a second organic emission layer 1332, a second hole blocking layer 127, a second electron transporting layer 1152, and an electron injecting layer 116, which are stacked.
As shown in fig. 30 and 13, the third color retention film layer 112 includes a first portion 112a and a second portion 112b which are stacked, the first portion 112a includes a third hole injection retention layer 1122, a third hole transport first retention layer 1123a, a third electron blocking first retention layer 1241, a third color emission first retention layer 1121a, a third hole blocking first retention layer 1251, a third electron transport first retention layer 1124a, and a third charge generation first retention layer 1231a which are stacked, and the second portion 112b includes a third charge generation second retention layer 1231b, a third hole transport second retention layer 1123b, a third electron blocking second retention layer 1261, a third color emission second retention layer 1121b, a third hole blocking second retention layer 1252, a third electron transport second retention layer 1124b, a third electron injection retention layer 1125, a second electrode retention third sub-layer 1126, and a third blocking retention layer 1127 which are stacked.
As shown in fig. 30 and 13, the second color retention film layer 122 includes a third portion 122a and a fourth portion 122b that are stacked, the third portion 122a includes a second hole injection retention layer 1222, a second hole transport first retention layer 12231, a second electron blocking first retention layer 1262, a second color light emitting first retention layer 1221a, a second hole blocking first retention layer 1271, a second electron transport first retention layer 12241, a second charge generation first retention layer 12321, and the fourth portion 122b includes a second charge generation second retention layer 12322, a second hole transport second retention layer 12231, a second electron blocking second retention layer 1263, a second color light emitting second retention layer 1222b, a second hole blocking second retention layer 1253, a second electron transport second retention layer 12242, a second electron injection retention layer 1225, a second electrode retention second sub-layer 1226, and a second blocking retention layer 1227 that are stacked.
For example, the materials of the above-mentioned layer structures, the size relationships between the thicknesses of the different layers, etc. may be referred to the relevant descriptions in the above, and will not be repeated here.
For example, fig. 31 to 37 are process diagrams of a method for manufacturing a display substrate according to at least one embodiment of the present utility model, for example, as shown in fig. 31, a substrate 101 is provided, and materials of the substrate 101 may be referred to in the above description, which is not limited thereto according to the embodiment of the present utility model.
For example, as shown in fig. 32, pixel units arranged in an array are formed on a substrate 101, wherein each pixel unit includes a plurality of sub-pixels that emit light of different colors, each sub-pixel including a light emitting element and a pixel driving circuit that drives the corresponding light emitting element to emit light.
Although fig. 32 shows a pixel unit and sub-pixels included therein, and light emitting elements corresponding to the respective sub-pixels, the stacked structure of the respective light emitting elements is large, and therefore, the pixel driving circuit 1032 is formed in close-up in this step.
For example, as shown in fig. 33, a pixel defining layer 104 is formed on a side of the pixel driving circuit 1032 away from the substrate 101, the pixel defining layer 104 includes a plurality of pixel openings 1041, each pixel opening 1041 corresponds to one sub-pixel, and each pixel unit corresponds to a first color opening region 1041a, a second color opening region 1041b, and a third color opening region 1041c that are adjacent in sequence.
For example, as shown in fig. 34, the first electrodes 105 are formed in each pixel opening 1041, respectively.
For example, in the structure shown in fig. 34, each adjacent sub-pixel is divided by the first electrode 105, that is, one sub-pixel is corresponding to each first electrode 105 formed in each pixel opening 1041.
For example, fig. 35A to 35E are process diagrams of forming a first color light emitting layer, a first functional layer, a second electrode first sub-layer, and a first shielding layer at positions corresponding to the first color opening regions.
For example, as shown in fig. 35A, forming the first color light emitting layer 107, the first functional layer 171, the second electrode first sub-layer 177, and the first shielding layer 172 at positions corresponding to the first color opening regions 1041a includes: a first color light emitting film 107', a first functional film 171', a second electrode first sub-layer film 177', and a first shielding film 172' are formed on the pixel defining layer 104 and the side of the first electrode 105 away from the substrate 101.
For example, the first functional film 171' is a structure formed by stacking a plurality of layers, and although only a position corresponding to one layer is indicated in fig. 35A, in fig. 35A the first functional film 171' includes two film layers on the side of the first color light emitting film 107' close to the substrate 101 and two film layers on the side away from the substrate 101, that is, the first functional film 171' includes a four-layer structure in which a plurality of layers are stacked, but the embodiment of the present utility model is not limited thereto, and the first functional film 171' may also include a structure formed by stacking a plurality of layers.
For example, as shown in fig. 35B, a first photoresist layer 181 is formed over the first shielding film 172' and at a position corresponding to the first color opening region 1041 a. For example, the material of the first photoresist layer 181 may be a conventional material, and will not be described herein.
For example, as shown in fig. 35C, the first blocking film 172' is patterned with the first photoresist layer 181 as a mask to form the first blocking layer 172.
For example, in the structure shown in fig. 35C, the first shielding layer 172 covers only the region corresponding to the leftmost subpixel.
For example, the material of the first shielding layer 172 may be referred to in the above description, and will not be described herein.
For example, as shown in fig. 35D, the first photoresist layer 181 of the side of the first shielding layer 172 remote from the substrate base plate 101 is removed.
For example, as shown in fig. 35E, the first color light emitting film 107', the first functional film 171', and the second electrode first sub-layer film 177' are patterned with the first blocking layer 172 as a mask to form the first color light emitting layer 107, the first functional layer 171, and the second electrode first sub-layer 177.
For example, fig. 36A to 36E are process diagrams of forming a second color light emitting layer, a second functional layer, a second electrode second sub-layer, and a second shielding layer at positions corresponding to the second color opening regions.
For example, as shown in fig. 36A, forming the second color light emitting layer 108, the second functional layer 173, the second electrode second sub-layer 178, and the second shielding layer 174 at positions corresponding to the second color opening regions 1041b includes: a second color light emitting film 108', a second functional film 173', a second electrode second sub-layer film 178', and a second shielding film 174' are formed on the first shielding layer 172, the pixel defining layer 104, and the side of the first electrode 105 away from the substrate 101 corresponding to the second color opening region 1041b, the third color opening region 1041 c.
For example, as shown in fig. 36B, a second photoresist layer 182 is formed on the second shielding film 174' and at a position corresponding to the second color opening region 1041B.
For example, as shown in fig. 36C, the second blocking film 174' is patterned with the second photoresist layer 182 as a mask to form the second blocking layer 174. For example, the second shielding layer 174 covers only the region corresponding to the sub-pixel in the middle. For example, the material of the second shielding layer 174 is the same as that of the first shielding layer 172, which is not described in detail in the embodiments of the present utility model.
For example, as shown in fig. 36D, the second photoresist layer 182 on the side of the second shielding layer 174 remote from the substrate 101 is removed.
For example, as shown in fig. 36E, the second color light emitting film 108', the second functional film 173', and the second electrode second sub-layer film 178' are patterned with the second shielding layer 174 as a mask to form the second color light emitting layer 108, the second functional layer 173, and the second electrode second sub-layer 178, and the film layer remaining on the first shielding layer 172 is removed.
For example, fig. 37 is a process diagram of forming a third color light emitting film, a third functional film, a second electrode third sub-layer film, and a third shielding film on the first shielding layer, the second shielding layer, the pixel defining layer, and the side of the first electrode corresponding to the third color opening region away from the substrate. For example, as shown in fig. 37, a third color light emitting film 109', a third functional film 175', a second electrode third sub-layer film 179', and a third shielding film 176' are formed on the first shielding layer 172, the second shielding layer 174, the pixel defining layer 104, and the side of the first electrode 105 away from the substrate 101 corresponding to the third color opening region 1041 c.
For example, as shown in fig. 37, portions of the third color light emitting film 109', the third functional film 175', the second electrode third sub-layer film 179', and the third shielding film 176' at positions corresponding to the third color opening region 1041c function as the third color light emitting layer 109, the third functional layer 175, the second electrode third sub-layer 179, and the third shielding layer 176, respectively, and the remaining portions function as the third color retaining film layer 121.
For example, the structure of the third color retention film 121 may be referred to as related descriptions in other embodiments, and will not be described herein.
For example, in another example, as shown in fig. 38, on the basis of the structure shown in fig. 37, the method for manufacturing a display substrate further includes forming a packaging structure 117 on a side of the third shielding film 176' away from the substrate 101, where the packaging structure 117 may be a three-layer structure, and the layer structure included in the packaging structure may be referred to the related description in the foregoing description and will not be repeated herein.
For example, in another example, the display substrate shown in fig. 38 formed by using the preparation method provided by the embodiment of the present utility model is the display substrate shown in fig. 1, and in combination with fig. 38 and fig. 1, each light emitting element corresponds to one light emitting unit, and the third color-preserving film layer 112 is formed on the first shielding layer 172 and the second shielding layer 174. The structure of each layer included in the display substrate may refer to the related description of fig. 1, and will not be described herein.
For example, in another example, the display substrate shown in fig. 38 formed by using the preparation method provided by the embodiment of the present utility model is the display substrate shown in fig. 12, and in combination with fig. 38 and fig. 12, each light emitting element corresponds to two light emitting units, and the third color-preserving film layer 112 is formed on the first shielding layer 172 and the second shielding layer 174. The respective layer structures included in the display substrate may be described with reference to fig. 12, and will not be described herein.
For example, at least one embodiment of the present utility model further provides another method for manufacturing a display substrate, where the manufacturing method includes steps shown in fig. 39 to 41 in addition to the steps shown in fig. 31 to 37, that is, fig. 31 to 37 and fig. 39 to 41 are process diagrams of another method for manufacturing a display substrate according to at least one embodiment of the present utility model.
For example, as shown in fig. 39, on the basis of the cross-sectional structure shown in fig. 37, a third photoresist layer 183 is formed on the third shielding film 176' at a position corresponding to the third color opening region 1041 c.
For example, as shown in fig. 40, the portion of the third shielding film 176' on the third color-retaining film layer 121 excluding the third shielding layer 176 is removed with the third photoresist layer 183 as a mask.
For example, as shown in fig. 41, the third photoresist layer 183 is removed, and the remaining portion of the third color-retaining film layer 121 is removed.
For example, in another embodiment, on the basis of the cross-sectional structure formed in fig. 41, the method further includes the steps shown in fig. 42, that is, fig. 31 to 37 and fig. 39 to 42 are process diagrams of another preparation method of a display substrate according to at least one embodiment of the present utility model, as shown in fig. 42, removing the first shielding layer 172, the second shielding layer 174 and the third shielding layer 176, and forming an electrode connection structure 186 on the second electrode 110, where the electrode connection structure 186 is electrically connected to the second electrode 110.
For example, in another embodiment, on the basis of the cross-sectional structure formed in fig. 42, the method may further include the steps shown in fig. 43, that is, fig. 31 to 37 and fig. 39 to 43 are process diagrams of another preparation method of a display substrate according to at least one embodiment of the present utility model, as shown in fig. 43, a package structure 117 is formed on the structure of the display substrate shown in fig. 42, and the specific structure of the package structure may be referred to the related description in the foregoing, which is not repeated herein.
For example, at least one embodiment of the present utility model further provides another method for manufacturing a display substrate, where the manufacturing method includes steps shown in fig. 44 to 49 in addition to the steps shown in fig. 23 to 29, that is, fig. 23 to 29 and fig. 44 to 49 are process diagrams of another method for manufacturing a display substrate according to at least one embodiment of the present utility model.
For example, as shown in fig. 44, on the basis of the cross-sectional structure shown in fig. 29, a third photoresist layer 183 is formed on the third shielding film 176' at a position corresponding to the third color opening region 1041 c.
For example, as shown in fig. 45, the portion of the third shielding film 176' on the third color-retaining film layer 121 excluding the third shielding layer 176 is removed with the third photoresist layer 183 as a mask.
For example, as shown in fig. 46, the third photoresist layer 183 is removed, and the remaining portion of the third color-retaining film layer 121 is removed.
For example, as shown in fig. 47, on the basis of the cross-sectional structure shown in fig. 46, a fourth photoresist layer 184 is formed on the second shielding layer 174 and the third shielding layer 176 at a position corresponding to the third color opening region 1041c of the second color opening region 1041 b.
For example, as shown in fig. 48, the fourth photoresist layer 184 is used as a mask to remove the residual structure of the second shielding film on the second color retention film 122.
For example, as shown in fig. 49, the fourth photoresist layer 184 is removed, and the remaining portion of the second color retention film 122 is removed.
For example, in another embodiment, on the basis of the cross-sectional structure formed in fig. 49, the method further includes the steps shown in fig. 50, that is, fig. 23 to 29 and fig. 44 to 50 are process diagrams of another preparation method of a display substrate according to at least one embodiment of the present utility model, as shown in fig. 50, removing the first shielding layer 172, the second shielding layer 174 and the third shielding layer 176, and forming an electrode connection structure 186 on the second electrode 110, where the electrode connection structure 186 is electrically connected to the second electrode 110.
For example, in another embodiment, on the basis of the cross-sectional structure formed in fig. 50, the method may further include the steps shown in fig. 51, that is, fig. 23 to 29 and fig. 44 to 51 are process diagrams of another preparation method of a display substrate according to at least one embodiment of the present utility model, as shown in fig. 51, a package structure 117 is formed on the structure of the display substrate shown in fig. 50, and the specific structure of the package structure may be referred to the related description in the foregoing, which is not repeated herein.
For example, in at least one embodiment of the present utility model, in the embodiments of the respective manufacturing methods described above, after the step shown in fig. 24 and before the step shown in fig. 25, that is, before the step of forming the pixel defining layer 104, further includes forming an auxiliary electrode 1043, then forming the pixel defining layer 104 in the step shown in fig. 25, and forming the auxiliary electrode 1043 in each of the spacers 1042 of the pixel defining layer 104. For example, in connection with the structures shown in fig. 16 and 21, the auxiliary electrode 1043 and the second electrode 110 are electrically connected through the first via structure 1044.
For example, in at least one embodiment of the present utility model, in the above-described embodiments of the respective manufacturing methods, after the step shown in fig. 32 and before the step shown in fig. 33, that is, before the step of forming the pixel defining layer 104, further includes forming an auxiliary electrode 1043, then forming the pixel defining layer 104 in the step shown in fig. 33, and forming the auxiliary electrode 1043 in each of the spacers 1042 of the pixel defining layer 104. For example, in connection with the structures shown in fig. 15 and 20, the auxiliary electrode 1043 and the second electrode 110 are electrically connected through the first via structure 1044.
For example, in at least one embodiment of the present utility model, in the embodiments of the respective preparation methods described above, after the step shown in fig. 24 and before the step shown in fig. 25; or after the step shown in fig. 32 and before the step shown in fig. 33, i.e., after the pixel driving circuit 1032 is formed and before the pixel defining layer 104 is formed, further comprising forming an auxiliary electrode 1043, a planarization layer 118 and a second via structure 1045 penetrating the planarization layer 118, the auxiliary electrode 1043 being disposed in the planarization layer 118, and then forming the pixel defining layer 104 in the step shown in fig. 25 or fig. 32. The pixel defining layer 104 includes a first spacer 1191, a second spacer 1192, and a third spacer 1193 that are sequentially adjacent, and further includes a connection electrode 161 formed between the second spacer 1192 and the third spacer 1193 in forming the first electrode 105 between the first spacer 1191 and the second spacer 1192. The connection electrode 161 and the auxiliary electrode 1043 are electrically connected through the second via structure 1045, and regarding the connection electrode 161, the structure shown in fig. 9 and 10 can be referred to.
For example, in at least one embodiment of the present utility model, in the embodiments of the respective manufacturing methods described above, in conjunction with fig. 21, the display substrate includes the display region 130 and the peripheral region 140 disposed around the periphery of the display region 130, and in the peripheral region 140, from a position close to the display region 130 to a position distant from the display region 130, and when the second electrodes 110 corresponding to the first color opening regions 1041a, the second color opening regions 1041b, and the third color opening regions 1041c are formed, the first common voltage connection lines 141, the second common voltage connection lines 142, and the third common voltage connection lines 143 are also formed, respectively. The first, second and third common voltage connection lines 141, 142 and 143 are electrically connected to first, second and third light emitting elements including first, second and third color light emitting layers and films, respectively.
For example, referring to fig. 8 and 17, the first, second, and third light emitting elements are electrically connected through the first, second, and third common voltage connection lines 141, 142, and 143, and the power supply voltage line 133, respectively.
The display substrate provided by at least one embodiment of the utility model has at least the following beneficial technical effects: the preparation of the RGB full-color OLED pixelation device can be realized by respectively depositing the luminous layers and the functional layers with different colors for three times and adopting a patterning technology of double exposure etching, namely under the condition of not using a Fine Metal Mask (FMM), so that the problem that the display resolution can not be further improved when the AMOLED evaporation technology is expanded into medium-and-large-size display products is solved, and the problems that the resolution of the products is limited by the FMM technology, the preparation difficulty of the medium-and-large-size high-resolution FMM is high and the production cost is high can be solved. The resolution and display effect of the display device can be improved by preparing large-size high-resolution RGB full-color AMOLED display products on the large-generation AMOLED production line through exposure and etching processes.
The following points need to be described:
(1) The drawings of the embodiments of the present utility model relate only to the structures related to the embodiments of the present utility model, and other structures may refer to the general designs.
(2) In the drawings for describing embodiments of the present utility model, the thickness of layers or regions is exaggerated or reduced for clarity, i.e., the drawings are not drawn to actual scale.
(3) The embodiments of the utility model and the features of the embodiments can be combined with each other to give new embodiments without conflict.
The above description is only specific embodiments of the present utility model, but the scope of the present utility model should not be limited thereto, and the scope of the present utility model should be determined by the claims.
Claims (67)
1. A display substrate, comprising:
A substrate base;
The array is arranged on the substrate, wherein each pixel unit comprises a plurality of sub-pixels emitting light rays with different colors, and each sub-pixel comprises a light emitting element and a pixel driving circuit driving the corresponding light emitting element to emit light;
A pixel defining layer disposed on a side of the pixel driving circuit remote from the substrate base plate; wherein the pixel defining layer comprises a plurality of pixel openings, each pixel opening corresponding to one of the sub-pixels;
Each pixel unit comprises three sub-pixels, and the light-emitting element corresponding to each sub-pixel comprises a first electrode and a light-emitting unit which are arranged in a stacked mode;
the light emitting units included in the three sub-pixels in the same pixel unit respectively comprise a first color light emitting layer, a second color light emitting layer and a third color light emitting layer;
A second electrode is arranged on one side, far away from the substrate, of the light-emitting unit, and a shielding layer is arranged on one side, far away from the substrate, of the second electrode;
and a third color retaining film layer is arranged at the position of the shielding layer far away from the second color light-emitting layer and the position of the shielding layer far away from the first color light-emitting layer.
2. The display substrate of claim 1, wherein the display substrate comprises a transparent substrate,
The shielding layer is far away from the position of the first color luminous layer, a second color retaining film layer is further arranged, and the second color retaining film layer and the third color retaining film layer are sequentially stacked in the direction far away from the substrate.
3. The display substrate according to claim 2, wherein a maximum distance between the third color-retaining film layer and the first color-emitting layer at a position of the shielding layer away from the first color-emitting layer is different from a maximum distance between the third color-retaining film layer and the second color-emitting layer at a position of the shielding layer away from the second color-emitting layer.
4. The display substrate according to claim 2, wherein a package structure is provided on a side of the third color retention film layer remote from the substrate.
5. The display substrate according to any one of claims 2 to 4, wherein,
The display substrate comprises a display area and a peripheral area which is annularly arranged at the periphery of the display area;
A first common voltage connecting wire, a second common voltage connecting wire and a third common voltage connecting wire are sequentially arranged in the peripheral area from a position close to the display area to a position far from the display area;
In each of the pixel units, the light emitting element includes a first light emitting element, a second light emitting element, and a third light emitting element, and the first common voltage connection line, the second common voltage connection line, and the third common voltage connection line are electrically connected to the first light emitting element, the second light emitting element, and the third light emitting element, respectively.
6. The display substrate according to claim 5, wherein,
The pixel defining layer further includes a plurality of spacers separating adjacent ones of the pixel openings, an auxiliary electrode disposed in each of the spacers, the auxiliary electrode and the second electrode being electrically connected by a first via structure.
7. The display substrate according to claim 6, wherein the auxiliary electrode comprises a first titanium metal layer, an aluminum metal layer, a second titanium metal layer, and a metal oxide layer which are stacked in this order from a position close to the substrate to a position distant from the substrate.
8. The display substrate of claim 7, wherein the first titanium metal layer has a thickness ranging from 100 to 800 angstroms, the aluminum metal layer has a thickness ranging from 2000 to 6000 angstroms, the second titanium metal layer has a thickness ranging from 100 to 500 angstroms, and the metal oxide layer has a thickness ranging from 100 to 300 angstroms.
9. The display substrate of claim 8, wherein the first titanium metal layer, the aluminum metal layer, the second titanium metal layer, and the metal oxide layer have thicknesses of 500 angstroms, 5000 angstroms, 300 angstroms, and 200 angstroms, respectively.
10. The display substrate according to claim 5, wherein the pixel defining layer further comprises a plurality of spacers including a first spacer, a second spacer, and a third spacer which are sequentially adjacent, the first electrode is provided between the first spacer and the second spacer, and a connection electrode is provided between the second spacer and the third spacer.
11. The display substrate according to claim 10, wherein the first electrode and the connection electrode are formed of the same material in the same process step, and the first electrode and the connection electrode are spaced apart from each other.
12. A display substrate according to claim 10 or 11, characterized in that an auxiliary electrode is further provided on the side of the layer where the pixel driving circuit is located facing away from the substrate, a planarization layer is further provided between the auxiliary electrode and the pixel defining layer, the connection electrode and the auxiliary electrode are electrically connected by means of a second via structure located in the planarization layer, and the connection electrode and the second electrode are electrically connected.
13. The display substrate of claim 12, wherein a plurality of the auxiliary electrodes are connected to form a grid-like structure.
14. The display substrate according to claim 13, wherein the auxiliary electrode comprises a stacked structure of a molybdenum metal layer, a copper metal layer, a titanium metal layer, an aluminum metal layer, and a titanium metal layer, or a stacked structure of an indium tin oxide layer, a silver metal layer, and an indium tin oxide layer.
15. The display substrate according to claim 13 or 14, wherein the auxiliary electrode has a thickness of 1000 to 6000 angstroms and a sheet resistance of 0 to 0.5 Ω/sq.
16. The display substrate according to claim 12, wherein a connection resistance of the second electrode and the connection electrode is 0 to 0.1 Ω.
17. The display substrate according to claim 5, wherein the first light emitting element, the second light emitting element, and the third light emitting element are electrically connected to a power supply voltage line through the first common voltage connection line, the second common voltage connection line, and the third common voltage connection line, respectively.
18. The display substrate of claim 17, wherein the display substrate comprises a transparent substrate,
The light-emitting unit comprises a functional layer and a light-emitting layer which are stacked, wherein the functional layer comprises a hole injection layer, a hole transport layer, an electron transport layer and an electron injection layer which are stacked in a direction which is sequentially far away from the first electrode, the light-emitting layer is arranged between the hole transport layer and the electron transport layer, and the light-emitting layer comprises a first color light-emitting layer, a second color light-emitting layer and a third color light-emitting layer;
The third color retention film layer comprises a third hole injection retention layer, a third hole transmission retention layer, a third color luminescence retention layer, a third electron transmission retention layer, a third electron injection retention layer, a second electrode retention third sub-layer and a third shielding retention layer which are arranged in a stacked mode.
19. The display substrate of claim 18, wherein the display substrate comprises a transparent substrate,
The light-emitting unit comprises a functional layer and a light-emitting layer which are stacked, wherein the functional layer comprises a hole injection layer, a hole transport layer, an electron transport layer and an electron injection layer which are stacked in a direction which is sequentially far away from the first electrode, the light-emitting layer is arranged between the hole transport layer and the electron transport layer, and the light-emitting layer comprises a first color light-emitting layer, a second color light-emitting layer and a third color light-emitting layer;
The second color retention film layer comprises a second hole injection retention layer, a second hole transport retention layer, a second color luminescence retention layer, a second electron transport retention layer, a second electron injection retention layer, a second electrode retention second sub-layer and a second shielding retention layer which are stacked; and is also provided with
The third color retention film layer comprises a third hole injection retention layer, a third hole transmission retention layer, a third color luminescence retention layer, a third electron transmission retention layer, a third electron injection retention layer, a second electrode retention third sub-layer and a third shielding retention layer which are arranged in a stacked mode.
20. The display substrate according to claim 18, wherein the light emitting unit includes a first light emitting unit and a second light emitting unit which are stacked, and the second electrode is provided on a side of the second light emitting unit away from the substrate.
21. The display substrate of claim 20, wherein the display substrate comprises a transparent substrate,
The light-emitting layer comprises a first organic emitting layer and a second organic emitting layer which are arranged in a stacked manner;
The first color light-emitting layer comprises a first color light-emitting first sub-layer and a first color light-emitting second sub-layer which are stacked;
The second color light-emitting layer comprises a second color light-emitting first sub-layer and a second color light-emitting second sub-layer which are stacked;
the third color light-emitting layer comprises a third color light-emitting first sub-layer and a third color light-emitting second sub-layer which are stacked;
The first light emitting unit includes the first organic emission layer including the first color light emitting first sub-layer, the second color light emitting first sub-layer, and the third color light emitting first sub-layer;
The second light emitting unit includes the second organic emission layer including the first color light emitting second sub-layer, the second color light emitting second sub-layer, and the third color light emitting second sub-layer.
22. The display substrate of claim 21, wherein a thickness of the first color light-emitting first sub-layer and a thickness of the first color light-emitting second sub-layer are different from each other; the second color light emitting first sub-layer and the second color light emitting second sub-layer have different thicknesses from each other; the thicknesses of the third color light-emitting first sub-layer and the third color light-emitting second sub-layer are different from each other.
23. The display substrate of claim 22, wherein a sum of thicknesses of the first color-emitting first sub-layer and the first color-emitting second sub-layer and a sum of thicknesses of the second color-emitting first sub-layer and the second color-emitting second sub-layer are different from a sum of thicknesses of the third color-emitting first sub-layer and the third color-emitting second sub-layer.
24. A display substrate according to any one of claims 21-23, characterized in that a charge generating layer is provided at least between the first color light emitting first sub-layer and the first color light emitting second sub-layer, and/or between the second color light emitting first sub-layer and the second color light emitting second sub-layer, and/or between the third color light emitting first sub-layer and the third color light emitting second sub-layer.
25. The display substrate according to claim 24, wherein the charge generation layer comprises a first charge generation layer and a second charge generation layer which are stacked.
26. The display substrate of claim 25, wherein the first charge generation layer and the second charge generation layer are configured according to a PN junction structure.
27. The display substrate of claim 25, wherein the display substrate comprises a transparent substrate,
The first light emitting unit comprises a hole injection layer, a first hole transport layer, a first electron blocking layer, the first organic emission layer, a first hole blocking layer, a first electron transport layer and the first charge generation layer which are stacked;
The second light emitting unit includes the second charge generation layer, a second hole transport layer, a second electron blocking layer, the second organic emission layer, a second hole blocking layer, a second electron transport layer, and an electron injection layer, which are stacked.
28. The display substrate of claim 1, wherein the display substrate comprises a transparent substrate,
The third color retention film layer comprises a first portion and a second portion which are arranged in a stacked mode, the first portion comprises a third hole injection retention layer, a third hole transmission first retention layer, a third electron blocking first retention layer, a third color luminescence first retention layer, a third hole blocking first retention layer, a third electron transmission first retention layer and a third charge generation first retention layer which are arranged in a stacked mode, and the second portion comprises a third charge generation second retention layer, a third hole transmission second retention layer, a third electron blocking second retention layer, a third color luminescence second retention layer, a third hole blocking second retention layer, a third electron transmission second retention layer, a third electron injection retention layer, a second electrode retention third sub-layer and a third shielding retention layer which are arranged in a stacked mode.
29. The display substrate according to claim 2, wherein,
The third color retention film layer comprises a first part and a second part which are arranged in a stacked manner, wherein the first part comprises a third hole injection retention layer, a third hole transmission first retention layer, a third electron blocking first retention layer, a third color luminescence first retention layer, a third hole blocking first retention layer, a third electron transmission first retention layer and a third charge generation first retention layer which are arranged in a stacked manner, and the second part comprises a third charge generation second retention layer, a third hole transmission second retention layer, a third electron blocking second retention layer, a third color luminescence second retention layer, a third hole blocking second retention layer, a third electron transmission second retention layer, a third electron injection retention layer, a second electrode retention third sub-layer and a third shielding retention layer which are arranged in a stacked manner;
and the second color retention film layer comprises a third portion and a fourth portion which are arranged in a stacked manner, wherein the third portion comprises a second hole injection retention layer, a second hole transmission first retention layer, a second electron blocking first retention layer, a second color luminescence first retention layer, a second hole blocking first retention layer, a second electron transmission first retention layer and a second charge generation first retention layer which are arranged in a stacked manner, and the fourth portion comprises a second charge generation second retention layer, a second hole transmission second retention layer, a second electron blocking second retention layer, a second color luminescence second retention layer, a second hole blocking second retention layer, a second electron transmission second retention layer, a second electron injection retention layer, a second electrode retention second sub-layer and a second shielding retention layer which are arranged in a stacked manner.
30. The display substrate according to claim 28 or 29, wherein the first color light-emitting layer, the second color light-emitting layer, and the third color light-emitting layer are a red light-emitting layer, a green light-emitting layer, and a blue light-emitting layer, respectively, each of the first color light-emitting layer, the second color light-emitting layer, and the third color light-emitting layer is a phosphorescent light-emitting layer, and the third color light-emitting layer further has a boron element therein.
31. The display substrate according to claim 30, wherein each of the red light-emitting layer, the green light-emitting layer, and the blue light-emitting layer comprises a host material and a phosphorescent material, wherein the molecular weight of the phosphorescent material included in the red light-emitting layer is greater than the molecular weight of the phosphorescent material included in the green light-emitting layer and greater than the molecular weight of the phosphorescent material included in the blue light-emitting layer.
32. The display substrate of claim 31, wherein the first electrode comprises a reflective metal layer and a transparent conductive layer in a stacked arrangement.
33. The display substrate of claim 32, wherein the material of the reflective metal layer comprises at least one of aluminum and silver and the material of the transparent conductive layer comprises at least one of indium tin oxide and indium zinc oxide.
34. The display substrate according to claim 32, wherein the second electrode comprises a single-layer structure or a multi-layer structure formed of at least one of silver, aluminum, magnesium, lithium, calcium, lithium fluoride, indium tin oxide, and indium zinc oxide.
35. The display substrate of claim 31, wherein the first electrode has a transmittance of greater than 80%.
36. The display substrate according to any one of claims 1 to 4, wherein the pixel driving circuit comprises a plurality of thin film transistors, at least one of the thin film transistors is a metal oxide thin film transistor, and at least one of the thin film transistors is a low temperature polysilicon thin film transistor.
37. A display substrate, comprising:
A substrate base;
The array is arranged on the substrate, wherein each pixel unit comprises a plurality of sub-pixels emitting light rays with different colors, and each sub-pixel comprises a light emitting element and a pixel driving circuit driving the corresponding light emitting element to emit light;
A pixel defining layer disposed on a side of the pixel driving circuit remote from the substrate base plate; wherein the pixel defining layer comprises a plurality of pixel openings, each pixel opening corresponding to one of the sub-pixels;
The pixel defining layer further includes a plurality of spacers separating adjacent ones of the pixel openings, an auxiliary electrode disposed in each of the spacers, the auxiliary electrode and the second electrode being electrically connected by a first via structure.
38. The display substrate according to claim 37, wherein each of the pixel units includes three of the sub-pixels, and the light emitting element corresponding to each of the sub-pixels includes a first electrode and a light emitting unit which are stacked;
the light emitting units included in the three sub-pixels in the same pixel unit respectively comprise a first color light emitting layer, a second color light emitting layer and a third color light emitting layer;
A second electrode is arranged on one side, far away from the substrate, of the light-emitting unit, and a shielding layer is arranged on one side, far away from the substrate, of the second electrode;
and a third color retaining film layer is arranged at the position of the shielding layer far away from the second color light-emitting layer and the position of the shielding layer far away from the first color light-emitting layer.
39. The display substrate of claim 38, wherein the substrate comprises a transparent substrate,
The shielding layer is far away from the position of the first color luminous layer, a second color retaining film layer is further arranged, and the second color retaining film layer and the third color retaining film layer are sequentially stacked in the direction far away from the substrate.
40. The display substrate of claim 39, wherein a maximum distance between the third color-preserving film layer and the first color-emitting layer at a location of the barrier layer away from the first color-emitting layer is different from a maximum distance between the third color-preserving film layer and the second color-emitting layer at a location of the barrier layer away from the second color-emitting layer.
41. The display substrate of claim 39, wherein a package structure is disposed on a side of the third color retention film layer remote from the substrate.
42. The display substrate according to claim 41, wherein,
The display substrate comprises a display area and a peripheral area which is annularly arranged at the periphery of the display area;
A first common voltage connecting wire, a second common voltage connecting wire and a third common voltage connecting wire are sequentially arranged in the peripheral area from a position close to the display area to a position far from the display area;
In each of the pixel units, the light emitting element includes a first light emitting element, a second light emitting element, and a third light emitting element, and the first common voltage connection line, the second common voltage connection line, and the third common voltage connection line are electrically connected to the first light emitting element, the second light emitting element, and the third light emitting element, respectively.
43. The display substrate of claim 42, wherein the display substrate comprises a transparent substrate,
The auxiliary electrode comprises a first titanium metal layer, an aluminum metal layer, a second titanium metal layer and a metal oxide layer which are sequentially stacked from a position close to the substrate to a position far from the substrate.
44. The display substrate of claim 43, wherein the first titanium metal layer has a thickness ranging from 100 to 800 angstroms, the aluminum metal layer has a thickness ranging from 2000 to 6000 angstroms, the second titanium metal layer has a thickness ranging from 100 to 500 angstroms, and the metal oxide layer has a thickness ranging from 100 to 300 angstroms.
45. The display substrate of claim 44, wherein the first titanium metal layer, the aluminum metal layer, the second titanium metal layer, and the metal oxide layer have thicknesses of 500 angstroms, 5000 angstroms, 300 angstroms, and 200 angstroms, respectively.
46. The display substrate according to claim 45, wherein the auxiliary electrode comprises a multilayer structure which is stacked, and the multilayer structure included in the auxiliary electrode is connected in parallel through a via hole.
47. The display substrate according to claim 46, further comprising a gate line, a data line, a power supply voltage signal line, and an initialization signal line, wherein the auxiliary electrode is provided in a layer with at least one of the gate line, the data line, the power supply voltage signal line, and the initialization signal line.
48. The display substrate according to claim 46, further comprising a gate line, a data line, a power supply voltage signal line, an initialization signal line, a reference voltage signal line, and an induced voltage signal line, wherein the auxiliary electrode is provided in a layer with at least one of the gate line, the data line, the power supply voltage signal line, the initialization signal line, the reference voltage signal line, and the induced voltage signal line.
49. The display substrate according to any one of claims 39 to 48, wherein the light-emitting unit comprises a functional layer and a light-emitting layer which are stacked, the functional layer comprises a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer which are stacked in the direction away from the first electrode in this order, and the light-emitting layer is provided between the hole transport layer and the electron transport layer, the light-emitting layer comprises the first color light-emitting layer, the second color light-emitting layer, and the third color light-emitting layer;
The third color retention film layer comprises a third hole injection retention layer, a third hole transmission retention layer, a third color luminescence retention layer, a third electron transmission retention layer, a third electron injection retention layer, a second electrode retention third sub-layer and a third shielding retention layer which are arranged in a stacked mode.
50. The display substrate of claim 49, wherein the display substrate comprises,
The light-emitting unit comprises a functional layer and a light-emitting layer which are stacked, wherein the functional layer comprises a hole injection layer, a hole transport layer, an electron transport layer and an electron injection layer which are stacked in a direction which is sequentially far away from the first electrode, the light-emitting layer is arranged between the hole transport layer and the electron transport layer, and the light-emitting layer comprises a first color light-emitting layer, a second color light-emitting layer and a third color light-emitting layer;
The second color retention film layer comprises a second hole injection retention layer, a second hole transport retention layer, a second color luminescence retention layer, a second electron transport retention layer, a second electron injection retention layer, a second electrode retention second sub-layer and a second shielding retention layer which are stacked; and is also provided with
The third color retention film layer comprises a third hole injection retention layer, a third hole transmission retention layer, a third color luminescence retention layer, a third electron transmission retention layer, a third electron injection retention layer, a second electrode retention third sub-layer and a third shielding retention layer which are arranged in a stacked mode.
51. The display substrate according to claim 39, wherein the light-emitting unit includes a first light-emitting unit and a second light-emitting unit which are stacked, and wherein the second electrode is provided on a side of the second light-emitting unit which is away from the substrate.
52. The display substrate of claim 51, wherein the display substrate comprises,
The light-emitting layer comprises a first organic emitting layer and a second organic emitting layer which are arranged in a stacked manner;
The first color light-emitting layer comprises a first color light-emitting first sub-layer and a first color light-emitting second sub-layer which are stacked;
The second color light-emitting layer comprises a second color light-emitting first sub-layer and a second color light-emitting second sub-layer which are stacked;
the third color light-emitting layer comprises a third color light-emitting first sub-layer and a third color light-emitting second sub-layer which are stacked;
The first light emitting unit includes the first organic emission layer including the first color light emitting first sub-layer, the second color light emitting first sub-layer, and the third color light emitting first sub-layer;
The second light emitting unit includes the second organic emission layer including the first color light emitting second sub-layer, the second color light emitting second sub-layer, and the third color light emitting second sub-layer.
53. The display substrate of claim 52, wherein a thickness of the first color emissive first sub-layer and a thickness of the first color emissive second sub-layer are different from each other; the second color light emitting first sub-layer and the second color light emitting second sub-layer have different thicknesses from each other; the thicknesses of the third color light-emitting first sub-layer and the third color light-emitting second sub-layer are different from each other.
54. The display substrate of claim 53, wherein a sum of thicknesses of the first color-emitting first sub-layer and the first color-emitting second sub-layer and a sum of thicknesses of the second color-emitting first sub-layer and the second color-emitting second sub-layer are different from a sum of thicknesses of the third color-emitting first sub-layer and the third color-emitting second sub-layer.
55. A display substrate according to any one of claims 52 to 54 wherein a charge generating layer is provided at least between the first colour light emitting first sub-layer and the first colour light emitting second sub-layer and/or between the second colour light emitting first sub-layer and the second colour light emitting second sub-layer and/or between the third colour light emitting first sub-layer and the third colour light emitting second sub-layer.
56. The display substrate according to claim 55, wherein the charge generation layer comprises a first charge generation layer and a second charge generation layer which are stacked.
57. The display substrate according to claim 56, wherein the first charge generation layer and the second charge generation layer are configured in a PN junction structure.
58. The display substrate of claim 56 or 57, wherein,
The first light emitting unit comprises a hole injection layer, a first hole transport layer, a first electron blocking layer, the first organic emission layer, a first hole blocking layer, a first electron transport layer and the first charge generation layer which are stacked;
The second light emitting unit includes the second charge generation layer, a second hole transport layer, a second electron blocking layer, the second organic emission layer, a second hole blocking layer, a second electron transport layer, and an electron injection layer, which are stacked.
59. The display substrate of claim 38, wherein the substrate comprises a transparent substrate,
The third color retention film layer comprises a first portion and a second portion which are arranged in a stacked mode, the first portion comprises a third hole injection retention layer, a third hole transmission first retention layer, a third electron blocking first retention layer, a third color luminescence first retention layer, a third hole blocking first retention layer, a third electron transmission first retention layer and a third charge generation first retention layer which are arranged in a stacked mode, and the second portion comprises a third charge generation second retention layer, a third hole transmission second retention layer, a third electron blocking second retention layer, a third color luminescence second retention layer, a third hole blocking second retention layer, a third electron transmission second retention layer, a third electron injection retention layer, a second electrode retention third sub-layer and a third shielding retention layer which are arranged in a stacked mode.
60. The display substrate of claim 39, wherein the display substrate comprises a transparent substrate,
The third color retention film layer comprises a first part and a second part which are arranged in a stacked manner, wherein the first part comprises a third hole injection retention layer, a third hole transmission first retention layer, a third electron blocking first retention layer, a third color luminescence first retention layer, a third hole blocking first retention layer, a third electron transmission first retention layer and a third charge generation first retention layer which are arranged in a stacked manner, and the second part comprises a third charge generation second retention layer, a third hole transmission second retention layer, a third electron blocking second retention layer, a third color luminescence second retention layer, a third hole blocking second retention layer, a third electron transmission second retention layer, a third electron injection retention layer, a second electrode retention third sub-layer and a third shielding retention layer which are arranged in a stacked manner;
And the second color retention film layer comprises a third portion and a fourth portion which are arranged in a stacked manner, wherein the third portion comprises a second hole injection retention layer, a second hole transport first retention layer, a second electron blocking first retention layer, a second color luminescence first retention layer, a second hole blocking first retention layer, a second electron transport first retention layer and a second charge generation first retention layer which are arranged in a stacked manner, and the fourth portion comprises a second charge generation second retention layer, a second hole transport second retention layer, a second electron blocking second retention layer, a second color luminescence second retention layer, a second hole blocking second retention layer, a second electron transport second retention layer, a second electron injection retention layer, a second electrode retention second sub-layer and a second shielding retention layer which are arranged in a stacked manner.
61. The display substrate according to claim 59 or 60, wherein the first color light-emitting layer, the second color light-emitting layer, and the third color light-emitting layer are a red light-emitting layer, a green light-emitting layer, and a blue light-emitting layer, respectively, each of the first color light-emitting layer, the second color light-emitting layer, and the third color light-emitting layer is a phosphorescent light-emitting layer, and the third color light-emitting layer further has a boron element therein.
62. The display substrate of claim 61, wherein the red light-emitting layer, the green light-emitting layer, and the blue light-emitting layer each comprise a host material and a phosphorescent material, wherein the red light-emitting layer comprises a molecular weight of the phosphorescent material that is greater than a molecular weight of the phosphorescent material that the green light-emitting layer comprises, and is greater than a molecular weight of the phosphorescent material that the blue light-emitting layer comprises.
63. The display substrate according to any one of claims 59 to 62, wherein the first electrode comprises a reflective metal layer and a transparent conductive layer which are stacked.
64. The display substrate of claim 63, wherein the material of the reflective metal layer comprises at least one of aluminum and silver, and the material of the transparent conductive layer comprises at least one of indium tin oxide and indium zinc oxide.
65. The display substrate of claim 64, wherein the second electrode comprises a single-layer structure or a multi-layer structure formed of at least one of silver, aluminum, magnesium, lithium, calcium, lithium fluoride, indium tin oxide, and indium zinc oxide.
66. The display substrate of any one of claims 59-62, wherein the first electrode has a transmittance of greater than 80%.
67. The display substrate according to claim 64 or 65, wherein the pixel driving circuit comprises a plurality of thin film transistors, wherein at least one of the thin film transistors is a metal oxide thin film transistor, and wherein at least one of the thin film transistors is a low temperature polysilicon thin film transistor.
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