CN221057427U - Packaging structure - Google Patents

Abstract

At least one embodiment of the present disclosure provides a package structure including: packaging a substrate; the interposer is arranged on the first side of the packaging substrate and is electrically connected with the packaging substrate; the electronic chip module is arranged on one side of the intermediate layer far away from the packaging substrate and is electrically connected with the intermediate layer, wherein the electronic chip module comprises a system chip and a high-bandwidth memory chip; and an optical module disposed on the first side of the package substrate and on one side of the interposer in a direction parallel to a main surface of the package substrate, wherein the optical module is electrically connected to the electronic chip module through the package substrate and the interposer, wherein the optical module and the interposer overlap in a direction parallel to the main surface of the package substrate. The packaging structure integrates the optical module and the electronic chip module, so that communication and calculation can be more tightly combined, and communication calculation efficiency is improved.

Description

Packaging structure

Technical Field

Embodiments of the present disclosure relate to a package structure.

Background

Semiconductor packaging techniques may integrate multiple electronic chips together, for example, a system on chip (SoC) and a memory chip together to provide High bandwidth to the system chip and enable High-performance operations (HPC).

Optical modules are an important component of a communication system and are typically separate chip modules. However, such light modules are packaged separately, which is costly; moreover, when the connection between the optical module and the electronic chip is required to be realized, the signal transmission path between the optical module and the electronic chip which are packaged independently is longer, and the communication calculation efficiency is lower.

Disclosure of utility model

The embodiment of the disclosure provides a packaging structure, which integrates an optical module and an electronic chip module, so that communication and calculation can be more tightly combined, and communication calculation efficiency is improved.

According to at least one embodiment of the present disclosure, there is provided a package structure including: packaging a substrate; the interposer is arranged on the first side of the packaging substrate and is electrically connected with the packaging substrate; an electronic chip module disposed on a side of the interposer remote from the package substrate and electrically connected to the interposer, wherein the electronic chip module includes a system chip and a high bandwidth memory chip electrically connected to each other through the interposer, and the high bandwidth memory chip includes a plurality of sub-chips stacked in a direction perpendicular to a main surface of the package substrate and electrically connected to each other; and an optical module disposed on the first side of the package substrate and on one side of the interposer in a direction parallel to the main surface of the package substrate, wherein the optical module is electrically connected to the electronic chip module through the package substrate and the interposer, wherein the optical module and the interposer overlap in a direction parallel to the main surface of the package substrate.

The package structure provided in at least one embodiment of the present disclosure is characterized in that an orthographic projection of the optical module on the main surface of the package substrate is staggered from an orthographic projection of the interposer on the main surface of the package substrate.

The package structure provided in accordance with at least one embodiment of the present disclosure is characterized in that the front projection of the optical module and the front projection of the interposer abut each other but do not overlap.

The package structure provided according to at least one embodiment of the present disclosure is characterized by further comprising: an optical fiber is coupled to the optical module and configured to at least one of transmit and receive optical signals to and from the optical module.

The package structure provided according to at least one embodiment of the present disclosure is characterized by further comprising: and the conductive terminal is positioned on a second side of the packaging substrate opposite to the first side, wherein the packaging structure is electrically connected to a circuit substrate through the conductive terminal, and the circuit substrate is positioned on one side of the packaging substrate far away from the optical module and the interposer.

The packaging structure provided by at least one embodiment of the present disclosure is characterized in that the orthographic projection of the optical module on the circuit substrate is located in the orthographic projection of the packaging substrate on the circuit substrate.

The package structure provided according to at least one embodiment of the present disclosure is characterized by further comprising: and the encapsulation layer is arranged on one side of the intermediate layer far away from the encapsulation substrate and surrounds and encapsulates the electronic chip module.

The packaging structure provided in at least one embodiment of the present disclosure is characterized in that the orthographic projection of the encapsulation layer on the packaging substrate is located in the orthographic projection of the interposer on the packaging substrate and is staggered with the orthographic projection of the optical module on the packaging substrate.

The package structure provided according to at least one embodiment of the present disclosure is characterized in that the optical module includes: a substrate; and an optical device disposed on the substrate.

A package structure provided in accordance with at least one embodiment of the present disclosure is characterized in that the electronic chip module includes a processor for processing an electrical signal, and the electrical signal includes an electrical signal converted from an optical signal of the optical module.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly described below, and it is apparent that the drawings in the following description relate only to some embodiments of the present disclosure, not to limit the present disclosure.

Fig. 1 illustrates a schematic cross-sectional view of a package structure according to some embodiments of the present disclosure.

Fig. 2 illustrates a schematic cross-sectional view of a package structure mounted to a wiring substrate according to some embodiments of the present disclosure.

Fig. 3 illustrates a schematic cross-sectional view of a more specific structure of a package structure according to some embodiments of the present disclosure.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present disclosure more apparent, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. It will be apparent that the described embodiments are some, but not all, of the embodiments of the present disclosure. All other embodiments, which can be made by one of ordinary skill in the art without the need for inventive faculty, are within the scope of the present disclosure, based on the described embodiments of the present disclosure.

Unless defined otherwise, technical or scientific terms used in this disclosure should be given the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The terms "first," "second," and the like, as used in this disclosure, do not denote any order, quantity, or importance, but rather are used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that elements or items preceding the word are included in the element or item listed after the word and equivalents thereof, but does not exclude other elements or items. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

The embodiment of the disclosure provides a packaging structure, which comprises: packaging a substrate; the interposer is arranged on the first side of the packaging substrate and is electrically connected with the packaging substrate; the electronic chip module is arranged on one side of the intermediate layer far away from the packaging substrate and is electrically connected with the intermediate layer; and an optical module disposed on the first side of the package substrate and on one side of the interposer in a direction parallel to a main surface of the package substrate, wherein the optical module is electrically connected to the electronic chip module through the package substrate and the interposer.

In the packaging structure of the embodiment of the disclosure, the optical module and the electronic chip module are integrated together, so that the packaging integration level is improved, communication and calculation can be more tightly combined, and the communication calculation efficiency is improved. The optical module and the electronic chip module are electrically connected through the packaging substrate and the interposer in the packaging structure, so that the signal transmission distance between the optical module and the electronic chip module is shortened, the signal loss is reduced, and the bandwidth can be improved. In addition, the electronic chip module is arranged on one side of the intermediate layer far away from the packaging substrate, and the optical module and the intermediate layer are arranged on the first side of the packaging substrate side by side, so that the increase of the size of the intermediate layer can be avoided, and the integration difficulty of the optical module and the electronic chip module can be reduced. On the other hand, when the package structure is mounted to a circuit board (circuit board) such as a PCB, since the optical module and the electronic chip module are already electrically connected through the package substrate and the interposer within the package structure, wiring for connecting the optical module and the electronic chip module can be reduced in the circuit board, and thus the wiring area of the circuit board can be reduced.

Fig. 1 illustrates a schematic cross-sectional view of a package structure according to some embodiments of the present disclosure; fig. 2 illustrates a schematic cross-sectional view of a package structure connected to a wiring substrate according to some embodiments of the present disclosure.

Referring to fig. 1, in some embodiments, a package structure 900 includes a package substrate 100, an interposer (interposer) 200, an electronic chip module (electronic chip module) 300, and an optical module (photonics module) 500. For example, the package structure 900 may be a chip-on-wafer-on-substrate (CoWoS) package. The package substrate 100 has, for example, a first side S1 and a second side S2 opposite to each other in a first direction D1. The interposer 200 is disposed on the first side S1 of the package substrate 100 and is electrically connected to the package substrate 100. The electronic chip module 300 is disposed on a side of the interposer 200 away from the package substrate 100, and is electrically connected to the interposer 200. The optical module 500 is disposed on the first side S1 of the package substrate and is located on one side of the interposer 200 in a direction (e.g., the second direction D2) parallel to the main surface of the package substrate 100; for example, in some examples, as shown in fig. 1, the optical module 500 may be disposed on the left side of the interposer 200; in other examples, the optical module 500 may also be disposed on the right side of the interposer 200; it should be understood that the specific positions of the optical module 500 on the interposer 200 side are only illustrative, and the disclosure is not limited thereto, and the optical module 500 may be disposed at any suitable position on the interposer 200 side according to the product requirements; the second direction D2 and the first direction D1 intersect each other, e.g. are substantially perpendicular to each other. The optical module 500 is electrically connected to the electronic chip module 300 through the package substrate 100 and the interposer 200.

That is, the electronic chip module 300 and the interposer 200 are stacked in the first direction D1, and the optical module 500 and the interposer 200 are disposed side by side in the second direction D2 and are located on the same side of the package substrate 100. In some embodiments, the orthographic projection of the electronic chip module 300 on the major surface of the package substrate 100 is within the orthographic projection of the interposer 200 on the major surface of the package substrate 100; the orthographic projection of the optical module 500 on the main surface of the package substrate 100 is offset from the orthographic projection of the interposer 200 on the main surface of the package substrate 100. In this context, staggering of the orthographic projections of a plurality of members on the same reference plane means that the orthographic projections of the plurality of members do not overlap, and includes the case where the orthographic projections of the plurality of members are spaced apart from one another but do not overlap, as well as the case where the orthographic projections of the plurality of members are adjacent to one another but do not overlap.

In some embodiments, the optical module 500 and the interposer 200 overlap in a direction parallel to a major surface of the package substrate 100 (e.g., the second direction D2); herein, overlapping of a plurality of members in a certain direction means that the orthographic projections of the plurality of members overlap on a reference plane perpendicular to the direction; that is, the orthographic projection of the optical module 500 on a reference plane (e.g., an extension plane of the sidewall of the package substrate 100) perpendicular to the second direction D2 overlaps with the orthographic projection of the interposer 200 on the reference plane. The major surface of the package substrate 100 may be a surface thereof on a side close to the interposer 200 and the optical module 500 (i.e., a surface of a first side) or may also be a surface of a second side thereof, and extends in a horizontal direction in the illustrated drawing.

In some embodiments, the structure including interposer 200 and electronic chip module 300 may be referred to as sub-package structure 350; for example, the package structure 900 is CoWoS packages, and the sub-package structure 350 may be a chip-on-wafer (CoW) package. That is, the optical module 500 and the sub-package structure 350 are disposed side by side at the first side S1 of the package substrate 100; the front projection of the optical module 500 onto the major surface of the package substrate 100 is offset from the front projection of the sub-package structure 350 onto the major surface of the package substrate 100. That is, in this embodiment, the optical module 500 is integrated in CoWoS packages to integrate the optical module 500 and the electronic chip module 300 together, but the optical module 500 is not integrated in the sub-package structure 350, so that the optical module 500 and the electronic chip module 300 can be decoupled structurally to a certain extent while being integrated in the same package, and the difficulty of the integration process can be reduced, and the cost can be saved.

In some embodiments, the package structure 900 further includes an optical fiber 600, the optical fiber 600 being coupled to the optical module 500 and configured to at least one of transmit optical signals to the optical module 500 and receive optical signals from the optical module 500.

For example, the optical module 500 may implement conversion of optical signals and electrical signals, and the optical module 500 is electrically connected with the electronic chip module 300 through the package substrate 100 and the interposer 200, so that the electrical signals converted by the optical signals of the optical module 500 may be transmitted to the electronic chip module 300. In some embodiments, a processor may be included in the electronic chip module 300 that may be used for data processing, such as may be used to process electrical signals, including electrical signals converted from optical signals of the optical module 500. Therefore, the signal transmission path between the optical module and the electronic chip module can be shortened, the signal loss is reduced, and the bandwidth is improved. The package structure 900 can achieve tight combination of communication and calculation by integrating the optical module and the electronic chip module together, and improves communication calculation efficiency.

With continued reference to fig. 1, in some embodiments, the package structure 900 may further include conductive terminals 120, the conductive terminals 120 being disposed on the second side S2 of the package substrate 100 and for external connection of the package structure 900. The conductive terminals 120 are electrically connected to the electronic chip module 300 through the package substrate 100 and the interposer 200, and electrically connected to the optical module 500 through the package substrate 100. The package structure 900 may be electrically connected to an external member through the conductive terminal 120; for example, the external member may be a wiring substrate.

For example, as shown in fig. 2, the package structure 900 is mounted on the circuit substrate 1000, and is electrically connected to the circuit substrate 1000 through the conductive terminals 120, and the circuit substrate 1000 is located on a side of the package substrate 100 away from the optical module 500 and the interposer 200. The wiring substrate 1000 is, for example, a Printed Circuit Board (PCB).

The optical module 500 and the electronic chip module 300 are connected to each other through the package substrate 100 and the interposer 200, and are connected to the wiring substrate 1000 through the package substrate 100 and the conductive terminals 120. The orthographic projection of the optical module 500 on a reference plane parallel to the main surface of the package substrate 100 is located within the orthographic projection of the package substrate 100 on the reference plane; the reference plane is, for example, a main surface of the wiring substrate 1000, for example, a surface of the wiring substrate 1000 on a side close to the package substrate. That is, the orthographic projection of the optical module 500 onto the main surface of the wiring substrate 1000 is located within the orthographic projection of the package substrate 100 onto the main surface of the wiring substrate 1000. In some embodiments, the area of the orthographic projection of the package substrate 100 on the circuit substrate 1000 may be equal to or greater than the sum of the orthographic projection areas of the optical module 500 and the interposer 200 on the circuit substrate 1000.

In the embodiment of the present disclosure, the package structure 900 integrates the optical module 500 and the electronic chip module 300 together, so that the optical module 500 and the electronic chip module 300 are connected to each other through the package substrate and the interposer in the package structure, thereby shortening the signal transmission distance between the optical module 500 and the electronic chip module 300 and reducing the routing area of the circuit substrate 1000; for example, in some electronic devices, the optical module is individually packaged, and the optical module and the packaging structure including the electronic chip are respectively mounted on a circuit substrate such as a printed circuit board, and connection between the optical module and the electronic chip is realized through the circuit substrate, in such devices, the signal transmission distance between the optical module and the electronic chip is long, and connection wires between the optical module and the electronic chip are all required to be disposed in the circuit substrate. Compared with the electronic device in which the independent optical module and the electronic packaging structure comprising the electronic chip module are respectively arranged on the circuit substrate and the electrical connection between the optical module and the electronic chip module is realized through the circuit substrate, the packaging structure of the embodiment of the disclosure can greatly shorten the signal transmission distance between the optical module and the electronic chip and reduce the wiring used for connecting the optical module and the electronic chip module in the circuit substrate, so that the wiring area of the circuit substrate can be reduced. For example, wiring for connecting the optical module and the electronic chip module may not be provided in the wiring substrate 1000.

Referring to fig. 1 and 2, in some embodiments, the electronic chip module 300 may include one or more chips, for example, may include at least one of one or more logic chips and one or more memory chips, etc. The logic chip includes logic circuitry and may be or include, for example, a system on chip (SoC) that may be or include a high bandwidth memory (high bandwidth memory, HBM) chip. For example, the electronic chip module 300 may include a first chip 301 and a second chip 302, where the first chip 301 is a logic chip such as an SoC, and the second chip 302 may be a memory chip such as an HBM.

Fig. 3 illustrates a schematic cross-sectional view of a more specific structure of a package structure 900 according to some embodiments of the present disclosure.

Referring to fig. 3, in some embodiments, the optical module 500 may include one or more optical chips (photonics chip); for example, an optical chip includes a substrate and an optics layer disposed on the substrate, the optics layer including one or more optics disposed on the substrate, such as optics including gratings, waveguides, and the like. Fig. 3 schematically shows a first substrate 51 of an optical module 500 and an optical device 52 arranged on the first substrate 51. It should be understood that the location, number, etc. of the optical devices 52 shown in the figures are illustrative only and that the specific configuration of the optical devices is not shown and that suitable optical devices may be provided depending on the product requirements.

For example, the first substrate 51 is located on a side of the optical device layer near the package substrate 100, and conductive members such as through substrate vias (through substrate via, TSVs) may be disposed in the first substrate 51, connected to one or more optical devices of the optical device layer, and may be used for electrical connection between the optical module 500 and other conductive members (e.g., the second conductive connection 520 described below). The optics layer may further include other components such as interconnect structures for at least one of connection between a plurality of optics and connection between optics and substrate vias. For example, the optics layer is located on the side of the first substrate 51 remote from the package substrate 100 and close to the optical fibers 600. However, the disclosure is not limited thereto.

In some embodiments, each chip in the electronic chip module 300 may include a substrate and a device layer disposed on the substrate. The substrate may be a semiconductor substrate, such as a silicon substrate, and the substrate may alternatively or additionally comprise other suitable semiconductor materials (e.g., germanium). For example, the device layer includes one or more electronic devices formed on the substrate, including at least one of active devices (ACTIVE DEVICE) and passive devices (PASSIVE DEVICE), for example. Active devices include, for example, transistors, diodes, etc., and passive devices include, for example, capacitors, resistors, inductors, etc. For example, fig. 3 schematically illustrates a second substrate 31 of a first chip 301 and device layers including one or more electronic devices 32. It should be understood that the location, number, etc. of the electronic devices 32 shown in the figures are illustrative only and that the specific structure of the devices is not shown, as appropriate devices may be provided according to product requirements.

In some embodiments, an interconnect structure is also provided in the device layer; for example, the interconnect structure includes one or more layers of conductive traces embedded in a dielectric material. A plurality of electronic devices 32 may be connected by an interconnect structure to form a functional circuit. For example, the device layer of the first chip 301 is located on the side of the second substrate 31 near the interposer 200, and a conductive pad or like connection may be provided on the side of the interconnect structure remote from the substrate for electrical connection between the first chip 301 and other conductive members (e.g., the third conductive connection 320 described below). However, the disclosure is not limited thereto.

In some embodiments, second chip 302 may be an HBM memory chip and may include a plurality of sub-memory chips stacked on top of each other, including, for example, a plurality of sub-chips 302a. The plurality of sub-chips 302a are stacked on each other in a direction perpendicular to the main surface of the package substrate (for example, the first direction D1), and may be connected to each other by conductive connection members such as micro bumps, or may be electrically connected by bonding to each other by hybrid bonding or the like. Each of the sub-chips 302a may also have a substrate and a device layer, which are not described herein.

In some embodiments, connection members are provided in an interposer (interposer) 200 to provide electrical connections between the plurality of chips of the electronic chip module 300 and between the plurality of chips and the package substrate 100.

For example, interposer 200 may include a substrate, a substrate via, and an interconnect structure. The substrate may be a semiconductor substrate, such as a silicon substrate, but may alternatively or additionally include other suitable semiconductor materials. The interconnect structure is provided on the substrate, for example on a side of the substrate close to the electronic chip module. In some embodiments, the interconnect structure includes at least one of one or more layers of conductive traces and conductive vias embedded in the dielectric structure; in some embodiments, the interposer includes conductive pads on a side of the interconnect structure remote from the substrate for connection to the chip. The substrate via is electrically connected with the interconnect structure and extends through the substrate for electrical connection with the package substrate 100. The plurality of chips may be connected to each other through the interconnect structure of the interposer and electrically connected to the package substrate 100 through the interconnect structure and the substrate via.

In alternative embodiments, interposer 200 may include a dielectric layer and a rerouting structure (redistribution structure); the dielectric layer may comprise, for example, an organic dielectric material such as polyimide, and the redistribution structure is embedded in the dielectric layer and may comprise one or more redistribution layers. The rewiring structure provides electrical connections between a plurality of chips of the electronic chip module and between the plurality of chips and the package substrate.

In other embodiments, interposer 200 may include a dielectric layer, a bridge chip, and a rewiring structure. The bridge chip is used for providing connection between a plurality of chips of the electronic chip module, and the rerouting structure is used for providing electrical connection between the plurality of chips and the package substrate, or can be partially used for connection between chips.

Conductive traces are included in the package substrate 100 to provide electrical connection between the optical module 500 and the electronic chip module 300 of the sub-package structure 350. The package substrate 100 may further include conductive pads or the like on the first and second sides thereof, which are connected with the conductive traces and are used for electrical connection between the package substrate and other components.

With continued reference to fig. 3, in some embodiments, the optical module 500 is connected to the package substrate 100 by the second conductive connection 520, and the sub-package structure 350 is connected to the package substrate 100 by the first conductive connection 220. For example, the second conductive connector 520 is disposed between the optical module 500 and the package substrate 100 in a direction perpendicular to the main surface of the package substrate 100 (e.g., between the substrate through hole of the optical module 500 and the conductive pad of the package substrate 100), and the first conductive connector 220 is disposed between the interposer 200 and the package substrate 100 in a direction perpendicular to the main surface of the package substrate 100 (e.g., between the connection member of the interposer 200 and the conductive pad of the package substrate).

In some embodiments, the package structure 900 further includes a first underfill layer (unrerfill layer) 230 and a second underfill layer 530. The first underfill layer 230 fills the space between the interposer 200 and the package substrate 100 and surrounds the plurality of first conductive connectors 220. The second underfill layer 530 fills the space between the optical module 500 and the package substrate 100 and circumferentially protects the plurality of second conductive connectors 520. The first and second underfill layers 230 and 530 may be spaced apart from each other or may be fused in contact with each other.

In some embodiments, one or more chips (e.g., first chip 301, second chip 302) in electronic chip module 300 are each electrically connected to interposer 200 by third conductive connections 320, and a third underfill layer 330 is disposed between the one or more chips and interposer 200. The third underfill layer 330 fills the space between the one or more chips and the interposer 200 and surrounds the plurality of third conductive connectors 320.

For example, the conductive connector and the conductive terminal may each be or include at least one of a metal material such as solder (holder) and copper. For example, the third conductive connector 320 may be or include micro-bumps (micro-bumps), the first conductive connector 220 and the second conductive connector 520 may be or include controlled collapse chip connection (Controlled collapsed chip connection, C4) bumps, and the conductive terminals 120 may be or include solder balls such as ball grid arrays (ball GRID ARRAY, BGA).

In some embodiments, the package structure 900 may further include an encapsulation layer (encapsulation layer) 336. For example, the encapsulation layer 336 is included in the sub-package structure 350, and is disposed on a side of the interposer 200 away from the package substrate 100, and surrounds the encapsulated electronic chip module 300. The encapsulation layer 336 may include a molding compound, such as an epoxy molding compound (epoxy molding compound, EMC), but the disclosure is not limited thereto. In some embodiments, the plurality of chips (e.g., first chip 301, second chip 302) are spaced apart from one another on the interposer 200, and an encapsulation layer 336 surrounds the sidewalls of the plurality of chips and fills the spaces between the plurality of chips and may cover the sidewalls of the third underfill layer 330. In some embodiments, the surface of the encapsulation layer 336 facing away from the interposer may be substantially flush with the surface of the electronic chip module 300 on the side facing away from the interposer. In alternative embodiments, the encapsulation layer 336 may also cover the surface of the electronic chip module 300 on the side remote from the interposer. In some embodiments, the sidewalls of the encapsulation layer 336 may be substantially aligned with the sidewalls of the interposer 200 in a direction perpendicular to the major surface of the package substrate, although the disclosure is not limited thereto.

Since the optical module 500 is disposed on the package substrate 100, but not on the interposer 200, the encapsulation layer 336 disposed on the interposer 200 surrounding the electronic chip module 300 may not encapsulate the optical module 500. For example, the front projection of the encapsulation layer 336 onto the package substrate 100 is within the front projection of the interposer 200 onto the package substrate 100 and is offset from the front projection of the optical module 500 onto the package substrate 100.

In some embodiments, an additional encapsulant layer may be further disposed on the package substrate 100 to surround and encapsulate the optical module 500, for example, the sidewalls of the optical module 500 and the second underfill layer 530 may be covered, but the disclosure is not limited thereto. The additional encapsulation layer may not be provided on the package substrate 100.

In the embodiment of the disclosure, the packaging structure integrates the optical module and the electronic chip module, so that communication and calculation can be more tightly combined, and communication calculation efficiency is improved; the optical module and the electronic chip module are connected through the packaging substrate and the interposer, so that the signal transmission distance between the optical module and the electronic chip module can be greatly shortened, the signal loss is reduced, and the bandwidth is improved. In addition, since the optical module is integrated in the packaging structure, board-level resources of circuit substrates such as a PCB (printed circuit board) can be saved, and the wiring area in the PCB can be reduced. Furthermore, the encapsulation of the optical module and the electronic chip module is integrated, so that the encapsulation cost can be reduced.

On the other hand, the optical module is mounted on the package substrate, and the electronic chip module is mounted on the interposer on the package substrate; compared with the method that the optical module and the electronic chip module are arranged on the medium layer or stacked together, the embodiment of the disclosure can reduce the difficulty of the packaging process to a certain extent, save the cost, and realize the decoupling of the optical module and the electronic chip module in structure while integrating the optical module and the electronic chip in the same package; for example, the optical module and the electronic chip module may be tested separately, and when the optical module or the electronic chip module is damaged (fail), the optical module or the electronic chip module may be maintained or replaced separately without affecting each other.

The following points need to be described:

(1) In the drawings of the embodiments of the present disclosure, only the structures related to the embodiments of the present disclosure are referred to, and other structures may refer to the general design.

(2) Features of the same and different embodiments of the disclosure may be combined with each other without conflict.

The foregoing is merely a specific embodiment of the disclosure, but the protection scope of the disclosure is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the disclosure, and it should be covered in the protection scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims (10)

1. A package structure, comprising:

packaging a substrate;

the interposer is arranged on the first side of the packaging substrate and is electrically connected with the packaging substrate;

An electronic chip module disposed on a side of the interposer remote from the package substrate and electrically connected to the interposer, wherein the electronic chip module includes a system chip and a high bandwidth memory chip electrically connected to each other through the interposer, and the high bandwidth memory chip includes a plurality of sub-chips stacked in a direction perpendicular to a main surface of the package substrate and electrically connected to each other; and

An optical module disposed on the first side of the package substrate and on one side of the interposer in a direction parallel to the main surface of the package substrate, wherein the optical module is electrically connected to the electronic chip module through the package substrate and the interposer,

Wherein the optical module and the interposer overlap in a direction parallel to the major surface of the package substrate.

2. The package structure of claim 1, wherein an orthographic projection of the optical module on the major surface of the package substrate is offset from an orthographic projection of the interposer on the major surface of the package substrate.

3. The package structure of claim 2, wherein the front projection of the optical module and the front projection of the interposer abut each other but do not overlap.

4. The package structure of claim 1, further comprising:

an optical fiber is coupled to the optical module and configured to at least one of transmit and receive optical signals to and from the optical module.

5. The package structure of claim 1, further comprising:

a conductive terminal located at a second side of the package substrate opposite to the first side,

The packaging structure is electrically connected to a circuit substrate through the conductive terminals, and the circuit substrate is located on one side of the packaging substrate, which is far away from the optical module and the interposer.

6. The package structure of claim 5, wherein the orthographic projection of the optical module on the wiring substrate is located within the orthographic projection of the package substrate on the wiring substrate.

7. The package structure of claim 1, further comprising:

and the encapsulation layer is arranged on one side of the intermediate layer far away from the encapsulation substrate and surrounds and encapsulates the electronic chip module.

8. The package structure of claim 7, wherein the orthographic projection of the encapsulation layer on the package substrate is within the orthographic projection of the interposer on the package substrate and is offset from the orthographic projection of the optical module on the package substrate.

9. The package structure according to any one of claims 1-8, wherein the optical module comprises:

A substrate; and

And an optical device disposed on the substrate.

10. The package structure according to any one of claims 1-8, wherein the electronic chip module comprises a processor for processing an electrical signal, and the electrical signal comprises an electrical signal converted from an optical signal of the optical module.