CN220711511U - Control circuit of video processor and video processor - Google Patents

Control circuit of video processor and video processor Download PDF

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Publication number
CN220711511U
CN220711511U CN202322423961.0U CN202322423961U CN220711511U CN 220711511 U CN220711511 U CN 220711511U CN 202322423961 U CN202322423961 U CN 202322423961U CN 220711511 U CN220711511 U CN 220711511U
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video processor
interface
usb
interface conversion
control circuit
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CN202322423961.0U
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欧阳其平
曾俊辉
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Shenzhen Huidu Technology Co ltd
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Shenzhen Huidu Technology Co ltd
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Abstract

The utility model discloses a control circuit of a video processor and the video processor. The control circuit of the video processor includes: one end of the USB component is used for being connected with an upper computer, and the other end of the USB component is used for being connected with a video processor body of the video processor; the first interface conversion assembly, one end of first interface conversion assembly is used for connecting external well accuse equipment, the other end of first interface conversion assembly is used for with video processor body electricity is connected, first interface conversion assembly is used for converting RS232 protocol data into UART protocol data. The utility model can improve the communication rate between the video processor and the upper computer.

Description

Control circuit of video processor and video processor
Technical Field
The present utility model relates to the field of video processors, and in particular, to a control circuit of a video processor and a video processor.
Background
Video processors, such as LED (Light Emitting Diode ) video processors, are an important component of LED display screen control systems that can control the LED display screen control systems to properly display images to be displayed.
In the related art, the time for upgrading the LED video processor by the upper computer is long, the operation response of partial functions such as point-by-point correction is slow, namely the communication rate between the upper computer and the LED video processor is slow, and the further application of the video processor is limited.
Disclosure of Invention
The utility model provides a control circuit of a video processor and the video processor, so as to improve the communication rate between the video processor and an upper computer.
According to an aspect of the present utility model, there is provided a control circuit of a video processor, the control circuit of the video processor including:
one end of the USB component is used for being connected with an upper computer, and the other end of the USB component is used for being connected with a video processor body of the video processor;
the first interface conversion assembly, one end of first interface conversion assembly is used for connecting external well accuse equipment, the other end of first interface conversion assembly is used for with video processor body electricity is connected, first interface conversion assembly is used for converting RS232 protocol data into UART protocol data.
Optionally, the USB component includes:
the USB interface is used for connecting the upper computer;
the first end of the first resistor is electrically connected with the D+ end of the USB interface, and the second end of the first resistor is used for being connected with the video processor body; the first end of the second resistor is electrically connected with the D-end of the USB interface, and the second end of the second resistor is used for being connected with the video processor body.
Optionally, the USB component further includes:
the anode of the first ESD electrostatic protection device is grounded, and the cathode of the first ESD electrostatic protection device is electrically connected with the D+ end of the USB interface;
the anode of the second ESD electrostatic protection device is grounded, and the cathode of the second ESD electrostatic protection device is electrically connected with the D-end of the USB interface;
the anode of the third ESD electrostatic protection device is grounded, and the cathode of the third ESD electrostatic protection device is electrically connected with the V end of the USB interface;
the first end of the first filter capacitor is electrically connected with the V end of the USB interface, and the second end of the first filter capacitor is grounded.
Optionally, the first interface conversion component includes:
the RS232 interface is used for being electrically connected with the external central control equipment;
the first interface conversion chip, the first communication terminal group of first interface conversion chip with RS232 interface electricity is connected, the second communication terminal group of first interface conversion chip is used for with the video processor electricity is connected, first interface conversion chip is used for converting the RS232 protocol data of its first communication terminal group input into UART protocol data.
Optionally, the model of the first interface conversion chip is SP3232EEY.
Optionally, the control circuit of the video processor further includes: the first communication terminal group of the second interface conversion chip is electrically connected with the USB interface, the second communication terminal group of the second interface conversion chip is electrically connected with the video controller body, and the second interface conversion chip is used for converting USB protocol data input by the first communication terminal group of the second interface conversion chip into UART protocol data.
Optionally, the model of the second interface conversion chip is CP2102.
Optionally, the control circuit of the video processor further includes:
the first resistor and the second resistor are electrically connected with the USB interface through the switch component;
the enabling end of the second interface conversion chip is connected with an enabling signal through the switch component;
the switch component is used for controlling the connection states of the first resistor, the second resistor and the USB interface, and the signal receiving state of the enabling end of the second interface conversion chip.
Optionally, the switch assembly includes:
the second end of the first resistor is electrically connected with the D+ end of the USB interface through the first switch;
the second end of the second resistor is electrically connected with the D-end of the USB interface through the second switch;
and the enabling end of the second interface conversion chip is connected with an enabling signal through the third switch.
According to another aspect of the present utility model, there is provided a video processor comprising the control circuit of the video processor as described above.
According to the technical scheme provided by the embodiment of the utility model, the control circuit of the adopted video processor comprises a USB component, one end of the USB component is used for being connected with an upper computer, and the other end of the USB component is used for being connected with a video processor body of the video processor; and one end of the first interface conversion component is used for being connected with external central control equipment, the other end of the first interface conversion component is used for being electrically connected with the video processor body, and the first interface conversion component is used for converting RS232 protocol data into UART protocol data. The upper computer is electrically connected with the video processor 31 through the USB component, and the USB communication protocol of the USB component has high-speed advantages, so that the upgrading speed of the video processor and the response speed of point-by-point correction can be greatly improved.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the utility model or to delineate the scope of the utility model. Other features of the present utility model will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present utility model, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic circuit diagram of a control circuit of a video processor according to an embodiment of the present utility model;
fig. 2 is an application schematic diagram of a control circuit of a video processor according to an embodiment of the present utility model;
fig. 3 is a schematic circuit diagram of a control circuit of a video processor according to another embodiment of the present utility model;
fig. 4 is a schematic circuit diagram of a control circuit of a video processor according to another embodiment of the present utility model.
Detailed Description
In order that those skilled in the art will better understand the present utility model, a technical solution in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present utility model, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present utility model without making any inventive effort, shall fall within the scope of the present utility model.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present utility model and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the utility model described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Fig. 1 is a schematic circuit diagram of a control circuit of a video processor according to an embodiment of the present utility model, and fig. 2 is an application schematic diagram of a control circuit of a video processor according to an embodiment of the present utility model, referring to fig. 1 and fig. 2. The control circuit of the video processor comprises a USB (Universal Serial Bus ) component 11, one end of the USB component 11 is used for being connected with the upper computer 21, and the other end of the USB component 11 is used for being connected with the video processor body of the video processor 31; the first interface conversion component 12, one end of the first interface conversion component 12 is used for connecting with the external central control device 22, the other end of the first interface conversion component 12 is used for being electrically connected with the video processor body, and the first interface conversion component 12 is used for converting the RS232 protocol data into UART protocol data.
Specifically, the control circuit of the video processor is mainly used for connecting communication between the video processor 31 and an external control device so as to realize control of the video processor 31; the video processor body is, for example, a motherboard of the video processor. The external control device may be an upper computer 21 or an external central control device 22. The USB component 11 is a data transmission link supporting USB protocol data, when the external control device is the host computer 21, and when the video processor 21 supports USB communication, one end of the USB component 11 is connected to the USB, and the other end is connected to the video processor body of the video processor 31, so that the communication between the host computer 21 and the video processor 31 is realized through the USB component 11. Since the USB communication has a high speed, the speed of upgrading the video processor 31 and the response speed of the point-by-point correction can be increased.
In addition, the first interface conversion component 12 may convert RS232 protocol data into UART protocol data to implement communication between the external central control device 22 and the video processor 31. For example, when the video processor 31 needs to be connected to other systems, the external central control device 22 may be connected to one end of the first interface conversion component 12, so as to implement control of the video processor 31 by the external central control device 22.
According to the technical scheme of the embodiment, the control circuit of the adopted video processor comprises a USB component, one end of the USB component is used for being connected with an upper computer, and the other end of the USB component is used for being connected with a video processor body of the video processor; and one end of the first interface conversion component is used for being connected with external central control equipment, the other end of the first interface conversion component is used for being connected with the video processor electric body, and the first interface conversion component is used for converting RS232 protocol data into UART protocol data. The upper computer is electrically connected with the video processor 31 through the USB component, and the USB communication protocol of the USB component has high-speed advantages, so that the upgrading speed of the video processor and the response speed of point-by-point correction can be greatly improved.
Optionally, fig. 3 is a schematic circuit structure diagram of a control circuit of a video processor according to another embodiment of the present utility model, and refer to fig. 3. The USB assembly 11 includes: the USB interface 111 is used for connecting an upper computer; the first end of the first resistor R1 is electrically connected with the D+ end of the USB interface 111, and the second end of the first resistor R1 is used for being connected with the video processor; the first end of the second resistor R2 is electrically connected to the D-end of the USB interface 111, and the second end of the second resistor R2 is connected to the video processor body.
Specifically, the USB interface 111 is configured to electrically connect the USB component 11 to an upper computer, and one end of a USB data line may be connected to the upper computer, and the other end may be connected to the USB interface 111. When the video processor and the control circuit of the video processor are integrated, if the video processor supports USB communication, the first resistor R1 and the second resistor R2 may be connected to the video processor body, for example, the electrical connection between the first resistor R1, the second resistor R2 and the video processor body may be realized by soldering to the same PCB board. At this time, the upper computer can realize USB communication with the video processor through the USB component 11. It will be appreciated that in fig. 3, the first terminal of the first resistor R1 is defined as usb_d-, and the second terminal of the first resistor R1 is defined as otg_fs_dp; the first terminal of the second resistor R2 is defined as usb_d+, and the second terminal of the second resistor R2 is defined as otg_fs_dm.
Optionally, with continued reference to fig. 3, the usb assembly 11 further includes: the anode of the first ESD protection device D1 is grounded, and the cathode of the first ESD protection device D1 is electrically connected to the d+ end of the USB interface 111. The first ESD protection device D1 is for preventing static electricity from damaging the subsequent circuit.
The USB assembly 11 further includes: the second ESD electrostatic protection device D2, the anode of the second ESD electrostatic protection device D2 is grounded, and the cathode of the second ESD electrostatic protection device D1 is electrically connected with the D-terminal of the USB interface 111. The second ESD protection device D1 is for preventing static electricity from damaging the subsequent circuit.
The USB assembly 11 further includes: the third ESD protection device D3, the anode of the third ESD protection device D3 is grounded, and the cathode of the third ESD protection device D3 is electrically connected to the V terminal of the USB interface 111. The third ESD protection device D3 is for preventing static electricity from damaging the subsequent circuit.
The USB assembly 11 further includes: the first end of the first filter capacitor C1 is electrically connected to the V end of the USB interface 111, and the second end of the first filter capacitor C1 is grounded. The V-port of the USB interface 111 is connected to the first power signal Vbus, and the first filter capacitor C1 may filter the first power signal Vbus to prevent the unstable working state of the later stage circuit caused by the unstable first power signal Vbus. The G-terminal in the USB interface 111 is grounded.
Optionally, with continued reference to fig. 3, the first interface conversion component 12 includes: the RS232 interface 121, the RS232 interface 121 is used for being electrically connected with external central control equipment; the first interface conversion chip 122, the first communication terminal group of the first interface conversion chip 122 is used for being electrically connected with the RS232 interface 121, the second communication terminal group of the first interface conversion chip 122 is used for being electrically connected with the video processor, and the first interface conversion chip 122 is used for converting the RS232 protocol data input by the first communication terminal group into UART protocol data.
Specifically, the model of the first interface conversion chip 122 may be SP3232EEY. The first communication terminal group is an RS232 TXA terminal group and an RS232 RXA terminal group, and is connected to the corresponding terminal on the RS232 interface 121. The second communication terminal set of the first interface conversion chip 122 is uart_tx1 and uart_rx1 terminal sets, and is connected to the corresponding video processor body. Optionally, as shown in fig. 3, the second communication terminal set may be further electrically connected to the video processor body through a resistor. The first interface conversion component 12 may further include ESD protection devices, voltage stabilizing capacitors, and filter capacitors, which are connected in the structure shown in fig. 3.
Optionally, with continued reference to fig. 3, the control circuit of the video processor further includes: the second interface conversion chip 13, the first communication terminal group of the second interface conversion chip 13 is electrically connected with the USB interface 111, the second communication terminal group of the second interface conversion chip 13 is used for being electrically connected with the video processor body, and the second interface conversion chip 13 is used for converting the USB protocol data input by the first communication terminal group thereof into UART protocol data.
In particular, for some video processors, it may not support the USB protocol, but rather the UART protocol. Through setting up second interface conversion chip 13, second interface conversion chip 13 can be CP2102, and the USB protocol data of host computer output can be converted into UART protocol data after passing through second interface conversion chip 13, and then transmits in the video processor, is discerned by the video processor, realizes the control to the video processor. If the video processor supports USB communication, the first resistor R1 and the second resistor R2 may be connected to the video processor body, for example, the first resistor R1, the second resistor R2 and the video processor may be electrically connected by soldering to the same PCB board, and the second interface conversion chip 13 may be attached. If the video processor does not support USB communication, the first resistor R1 and the second resistor R2 may be attached, and the second interface conversion chip 13 may be connected to a corresponding circuit on the PCB.
The second communication terminal group of the second interface conversion chip 13 is RXD1 and TXD1 terminal group. The control circuit of the video processor may further include a peripheral circuit of the second interface conversion chip 13 constituted by injection resistance, capacitance, and the like.
Alternatively, in the above embodiment, the first power supply Vbus may be obtained by inductive filtering through a +5v_standby power supply.
Optionally, fig. 4 is a schematic circuit diagram of a control circuit of a video processor according to an embodiment of the present utility model, and referring to fig. 4, the control circuit of the video processor further includes: the first resistor R1 and the second resistor R2 are electrically connected with the USB interface 111 through the switch component; and the enabling end of the second interface conversion chip 13 is connected with an enabling signal through a switch component; the switch assembly is used for controlling the connection states of the first resistor R1 and the second resistor R2 and the USB interface 111, and the signal receiving state of the enabling end of the second interface conversion chip 13.
Specifically, in some embodiments, the video processor supports both USB communication and UART communication, and the USB component 11 and the second interface conversion chip 13 may be electrically connected to the video processor. The USB component or the second interface conversion chip 13 is selected to operate by the switch component. For example, the switch assembly controls the enabling port of the first interface conversion chip 13 to be connected with the enabling signal, and controls the first resistor R1 and the second resistor R2 to be disconnected from the USB interface 111, so that the USB data output by the host computer can only be transmitted to the video processor through the second interface conversion chip 13. When the switch assembly controls the enabling end of the first interface conversion chip 13 not to be connected with the enabling signal, and controls the first resistor R1 and the second resistor R2 to be conducted with the USB interface 111, USB data output by the upper computer is output to the video processor through the first resistor R1 and the second resistor R2, and the second interface conversion chip 13 does not work at this time, so that USB protocol data transmission between the video processor and the upper computer is realized.
As shown in fig. 4, the switch assembly includes a first switch 141, a second switch 142, and a third switch 143. The first end of the first resistor R1 is electrically connected with the D+ end of the USB interface through the first switch 141; the first end of the second resistor R2 is electrically connected with the D-end of the USB interface through the second switch 142; the enable terminal of the second interface conversion chip 13 is connected to the enable signal through the third switch 143. The first to third switches 141 to 143 may be MOS transistors, and their control ends may be connected to an upper computer, and the upper computer controls the on state. The enable terminal of the second interface conversion chip 13 may be an enable terminal thereof, and the enable signal may be the first power signal Vbus.
The utility model also provides a video processor, which comprises the control circuit of the video processor provided by any embodiment of the utility model. The control circuit of the video processor provided by any embodiment of the present utility model has the same advantages, and is not described herein.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present utility model may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present utility model are achieved, and the present utility model is not limited herein.
The above embodiments do not limit the scope of the present utility model. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present utility model should be included in the scope of the present utility model.

Claims (10)

1. A control circuit for a video processor, the control circuit comprising:
one end of the USB component is used for being connected with an upper computer, and the other end of the USB component is used for being connected with a video processor body of the video processor;
the first interface conversion assembly, one end of first interface conversion assembly is used for connecting external well accuse equipment, the other end of first interface conversion assembly is used for with video processor body electricity is connected, first interface conversion assembly is used for converting RS232 protocol data into UART protocol data.
2. The control circuit of the video processor of claim 1, wherein the USB component comprises:
the USB interface is used for connecting the upper computer;
the first end of the first resistor is electrically connected with the D+ end of the USB interface, and the second end of the first resistor is used for being connected with the video processor body; the first end of the second resistor is electrically connected with the D-end of the USB interface, and the second end of the second resistor is used for being connected with the video processor body.
3. The control circuit of the video processor of claim 2, wherein the USB component further comprises:
the anode of the first ESD electrostatic protection device is grounded, and the cathode of the first ESD electrostatic protection device is electrically connected with the D+ end of the USB interface;
the anode of the second ESD electrostatic protection device is grounded, and the cathode of the second ESD electrostatic protection device is electrically connected with the D-end of the USB interface;
the anode of the third ESD electrostatic protection device is grounded, and the cathode of the third ESD electrostatic protection device is electrically connected with the V end of the USB interface;
the first end of the first filter capacitor is electrically connected with the V end of the USB interface, and the second end of the first filter capacitor is grounded.
4. The control circuit of the video processor of claim 1, wherein the first interface conversion component comprises:
the RS232 interface is used for being electrically connected with the external central control equipment;
the first interface conversion chip, the first communication terminal group of first interface conversion chip with RS232 interface electricity is connected, the second communication terminal group of first interface conversion chip is used for with the video processor electricity is connected, first interface conversion chip is used for converting the RS232 protocol data of its first communication terminal group input into UART protocol data.
5. The control circuit of the video processor of claim 4, wherein the first interface conversion chip is of model SP3232EEY.
6. The control circuit of the video processor of claim 2, wherein the control circuit of the video processor further comprises: the first communication terminal group of the second interface conversion chip is electrically connected with the USB interface, the second communication terminal group of the second interface conversion chip is electrically connected with the video processor body, and the second interface conversion chip is used for converting USB protocol data input by the first communication terminal group of the second interface conversion chip into UART protocol data.
7. The control circuit of the video processor of claim 6, wherein the second interface conversion chip is of a CP2102 type.
8. The control circuit of the video processor of claim 6, wherein the control circuit of the video processor further comprises:
the first resistor and the second resistor are electrically connected with the USB interface through the switch component;
the enabling end of the second interface conversion chip is connected with an enabling signal through the switch component;
the switch component is used for controlling the connection states of the first resistor, the second resistor and the USB interface, and the signal receiving state of the enabling end of the second interface conversion chip.
9. The control circuit of a video processor of claim 8, wherein the switch assembly comprises:
the second end of the first resistor is electrically connected with the D+ end of the USB interface through the first switch;
the second end of the second resistor is electrically connected with the D-end of the USB interface through the second switch;
and the enabling end of the second interface conversion chip is connected with an enabling signal through the third switch.
10. A video processor comprising the control circuit of the video processor of any one of claims 1-9.
CN202322423961.0U 2023-09-06 2023-09-06 Control circuit of video processor and video processor Active CN220711511U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202322423961.0U CN220711511U (en) 2023-09-06 2023-09-06 Control circuit of video processor and video processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202322423961.0U CN220711511U (en) 2023-09-06 2023-09-06 Control circuit of video processor and video processor

Publications (1)

Publication Number Publication Date
CN220711511U true CN220711511U (en) 2024-04-02

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CN202322423961.0U Active CN220711511U (en) 2023-09-06 2023-09-06 Control circuit of video processor and video processor

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