CN102810884A - Charging circuit - Google Patents

Charging circuit Download PDF

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Publication number
CN102810884A
CN102810884A CN2011101490790A CN201110149079A CN102810884A CN 102810884 A CN102810884 A CN 102810884A CN 2011101490790 A CN2011101490790 A CN 2011101490790A CN 201110149079 A CN201110149079 A CN 201110149079A CN 102810884 A CN102810884 A CN 102810884A
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CN
China
Prior art keywords
charging
fet
control
chip
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN2011101490790A
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Chinese (zh)
Other versions
CN102810884B (en
Inventor
陈俊生
邹华
何凤龙
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Scienbizip Consulting Shenzhen Co Ltd
Original Assignee
Hongfujin Precision Industry Shenzhen Co Ltd
Hon Hai Precision Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hongfujin Precision Industry Shenzhen Co Ltd, Hon Hai Precision Industry Co Ltd filed Critical Hongfujin Precision Industry Shenzhen Co Ltd
Priority to CN201110149079.0A priority Critical patent/CN102810884B/en
Priority to TW100120675A priority patent/TW201251286A/en
Priority to US13/216,264 priority patent/US8970175B2/en
Publication of CN102810884A publication Critical patent/CN102810884A/en
Application granted granted Critical
Publication of CN102810884B publication Critical patent/CN102810884B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/266—Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

The invention provides a charging circuit which is applied to electronic equipment and comprises a charging control chip, a South Bridge chip, a charging control circuit and a basic input and output system. The charging control chip comprises two control terminals, the South Bridge chip is used for triggering electric signals to the charging control circuit, the basic input and output system is used for triggering control signals to the charging control circuit when the electronic equipment is at the sleep stage, and the charging control circuit is used for charging control of the second control terminal of the charging control chip according to control signal setting. When the electronic equipment enters the sleep stage, if the control signals triggered by the basic input and output system are in the high level state, the two control terminals are set to be in the high level state; and if the control signals triggered by the basic input and output system are in the low level state, the two control terminals are set to be in the low level state, and the charging control chip is in a charging mode. The charging circuit is capable of achieving switching of the charging mode and a data transmission mode and is convenient for users to use.

Description

Charging circuit
Technical field
The present invention relates to a kind of charging circuit, relate in particular to a kind of USB (Universal Serial Bus, USB) charging circuit of charging of interface of utilizing.
Background technology
(Personal Computer, USB port PC) adopt the USB port dormant technology using PC.See also Fig. 1, one is used for PC uses the USB charge control system 1 of this USB port dormant technology to comprise charging chip 2, USB transceiver 3, south bridge 4 and USB connector 5.Two control terminal S0 of charging chip 2, S1 are in order to control two data terminal D+, D-.As control terminal S0, when S1 is output as 00, USB charge control system 1 is in charge mode, and portable electron device electrically connects, thereby charges through charging chip 2 with data terminal D+, D-through USB connector 5.As control terminal S0, when S1 is output as 11; Data terminal D+, D-respectively with transmission terminal Y+, Y-short circuit; And then USB connector 5 is electrically connected through USB transceiver 3 and south bridge 4; So that USB charge control system 1 is in the usb data transmission mode, be convenient to and portable electron device transmission data.
Yet mostly there is defective in present USB port charging circuit in design, and for example, when PC did not start shooting, portable electron device can't charge through this PC; And for example, when PC was in resting state, charge mode and usb data transmission mode can not be changed (being that the user can only charge or transmits data according to the function of preferred circuit) mutually, bring inconvenience to the user.
Summary of the invention
In view of above situation, be necessary to provide a kind of charging circuit that can when the PC system is in resting state, carry out charge mode and the switching of usb data transmission mode.
A kind of charging circuit; It comprises charge controlling chip, South Bridge chip, charging control circuit and basic input output system, and this charge controlling chip comprises two control terminals, and South Bridge chip and charge controlling chip electrically connect; In order to trigger the signal of telecommunication to charging control circuit; This basic input output system triggers control signal to charging control circuit when getting into the dormant stage at electronic equipment, and charging control circuit receives the signal of telecommunication that South Bridge chip sends, and two control terminals of the control signal set charge controlling chip that triggers according to basic input output system; When electronic equipment gets into the dormant stage; If the control signal that basic input output system triggers is a high level, then two control terminals are changed to high level, and charge controlling chip is in data-transmission mode; If the control signal that basic input output system triggers is a low level, then two control terminals are changed to low level, and charge controlling chip is in charge mode.
Charging circuit of the present invention is installed in PC etc. can be in other portable electron device electronic equipment powered; Control the control terminal of charge controlling chip jointly through charging control circuit and basic input output system, and then the control charge controlling chip is in charge mode or data-transmission mode.When this powered electronic device got into the dormant stage, the setting through the adjustment basic input output system can realize the switching between charge mode and the data-transmission mode, is user-friendly to.
Description of drawings
Fig. 1 is the USB charge control system schematic diagram of existing use USB port dormant technology;
Fig. 2 is the functional block diagram of the charging circuit of preferred embodiments of the present invention;
Fig. 3 is the partial circuit figure of charging circuit shown in Figure 2.
The main element symbol description
Charging circuit 100
Charge controlling chip 10
Data terminal D+、D-
Transmission terminal Y+、Y-
Control terminal S0、S1
South Bridge chip 20
Basic input output system 30
Charging control circuit 40
First FET Q1
Grid G1、G2
Source electrode S11、S22
Drain electrode D1、D2
Second FET Q2
First resistance R1
Second resistance R2
The 3rd resistance R3
The USB charge control system 1
Charging chip 2
The USB transceiver 3
South bridge 4
USB connector 5
Portable electron device 200
Following embodiment will combine above-mentioned accompanying drawing to further specify the present invention.
Embodiment
See also Fig. 2, preferred embodiments of the present invention provides a kind of charging circuit 100, and it is applied in the electronic equipments such as computer.This charging circuit 100 adopts the USB port dormant technology, and being used for through the usb data line is that portable electron device 200 (like mobile phone) charges or/and transmit data.
This charging circuit 100 comprises charge controlling chip 10, South Bridge chip 20, basic input output system (Basic Input Output System, BIOS) 30 and charging control circuit 40.
Please combine to consult Fig. 3, this charge controlling chip 10 comprises data terminal D+, D-, transmission terminal Y+, Y-, control terminal S0, S1.Data terminal D+, D-electrically connect with portable electron device 200 through joint, USB connector (figure does not show), and transmission terminal Y+, Y-and South Bridge chip 20 electrically connect.Control terminal S0, S1 electrically connect each other, and as control terminal S0, when S1 is changed to 00, charge controlling chip 10 is in charge mode, and portable electron device 200 is through charge controlling chip 10 chargings; As control terminal S0, when S1 is changed to 11; Data terminal D+, D-respectively with transmission terminal Y+, Y-short circuit; And then portable electron device 200 is electrically connected through charge controlling chip 10 and South Bridge chip 20, at this moment, charge controlling chip 10 is in the usb data transmission mode; Portable electron device 200 is through this charge controlling chip 10 and electronic equipment mutual data transmission; At this moment, if electronic equipment is not in the dormant stage (S3 stage), portable electron device 200 also can continue charging through this charge controlling chip 10.
South Bridge chip 20 electrically connects with charging control circuit 40, in order to trigger the signal of telecommunication of varying level to charging control circuit 40 in different phase.Particularly, when electronic equipment powers on (S0 stage), South Bridge chip 20 is in order to trigger low level S_SLP_S4# signal to charging control circuit 40; After electronic equipment start entering system (S1 stage), the S_SLP_S4# signal becomes high level; When electronic equipment gets into resting state (S3 stage), the S_SLP_S4# signal is kept high level; When electronic equipment gets into deep sleep state (S4 stage) or system is in off-mode when (S5 stage), become low high level at the S_SLP_S4# signal.
BIOS30 is through universal input and output port (General Purpose Input Output; GPIO) electrically connect with charging control circuit 40; In order to presetting the GPIO control signal, and when electronic equipment gets into resting state (S3 stage) trigger the GPIO control signal that presets to charging control circuit 40.This GPIO control signal can be predisposed to high level or low level through BIOS30.
Charging control circuit 40 is exported the signal of telecommunication in order under the control of South Bridge chip 20 and BIOS30 to control terminal S0, S1, and then 10 work of control charge controlling chip.This charging control circuit 40 comprises the first FET Q1, the second FET Q2, first resistance R 1, second resistance R 2 and the 3rd resistance R 3.This first FET Q1 comprises grid G 1, source S 11 and drain D 1.Grid G 1 electrically connects with South Bridge chip 20, to receive the S_SLP_S4# signal that South Bridge chip 20 triggers.Source S 11 ground connection, drain D 1 electrically connects through the power supply of first resistance R 1 with 5V.This second FET Q2 comprises grid G 2, source S 22 and drain D 2.The grid G 2 of the second FET Q2 and the drain D of the first FET Q1 1 electrically connect source S 22 ground connection.Drain D 2 electrically connects with BIOS30 through the GPIO port, and to receive the GPIO control signal, this drain D 2 electrically connects through the power supply of second resistance R 2 with 3V simultaneously, and simultaneously with control terminal S0, the S1 electric connection of charge controlling chip 10.The 3rd resistance R 3 one end ground connection, the other end are electrically connected between drain D 2 and control terminal S0, the S1 of the second FET Q2.
Five working stages (S0, S1, S3-S5) with electronic equipment are the operation principle that example is explained this charging circuit 100 below:
Electronic equipment powers on the stage (S0): South Bridge chip 20 obtains operating voltage; Grid G 1 to the first FET Q1 triggers low level S_SLP_S4# signal; At this moment; The first FET Q1 is in cut-off state, and the grid G 2 of the second FET Q2 is in high level, i.e. the second FET Q2 conducting.Drain D 2 voltages of the second FET Q2 like this are dragged down; The control terminal S0 of charge controlling chip 10, S1 are changed to 00; Charge controlling chip 10 is in charge mode, and portable electron device 200 can charge through USB connector, joint and this charge controlling chip 10.Obviously in this stage, even electronic installation is not started shooting (only incoming transport power supply), portable electron device 200 still can charge through this charging circuit 100.
Electronic equipment start entering system's stage (S1): South Bridge chip 20 triggers the S_SLP_S4# signal of high level to the grid G 1 of the first FET Q1; At this moment; The first FET Q1 is in conducting state, and the grid G 2 of the second FET Q2 is in low level, and promptly the second FET Q2 ends.Drain D 2 voltages of the second FET Q2 like this will can not dragged down; The control terminal S0 of charge controlling chip 10, S1 are changed to 11; Charge controlling chip 10 is in the usb data transmission mode; Portable electron device 200 can pass through this charge controlling chip 10, South Bridge chip 20 and electronic equipment mutual data transmission, and simultaneously because the mainboard of electronic equipment (figure does not show) is in running order, this portable electron device 200 still can continue charging through this charge controlling chip 10.
Electronic equipment gets into the dormant stage (S3): the S_SLP_S4# signal is kept high level; The second FET Q2 still is in cut-off state; This moment, then control terminal S0, the S1 of charge controlling chip 10 were changed to 00 if it is low level that BIOS30 presets GPIO, and charge controlling chip 10 is in charge mode; If it is high level that BIOS30 presets GPIO, charge controlling chip 10 is in the usb data transmission mode, and portable electron device 200 can pass through this charge controlling chip 10, South Bridge chip 20 and electronic equipment mutual data transmission.At this moment, because electronic equipment gets into the dormant stage, mainboard is not in running order, so portable electron device 200 can not charge.Yet, because the user can preset the level of GPIO in advance in BIOS30, so can realize the switching between charge mode and the usb data transmission mode.
Electronic equipment gets into the deep-sleep stage (S4): the S_SLP_S4# signal becomes low level, and drain D 2 voltages of the second FET Q2 are dragged down, and the control terminal S0 of charge controlling chip 10, S1 are changed to 00, and charge controlling chip 10 is in charge mode.
Electronic apparatus system is in shut-down-phase (S5): the S_SLP_S4# signal is kept low level, and drain D 2 voltages of the second FET Q2 are dragged down, and the control terminal S0 of charge controlling chip 10, S1 are changed to 00, and charge controlling chip 10 is in charge mode.
The GPIO control signal that charging circuit 100 of the present invention triggers through charging control circuit 40 and BIOS30 is controlled control terminal S0, the S1 of charge controlling chip 10 jointly, and then control charge controlling chip 10 is in charge mode or usb data transmission mode.Power on the stage at electronic equipment, even electronic installation is not started shooting, portable electron device 200 still can charge; And getting into the dormant stage at electronic equipment, the user can be through presetting the level of GPIO in BIOS30, and then realize being user-friendly to the switching between charge mode and the usb data transmission mode.

Claims (10)

1. charging circuit; It is applied in the electronic equipment, and this charging circuit comprises charge controlling chip and South Bridge chip, and this charge controlling chip comprises two control terminals; South Bridge chip and charge controlling chip electrically connect; It is characterized in that: this charging circuit also comprises charging control circuit and basic input output system, and this South Bridge chip is in order to trigger the signal of telecommunication to charging control circuit, and this basic input output system is in order to trigger control signal to charging control circuit when electronic equipment gets into the dormant stage; Charging control circuit receives the signal of telecommunication that South Bridge chip sends; And two control terminals of the control signal set charge controlling chip that triggers according to basic input output system, when electronic equipment gets into the dormant stage, if the control signal that basic input output system triggers is a high level; Then two control terminals are changed to high level, and charge controlling chip is in data-transmission mode; If the control signal that basic input output system triggers is a low level, then two control terminals are changed to low level, and charge controlling chip is in charge mode.
2. charging circuit as claimed in claim 1; It is characterized in that: said charging control circuit comprises first FET and second FET; The grid of said first FET and South Bridge chip electrically connect, source ground, and drain electrode electrically connects with the grid of second FET; The source ground of second FET, the drain electrode while of the second field effect light electrically connects with two control terminals of basic input output system and charge controlling chip.
3. charging circuit as claimed in claim 2 is characterized in that: said charging control circuit comprises first resistance, and a termination power of said first resistance, the other end electrically connect with the drain electrode of first FET and the grid of second FET simultaneously.
4. charging circuit as claimed in claim 3 is characterized in that: said charging control circuit comprises second resistance, a termination power of said second resistance, and the drain electrode of the other end and second FET electrically connects.
5. charging circuit as claimed in claim 2; It is characterized in that: when said electronic equipment powers on when not starting shooting; Said South Bridge chip triggers low level signal in order to the grid to first FET, so that first FET ends the second FET conducting; The control terminal of charge controlling chip is changed to low level, and then makes charge controlling chip be in charge mode.
6. charging circuit as claimed in claim 2 is characterized in that: when said electronic equipment got into the dormant stage, said South Bridge chip triggered high level signal in order to the grid to first FET, so that the first FET conducting, second FET ends.
7. charging circuit as claimed in claim 2 is characterized in that: said basic input output system electrically connects through the drain electrode of the universal input and output port and second FET.
8. charging circuit as claimed in claim 1 is characterized in that: said data-transmission mode is the usb data transmission mode.
9. charging circuit as claimed in claim 1 is characterized in that: said charge controlling chip comprises two data terminals and two transmission terminals, and data terminal electrically connects in order to the portable electron device with the outside, and transmission terminal and South Bridge chip electrically connect.
10. charging circuit as claimed in claim 9 is characterized in that: when two control terminals were changed to low level, electronic equipment was outside portable electron device charging through data terminal; When two control terminals were changed to high level, said data terminal and transmission terminal short circuit were so that electronic equipment is through South Bridge chip and outside portable electron device mutual data transmission.
CN201110149079.0A 2011-06-03 2011-06-03 Charging circuit Expired - Fee Related CN102810884B (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201110149079.0A CN102810884B (en) 2011-06-03 2011-06-03 Charging circuit
TW100120675A TW201251286A (en) 2011-06-03 2011-06-14 Charge circuit
US13/216,264 US8970175B2 (en) 2011-06-03 2011-08-24 Charging circuit employing a southbridge microchip to control charging when the electronic apparatus is shut down

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201110149079.0A CN102810884B (en) 2011-06-03 2011-06-03 Charging circuit

Publications (2)

Publication Number Publication Date
CN102810884A true CN102810884A (en) 2012-12-05
CN102810884B CN102810884B (en) 2015-11-25

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CN201110149079.0A Expired - Fee Related CN102810884B (en) 2011-06-03 2011-06-03 Charging circuit

Country Status (3)

Country Link
US (1) US8970175B2 (en)
CN (1) CN102810884B (en)
TW (1) TW201251286A (en)

Cited By (6)

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CN103928952A (en) * 2013-01-16 2014-07-16 英华达（上海）科技有限公司 Charging system and charging method thereof
CN105808488A (en) * 2014-12-31 2016-07-27 新加坡商华科全球股份有限公司 Electronic device and power supply control method
CN106160073A (en) * 2016-06-30 2016-11-23 联想(北京)有限公司 A kind of electronic equipment and control method thereof
CN106921194A (en) * 2017-03-17 2017-07-04 中国农业大学 Collector wireless charging method, collector, control terminal and system
CN109086234A (en) * 2018-07-26 2018-12-25 上海闻泰电子科技有限公司 Device identification method, device, identification equipment and storage medium
CN112955826A (en) * 2020-04-26 2021-06-11 深圳市大疆创新科技有限公司 Gating circuit, communication control method and device

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CN104778050A (en) * 2014-01-13 2015-07-15 昆达电脑科技(昆山)有限公司 Debugging method of basic input-output system

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103928952A (en) * 2013-01-16 2014-07-16 英华达（上海）科技有限公司 Charging system and charging method thereof
CN105808488A (en) * 2014-12-31 2016-07-27 新加坡商华科全球股份有限公司 Electronic device and power supply control method
CN105808488B (en) * 2014-12-31 2019-07-02 新加坡商华科全球股份有限公司 Electronic device and its power source supplying controlling method
CN106160073A (en) * 2016-06-30 2016-11-23 联想(北京)有限公司 A kind of electronic equipment and control method thereof
CN106160073B (en) * 2016-06-30 2019-06-25 联想(北京)有限公司 A kind of electronic equipment and its control method
CN106921194A (en) * 2017-03-17 2017-07-04 中国农业大学 Collector wireless charging method, collector, control terminal and system
CN109086234A (en) * 2018-07-26 2018-12-25 上海闻泰电子科技有限公司 Device identification method, device, identification equipment and storage medium
CN112955826A (en) * 2020-04-26 2021-06-11 深圳市大疆创新科技有限公司 Gating circuit, communication control method and device

Also Published As

Publication number Publication date
CN102810884B (en) 2015-11-25
US8970175B2 (en) 2015-03-03
TW201251286A (en) 2012-12-16
US20120306456A1 (en) 2012-12-06

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