CN220289767U - Double-pulse test system based on SiC power device - Google Patents
Double-pulse test system based on SiC power device Download PDFInfo
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- CN220289767U CN220289767U CN202321397158.8U CN202321397158U CN220289767U CN 220289767 U CN220289767 U CN 220289767U CN 202321397158 U CN202321397158 U CN 202321397158U CN 220289767 U CN220289767 U CN 220289767U
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- 238000012360 testing method Methods 0.000 title claims abstract description 123
- 210000000078 claw Anatomy 0.000 claims abstract description 7
- 239000003990 capacitor Substances 0.000 claims description 9
- 230000002265 prevention Effects 0.000 claims description 6
- 238000005516 engineering process Methods 0.000 abstract description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 24
- 229910010271 silicon carbide Inorganic materials 0.000 description 24
- 238000010586 diagram Methods 0.000 description 11
- 238000000034 method Methods 0.000 description 11
- 238000003466 welding Methods 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 3
- 230000001960 triggered effect Effects 0.000 description 2
- RVCKCEDKBVEEHL-UHFFFAOYSA-N 2,3,4,5,6-pentachlorobenzyl alcohol Chemical compound OCC1=C(Cl)C(Cl)=C(Cl)C(Cl)=C1Cl RVCKCEDKBVEEHL-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
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- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The utility model relates to the pulse testing technology of a power device, and discloses a double pulse testing system based on a SiC power device, which comprises a testing mother board (1) and a testing daughter board (2) connected with the testing mother board (1) in a plug-in manner; a test port (3) used for being connected with a test pin of the SiC power device is arranged on the test daughter board (2); the other end of the SiC power device test pin, which passes through the test daughter board (2), is connected with a test claw spring (4) for fixing the test pin; the test system designed by the utility model does not need to weld the test power device on the premise of ensuring the test accuracy, can be easily removed after the test is finished, can be repeatedly used for the test power device, and has small stray inductance.
Description
Technical Field
The utility model relates to a power device pulse test technology, in particular to a double pulse test system for repeatedly carrying out silicon carbide MOSFET power devices and silicon-based IGBT power devices.
Background
The power semiconductor needs to be subjected to dynamic parameter test, the dynamic parameter test needs to be tested based on a double-pulse test platform, and dynamic parameters such as the on-loss, the off-loss, the on-delay time, the off-delay time, the reverse recovery time and the like of the power semiconductor can be obtained through the double-pulse test, and the parameters can be used for device model selection evaluation and factory delivery test to ensure that the electrical parameters of the power device are in a reasonable range.
In the third generation of semiconductor device silicon carbide MOSFET, the requirements on dynamic test are more severe, extra stray inductance can be introduced into the pins of the source electrode too long, and the dynamic parameter test is greatly influenced, so that the dynamic test of the silicon carbide MOSFET is performed in a welding mode at present, the accuracy of the test is ensured, and the device cannot be reused after the test is finished.
As in prior art CN202022184981.3; the patent name is: the utility model provides a test fixture of high power device, its discloses including layer board, interval welded test PCB board and the heat conduction apron of a plurality of test seat, layer upon layer is set up from bottom to top to test PCB board and heat conduction apron, and the pin end of a plurality of devices to be tested passes the heat conduction apron and is connected with the test seat electricity on the test PCB board; a plurality of protruding blocks are arranged on the lower surface of the heat conduction cover plate at intervals, and penetrate through the through holes on the test PCB and the supporting plate respectively and are exposed from the bottom surface of the supporting plate; the upper surface of the heat conduction cover plate is provided with a plurality of first strip-shaped grooves which are parallel to each other at intervals, the lower surface of the heat conduction cover plate is provided with a plurality of second strip-shaped grooves which are parallel to each other at intervals, and a uniform heat pipe is embedded in each of the first strip-shaped grooves and the second strip-shaped grooves.
Disclosure of Invention
Aiming at the problem that in the prior art, in order to ensure the test accuracy of the power device, the device to be tested cannot be reused after the measurement is carried out in a welding mode; after the welding test is finished, if other devices need to be tested, the original devices need to be taken down from the test daughter board, and the test time is longer, so that the efficiency is seriously affected; because the service life of a bonding pad on a PCB is limited, the PCBA to be subjected to double-pulse test on the MOSFET based on a welding mode is limited in test times, and if the conventional fixture is adopted to perform repeatable double-pulse test but the introduced stray inductance is particularly large, the utility model provides a double-pulse test system based on a SiC power device.
In order to solve the technical problems, the utility model is solved by the following technical scheme:
the double-pulse testing system based on the SiC power device comprises a testing mother board and a testing daughter board, wherein the testing daughter board is connected with the testing mother board in a plugging manner; the test daughter board is provided with a test port for connecting with a test pin of the SiC power device; and the other end of the SiC power device test pin, which passes through the test daughter board, is connected with a test claw spring for fixing the test pin.
Preferably, the test port is provided with at least 4 test holes, and the test pins of the SiC power device pass through the test port.
Preferably, a driving unit for driving the SiC power device is provided on the test sub-board.
Preferably, the drive unit comprises a drive chip with a gate miller clamp.
Preferably, the driving unit further comprises a turn-off unit, an anti-crosstalk unit and a protection unit; the turn-off unit is used for performing turn-off control on the SiC power device, the crosstalk prevention unit is used for preventing the SiC power device from being crosstalked by other signals, and the protection unit is used for protecting the SiC power device.
Preferably, the turn-off unit includes a resistor RD1, a resistor RD3, and a diode DD1; one end of the resistor RD1 is connected with the out end of the driving chip, the other end DD1 is connected with the anode, and one end of the resistor RD3 is connected with the out end of the driving chip;
the protection unit comprises a resistor RD6, one end of the resistor RD6 is connected with a resistor RD3 and the cathode of a diode DD1, and the other end is grounded;
the crosstalk prevention unit is a capacitor C9, one end of the capacitor C9 is connected with the SiC power device, and the other end of the capacitor C9 is grounded.
The utility model has the remarkable technical effects due to the adoption of the technical scheme:
the test system designed by the utility model does not need to weld the test power device on the premise of ensuring the test accuracy, can be easily removed after the test is finished, and can be repeatedly used for the power device for the test.
According to the utility model, different driving chips are selected to obtain different driving capacities, the double-pulse test board selects the driving chip with the gate miller clamp, when the device is in an off state, the gate voltage is detected to be higher than Vee2+2.1V, the gate miller clamp function can be triggered not, and the gate is pulled down strongly through the internal MOSFET, so that the false opening is prevented.
The double-pulse test system designed by the utility model has small stray inductance.
Drawings
Fig. 1 is a structural diagram of the present utility model.
FIG. 2 is a diagram of a test sub-board according to the present utility model;
FIG. 3 is a block diagram of the present utility model with a test pawl spring;
FIG. 4 is a diagram of the construction of a test pawl spring according to the present utility model;
FIG. 5 is a circuit diagram of a drive unit of the present utility model;
FIG. 6-1 is a waveform diagram of the opening process of the welding double pulse test of the present utility model;
FIG. 6-2 is a waveform diagram of the shutdown process of the weld double pulse test of the present utility model;
FIG. 7-1 is a waveform diagram of an opening process of the present utility model;
fig. 7-2 is a waveform diagram of the turn-on process of the present utility model.
Wherein,
1-testing a motherboard;
2-testing the daughter board;
3-a test port;
4-testing the claw spring.
Detailed Description
The present utility model will be described in further detail with reference to the accompanying drawings and examples.
Example 1
The double-pulse testing system based on the SiC power device comprises a testing mother board and is characterized by also comprising a testing daughter board which is connected with the testing mother board in a plugging manner; the test daughter board is provided with a test port for connecting with a test pin of the SiC power device; and the other end of the SiC power device test pin, which passes through the test daughter board, is connected with a test claw spring for fixing the test pin.
The test daughter board is provided with a driving unit for driving the SiC power device. The drive unit includes a drive chip with a gate miller clamp.
Example 2
Based on embodiment 1, the test port of this embodiment is provided with 4 test holes, and SiC power devices with less than 4 pins can be tested through the test port. Meanwhile, the tested claw springs are in one-to-one correspondence with the test pins, and the other ends of the test pins are provided with the test claw springs for fixing the SiC power devices.
Example 3
On the basis of the above embodiment, the driving unit of this embodiment further includes a turn-off unit, an anti-crosstalk unit, and a protection unit; the turn-off unit is used for performing turn-off control on the SiC power device, the crosstalk prevention unit is used for preventing the SiC power device from being crosstalked by other signals, and the protection unit is used for protecting the SiC power device. The method comprises the steps of carrying out a first treatment on the surface of the
The turn-off unit comprises a resistor RD1, a resistor RD3 and a diode DD1; one end of the resistor RD1 is connected with the out end of the driving chip, the other end DD1 is connected with the anode, and one end of the resistor RD3 is connected with the out end of the driving chip;
the protection unit comprises a resistor RD6, one end of the resistor RD6 is connected with a resistor RD3 and the cathode of a diode DD1, and the other end is grounded;
the crosstalk prevention unit is a capacitor C9, one end of the capacitor C9 is connected with the SiC power device, and the other end of the capacitor C9 is grounded.
Example 4
Based on the above embodiments, the present embodiment obtains different driving capabilities by selecting different types of driving chips, for example, UCC5310MC and UCC5350MC of TI may obtain driving capabilities of 2.4A and 5A by selecting different types.
When the device is in an off state, a driving chip with a gate miller clamp is selected, a miller clamp function can be triggered when the gate voltage is detected to be higher than Vee2+2.1V, and the gate is pulled down strongly through an internal MOSFET, so that false turn-on is prevented.
6-1, 6-2 are waveform diagrams of an on process and an off process, respectively, in a conventional mode, that is, in a welding mode; FIGS. 7-1 and 7-2 are waveform diagrams showing an ON process and an OFF process which can be repeatedly subjected to pulse test; in the figure, vds is drain-source voltage of the MOSFET, id is drain current of the MOSFET, and Vgs is gate-source voltage of the MOSFET; as can be seen by comparison, the repeatable pulse test is basically consistent with the test result in the traditional mode, the stray inductances of the repeatable pulse test and the repeatable pulse test are in a small range, vds, id, vgs is measured in the figure, vds in the opening process is lowered, and Id is raised; the shut-off process Vds rises and Id falls.
Claims (6)
1. The double-pulse testing system based on the SiC power device comprises a testing mother board (1) and is characterized by also comprising a testing daughter board (2) which is connected with the testing mother board (1) in a plugging manner; a test port (3) used for being connected with a test pin of the SiC power device is arranged on the test daughter board (2); and the other end of the SiC power device test pin, which passes through the test daughter board (2), is connected with a test claw spring (4) for fixing the test pin.
2. The SiC power device based double pulse test system according to claim 1, wherein the test port (3) is provided with at least 4 test ports (3), and the SiC power device test pins pass through the test ports (3).
3. The SiC power device based double pulse test system according to claim 1, characterized in that the test sub-board (2) is provided with a driving unit for driving the SiC power device.
4. The SiC power device based double pulse test system of claim 1, wherein the drive unit includes a drive chip with a gate miller clamp.
5. The SiC power device-based double pulse test system of claim 1, wherein the driving unit further comprises a turn-off unit, an anti-crosstalk unit, and a protection unit; the turn-off unit is used for performing turn-off control on the SiC power device, the crosstalk prevention unit is used for preventing the SiC power device from being crosstalked by other signals, and the protection unit is used for protecting the SiC power device.
6. The SiC power device based double pulse test system of claim 5, wherein the turn-off unit includes a resistor RD1, a resistor RD3, and a diode DD1; one end of the resistor RD1 is connected with the out end of the driving chip, the other end DD1 is connected with the anode, and one end of the resistor RD3 is connected with the out end of the driving chip;
the protection unit comprises a resistor RD6, one end of the resistor RD6 is connected with a resistor RD3 and the cathode of a diode DD1, and the other end is grounded;
the crosstalk prevention unit is a capacitor C9, one end of the capacitor C9 is connected with the SiC power device, and the other end of the capacitor C9 is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321397158.8U CN220289767U (en) | 2023-06-02 | 2023-06-02 | Double-pulse test system based on SiC power device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202321397158.8U CN220289767U (en) | 2023-06-02 | 2023-06-02 | Double-pulse test system based on SiC power device |
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| Publication Number | Publication Date |
|---|---|
| CN220289767U true CN220289767U (en) | 2024-01-02 |
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|---|---|---|---|
| CN202321397158.8U Active CN220289767U (en) | 2023-06-02 | 2023-06-02 | Double-pulse test system based on SiC power device |
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| Country | Link |
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| CN (1) | CN220289767U (en) |
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2023
- 2023-06-02 CN CN202321397158.8U patent/CN220289767U/en active Active
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