CN218525568U

CN218525568U - Group III nitride epitaxial ceramic substrate applicable to semiconductor process and semiconductor component

Info

Publication number: CN218525568U
Application number: CN202222176209.6U
Authority: CN
Inventors: 王晓靁; 施能泰; 宋高梅
Original assignee: Individual
Current assignee: Individual
Priority date: 2022-08-18
Filing date: 2022-08-18
Publication date: 2023-02-24
Anticipated expiration: 2032-08-18

Abstract

The utility model discloses a III-nitride epitaxial ceramic substrate and a semiconductor component applicable to semiconductor manufacturing process, wherein the III-nitride epitaxial ceramic substrate comprises a supporting structure, a heat dissipation layer, a two-dimensional material layer and an epitaxial III-nitride layer; the support structure comprises a polycrystalline ceramic core, a barrier layer and a coating layer; the barrier layer is coupled with the periphery of the polycrystalline ceramic core; the cladding layer is coupled with the periphery of the barrier layer; the heat dissipation layer is coupled to the top of the support structure; the two-dimensional material layer is coupled to the top of the heat dissipation layer; an epitaxial III-nitride layer is epitaxially grown on top of the two-dimensional material layer by Van der Waals epitaxy. The utility model can manufacture large-size substrates with low manufacturing cost, effectively improve the component efficiency of AlGaN wide-energy-gap photoelectric and electronic components and GaN laser diodes and reduce the production cost; also provides a high-quality low-cost solution for the epitaxial substrate of the III-nitride semiconductor component, and meets the application requirements of high frequency, high power, high voltage and the like; the introduction of the heat dissipation layer of the component further improves the working efficiency and the working life of the component.

Description

Group III nitride epitaxial ceramic substrate applicable to semiconductor process and semiconductor component

Technical Field

The utility model relates to a technical field of photoelectricity and semiconductor, concretely relates to high heat dissipation efficiency III nitride epitaxial ceramic substrate that semiconductor processing procedure is suitable for still relates to the semiconductor component who uses this base plate.

Background

In the manufacturing process of photoelectric and semiconductor components, epitaxy has an important influence on the quality of products. The quality effects include device performance, yield, reliability, and lifetime. Generally, the substrate material is desirably a single crystal material that minimizes the defect density, and crystal quality is not affected during epitaxy as much as possible when the crystal structure, lattice constant (lattice constant), and Coefficient of Thermal Expansion (CTE) are matched to the epitaxial material. In recent years, wide band gap (wide band gap) semiconductor technology and market are rapidly developed along with the requirements of power and high frequency semiconductor components, and the supply of high-quality epitaxial substrates of silicon carbide and gallium nitride at two main corners of wide band gap semiconductor materials is relied on the basis of quality improvement. Unlike the gallium nitride-based LED which mainly uses a sapphire substrate, the most commonly used gallium nitride substrates according to the current technology are two substrates, namely, gallium nitride (GaN-on-Si) and gallium nitride on silicon carbide (GaN-on-SiC) on a silicon wafer. The main reason is derived from the current cost and size limitations of the gallium nitride single crystal technology development.

In other words, if a single crystal substrate of the above two materials is directly produced by a melt-growth method, not only is the production cost higher, but also relatively more waste heat is generated, which causes unavoidable environmental pollution. In the Vapor Phase growth process, the Hydride Vapor Phase Epitaxy (HVPE) method is currently used for growing gallium nitride crystals to produce single-crystal gallium nitride substrates, and due to the limitations of production cost and yield conditions, the current mass production technology reaches 4 inches of substrates and the cost is extremely high. In fact, the defect density of the vapor phase method is still higher than that of other liquid phase crystal growth processes, but the defect density is limited by too slow crystal growth rate of the rest processes, the volume production cost is higher, and the commercial main flow is still limited to the HVPE method under the consideration of market demand, device performance and substrate cost and supply trade-off. The literature indicates that the vapor phase method GaN growth rate still has the possibility of increasing several times and maintaining good crystallinity, but is limited by the deterioration of defect density and is not currently oriented to reduce the cost of GaN substrates. As for the aluminum nitride crystal growth technology, a Physical Vapor Transport (PVT) method, which is one of Vapor phase methods, is used to produce the single crystal aluminum nitride substrate, because of the limitations of production technology and yield, only two manufacturers have mass production capability globally, the cost is very high when the current mass production technology only reaches 2 inches of substrates, and the capacity cannot be widely supplied to the market because of the occupation of a few manufacturers. Due to the chemical characteristics of aluminum nitride and the limitation of hardware components in a physical vapor transport method, the existence of carbon (C) and oxygen (O) impurities in a single crystal finished product to a certain degree is inevitable, and the characteristics of the components are also influenced to a certain degree.

TABLE 1

Similarly, the situation also exists in the current silicon carbide (SiC) single crystal, the silicon carbide substrate is a substrate material of the current high-performance power semiconductor and high-end light emitting diode, the single crystal growth process is a Physical Vapor Transport (PVT) process in a Vapor phase process, the growing technology of the high-quality large-size silicon carbide single crystal is difficult, the high-end mass production technology is mastered by a few manufacturers, and the influence on the application cost still has great progress space. Gallium nitride (GaN-on-SiC) on silicon carbide is a high-quality gallium nitride epitaxial substrate, but for the above reasons, large-size substrates have the problems of high price, limited supply, technical mastery in hands of a few manufacturers and the like; in contrast, silicon substrates are large in size, low in cost, high in productivity and stable in quality, and gallium nitride (GaN-on-Si) substrates on silicon wafers are more popular and are of interest to relevant manufacturers.

Two substrate technologies of gallium nitride (GaN-on-Si) and gallium nitride (GaN-on-SiC) on silicon wafer belong to heterojunction epitaxial technology in the aspect of epitaxial process, heteroepitaxy needs to overcome the problem of lattice matching between different materials and the problem of thermal stress between epitaxial layer and substrate caused by different thermal expansion coefficients, and the GaN-on-SiC has higher quality than the GaN-on-Si because the degree of lattice mismatch (lattice mismatch) of GaN-on-SiC is smaller than that of GaN-on-Si; another important characteristic is that the gallium nitride layer has significant tensile stress on the silicon surface, and the stress is higher when the thickness of the gallium nitride layer is increased, so that the substrate is bent and deformed, even the gallium nitride layer may crack, and the correlation effect is more serious as the size of the wafer is increased. The difficulty of the related technology leads to generally low yield of GaN-on-Si, and the GaN-on-Si is mostly applied to power supply products, the mass production is mainly six inches at present, and the advantage of large size of silicon wafers cannot be fully exerted.

Two-dimensional (2D) materials are an emerging field of rapid development, graphene (graphene) is the most well-known material that has attracted a great deal of research and development in the 2D material family at the earliest time, and the two-dimensional layered structure thereof has special or excellent physical/chemical/mechanical/photoelectric properties, and there is no strong bond between layers, and the two-dimensional layered structure is only bonded by van der waals force, which also means that there is no dangling bond (dangling bond) on the surface of the layered structure, and graphene is currently confirmed to have a wide and excellent application potential; the research and development work of graphene is widely carried out all over the world, and simultaneously, the research and development of more 2D materials are also driven, including hexagonal Boron Nitride hBN (hexagonal Boron Nitride), transition metal dichalcogenides TMDs (transition metal dichalcogenides), black phosphorus and the like, which are also accumulated as more research and development achievers in the 2D material family, the materials have specific material characteristics and application potentials, and the development of the manufacturing technology of related materials is continuously and actively promoted. MoS of one of graphene, hBN and TMDS materials in addition to excellent photoelectric characteristics ₂ Are considered to have excellent diffusion barrier properties, to a certain extentInconsistent high temperature stability, especially hBN, is also superior in chemical inertness (inertness) and high temperature oxidation resistance.

Due to the nature of the layered structure and the inter-layer van der waals bonding characteristics, the technical feasibility of fabricating two or more materials in the 2D family of materials into a layered-stacked heterostructure (hetero-structure) is greatly expanded, the heterostructure can create new application characteristics or fabricate new components in addition to combining different characteristics, and the research and development in the fields of photoelectricity and semiconductors are very active at present. In particular, it may be a mechanical composition stack, or it may be a physical or chemical vapor deposition.

The van der Waals force bonding characteristics of 2D materials have also been noticed for the application of epitaxial substrates to conventional 3D materials, and it is focused on the fact that epitaxial materials in epitaxial technology must match very well with the substrate material in terms of crystal structure, lattice constant (lattice constant), and Coefficient of Thermal Expansion (CTE), but in reality, it is often encountered that the subject of the present invention is not suitable for the substrate material, or the ideal substrate material is more costly or not easily available, and the 2D materials provide another solution for heteroepitaxial substrates, namely, so-called van der Waals epi (van der Waals epi). The mechanism by which van der waals epitaxy may benefit heteroepitaxy is that the direct chemical bonding at the conventional epitaxial interface is replaced by van der waals bonding, which will relieve the lattice and thermal expansion mismatch stress or strain energy from the epitaxy process to some extent, thus improving the quality of the epitaxial layer, or by introducing 2D materials and van der waals epitaxy, some heteroepitaxy techniques that were not practical previously are possible. Related studies have also shown that when the above 2D materials are stacked on top of each other in a heterostructure, the interaction forces are dominated by van der waals forces; when the Epitaxy of the 3D material is performed on the 2D material, the Epitaxy does not substantially be pure van der Waals epitaxies (van der Waals epitaxies) or more precisely can be regarded as Quasi van der Waals epitaxies (Quasi van der Waals epitaxies) due to the presence of dangling bonds (dangling bonds) of the 3D material on the interface and simultaneously contributes to the bonding force of the interface; in any case, the degree of lattice and thermal expansion matching still certainly contributes to the final epitaxial quality, and the overall matching degree is contributed by the 2D material interposer and the substrate material. The 2D layered material has a hexagonal or honeycomb structure, and is compatible with Wurtzite (Wurtzite) and zincblende (Zinc-blend) structure materials in terms of external delay time, and the main epitaxial materials in the related field of the invention belong to the structure.

Single crystal (single crystal) is one of the requirements for ensuring the epitaxial quality based on the use of the epitaxial substrate; the growth of a general 2D material is often related to the crystal orientation of a crystalline substrate in a nucleation stage, when the substrate adopts a general metal foil, the 2D material has a different formed direction in the nucleation stage due to belonging to a polycrystalline structure, and after the crystal nuclei are polymerized into a continuous film along with the growth, blocks (domains) with different orientations still exist instead of single crystals; when the substrate is made of single crystal material such as sapphire, the specific nucleation direction possibly occurring due to the symmetrical correlation of the two structures is not unique, and a single crystal continuous film cannot be formed. Recent research has found that when the copper foil is subjected to heat treatment by improving the existing process to form a copper foil with a specific lattice orientation, anisotropic lattice blocks (domains) formed in the growth process of 2D material graphene and hexagonal boron nitride (hBN) can be eliminated and a continuous thin film of single crystal graphene and hexagonal boron nitride can be grown.

In recent years, studies have been made to develop a layered MoS having good crystallinity on the surface of single-crystal c-plane (c-plane) sapphire by CVD or the like ₂ 、WS ₂ 、MoSe ₂ And WSe ₂ These TMD materials have two crystal orientations (crystal orientation) at 0 ℃ and 60 ℃ in the grown TMD material (reference: nature 2019, v.567, 169-170). Regarding the AlGaN and GaN materials of interest in the present invention, the crystal structure has hexagonal symmetry at the epitaxial junction, and the TMD layer does not constitute a single crystal layer, but theoretically does not hinder the formation of single crystals in the AlGaN and GaN epitaxial layers when used as an epitaxial substrate; the technology of peeling off the TMD layer from the sapphire surface and transferring the TMD layer to the surface of other substrate has been put into practical use and large area, the sapphire substrate can be recycled, and the process is a commercially feasible process (ACS Nano 2015,9,6, 6178-61)87). Therefore, in addition to the previous method for manufacturing the TMD single crystal continuous thin film, the transfer of the TMD layer on the surface of the sapphire to the substrate with the thermal expansion coefficient matched with those of AlGaN and GaN is another applicable feasible solution for mass production.

The semiconductor technology of the wide band gap (wide band gap) of the III-family nitride is mainly applied to high-voltage, high-power and high-frequency semiconductor components, the market demand is rapidly developed, the quality is promoted day by day, and the heat dissipation demand of the components is also promoted; the group III nitride has good heat conductivity, but only silicon carbide in the single crystal epitaxial substrate has excellent heat conductivity, and the heat conductivity reaches 350W/(m.K) level; the AlN ceramic sintered body (AlN purity is more than 99 percent) can reach more than 170W/(m.K), when the AlN ceramic sintered body is used as an epitaxial substrate main body, the heat dissipation efficiency is obviously superior to that of monocrystalline silicon and a sapphire substrate, and the basic heat dissipation requirement of most components can be met; if a proper high thermal conductivity coefficient layer can be introduced under the component, i.e. on the surface layer of the substrate, the working efficiency and the working life of the component can be further improved; suitable options such as a silicon carbide thin layer, a high-purity (AlN purity > 99.9%) high-crystallinity chemical vapor deposition AlN thin layer heat conduction coefficient can reach above 260W/(m.K), a microwave PECVD diamond thin layer heat conduction coefficient can reach above 950W/(m.K), a physical or chemical vapor deposition diamond-like carbon (diamond) thin layer heat conduction coefficient can reach above 600W/(m.K), and the application and manufacturing technology of related materials are developed to different degrees.

AlN ceramic sintered bodies have been already put into commercial use as heat-dissipating substrates, and when they are used as epitaxial substrates, it is necessary to effectively coat the core of the ceramic sintered bodies with diffusion barrier layers, passivation layers, and the like in order to effectively remove the adverse effects that sintering additives and other possible impurities contained in the sintered bodies may cause in the epitaxial and semiconductor production processes; the associated diffusion barrier and passivation layer applications must also be compatible with epitaxial and semiconductor fabrication processes; the barrier layer adopts an AlN layer and an AlN ceramic sintered body which have similar thermal properties, and the outer side is assisted by an amorphous or partially crystalline alumina or silicon nitride coating layer to effectively form the internal and external barriers. Further, the introduction of a conductive thin layer on the bottom surface of an insulating AlN ceramic substrate can achieve electrostatic-chucking (e-chucking) capability of the chip, and is further compatible with existing mainstream silicon semiconductor manufacturing lines.

The prior art comprises the following steps: intrinsic or heteroepitaxy is performed on the surface of a high quality single crystal substrate as shown in fig. 1. Currently, alGaN wide-gap devices are epitaxially grown on sapphire or aluminum nitride (AlN), and GaN laser diodes are epitaxially grown on high-quality single-crystal GaN. The defect density of AlGaN wide-gap component on the sapphire is higher due to poor matching degree>10 ⁸ /cm ² ) The Efficiency of the component is seriously influenced, the UVC LED component further reduces the whole luminous Efficiency because the difference amplitude of the refractive indexes of AlGaN and sapphire is large, and the luminous Efficiency EQE (External Quantum Efficiency) of the component in the current market is far lower than 10%; the high-quality AlN single-crystal substrate is an ideal substrate for AlGaN epitaxy, and has a lattice and a thermal expansion coefficient which are highly matched with those of an epitaxial layer (epitaxial layer defect density)<10 ⁵ /cm ² ) At present, the PVT AlN manufacturing technology is limited to produce 2-inch chips at present, but the yield is low and the cost is high, and the capacity of a globally unique PVT AlN supplier is mastered by a specific group, so that the market supply requirement is difficult to meet; the manufacturing cost of high quality single crystal GaN for GaN laser diode epitaxy is high, but the HVPE GaN crystal defect density reaches 10 to 100-1000 times of that of sapphire substrate ⁵ /cm ² The horizontal and mass production size is mainly 4 inches of chips; because the performance of the laser diode is highly sensitive to the defect density of the epitaxial layer, the existing GaN single crystal chip is a non-ideal option, but a better scheme is lacked in the market.

SUMMERY OF THE UTILITY MODEL

Based on the problems existing in the prior art, an object of the present invention is to provide a high heat dissipation efficiency iii-nitride epitaxial ceramic substrate suitable for semiconductor process, and a semiconductor device using the same.

In order to realize the purpose, the utility model discloses a solution is:

a group III nitride epitaxial ceramic substrate suitable for semiconductor process comprises a support structure, a heat sink layer, a two-dimensional material layer and an epitaxial group III nitride layer; wherein the support structure comprises a polycrystalline ceramic core, a barrier layer and a coating layer; the barrier layer is coupled with the periphery of the polycrystalline ceramic core; the coating layer is coupled with the periphery of the barrier layer; the heat dissipation layer is coupled to the top of the support structure; the two-dimensional material layer is coupled to the top of the heat dissipation layer; an epitaxial III-nitride layer is epitaxially grown on top of the two-dimensional material layer by Van der Waals epitaxy.

Wherein the polycrystalline ceramic core comprises polycrystalline aluminum nitride, or the polycrystalline ceramic core comprises polycrystalline aluminum nitride and one or more dopants.

The two-dimensional material layer is a monocrystalline or polycrystalline to two-dimensional ultrathin material intermediate layer, the monocrystalline or polycrystalline to two-dimensional ultrathin material intermediate layer is provided with a top layer, the mismatching degree of the lattice constant of the top layer and AlN, alGaN or GaN is not more than 20%, and the two-dimensional material intermediate layer is suitable for AlN, alGaN or GaN epitaxy.

The two-dimensional material layer is a single-crystal or polycrystalline two-dimensional ultrathin material intermediate layer selected from hBN and MoS ₂ 、WS ₂ 、MoSe ₂ Or WSe ₂ A set of (a).

The two-dimensional material layer is a monocrystalline or polycrystalline two-dimensional ultrathin material intermediate layer, and the thickness of the monocrystalline or polycrystalline two-dimensional ultrathin material intermediate layer is larger than 0.5nm.

The two-dimensional material layer is a monocrystalline or polycrystalline two-dimensional ultrathin material intermediate layer, and at least the top layer of the polycrystalline two-dimensional ultrathin material intermediate layer is composed of two crystallization regions (domains) which are mutually matched at an angle of 60 degrees.

The heat dissipation layer comprises at least one layer of aluminum nitride or diamond-like with high thermal conductivity, and the thickness of the heat dissipation layer is 500nm to 30 μm.

The barrier layer comprises an AlN layer, at least the side wall and the bottom surface of the AlN layer are coated with the polycrystalline ceramic core, and the thickness of the AlN layer is more than 200nm.

The coating layer comprises Al ₂ O ₃ Or a SiN layer, al ₂ O ₃ Or the SiN layer has a thickness of 50nm to 200nm.

The bottom of the substrate also comprises a conducting layer which is arranged between the polycrystalline ceramic core and the barrier layer or between the barrier layer and the coating layer, and the conducting layer can be a metal layer, a metal nitride or a polycrystalline silicon layer.

The III-nitride semiconductor component adopting the III-nitride epitaxial ceramic substrate is characterized in that a heat dissipation structure which penetrates through the III-nitride epitaxial layer and is directly connected with the substrate heat dissipation layer is added at the periphery of the III-nitride epitaxial layer, and the heat dissipation structure can be made of aluminum nitride or diamond-like stone layers with high heat conduction coefficients. By means of the combination of the heat dissipation structure and the heat dissipation layer, not only the heat dissipation efficiency can be further improved, but also the heat dissipation structure can play a role in reinforcing the epitaxial III-group nitride layer.

Forming a passivation layer, a gate, a source and a drain on the epitaxial group III nitride layer and the top of the heat dissipation structure to form a lateral (lateral) device embodiment; the heat dissipation structure can also be applied to vertical (vertical) type components by those skilled in the relevant art.

After the scheme is adopted, the utility model provides a brand-new base plate with the help of 2D material intermediary layer (WS) ₂ And MoS ₂ ) Lattice constant and c face AlGaN and gaN highly match, polycrystal ceramic core sintering basement for example sintering AlN thermal expansion nature and AlGaN and gaN highly match, the utility model discloses also provide feasible technique and satisfy and carry out single crystal layer epitaxy on polycrystal ceramic core basement, including sintering AlN technique can make jumbo size (more than 6 inches and 6 inches) basement and cost of manufacture far below relevant single crystal chip (GaN, alN and sapphire), the utility model discloses solve present UVC LED and gaN system laser diode epitaxial substrate problem simultaneously and can show reduction process cost, can effectively promote the subassembly efficiency and the reduction in production cost of AlGaN wide energy gap photoelectricity and electronic component and gaN system laser diode. The utility model also provides a solution for the epitaxial substrate of the III-nitride semiconductor component with high quality and low cost, which can meet the application requirements of high frequency, high power, high voltage and the like; the AlN ceramic sintered body has good heat conductivity and can meet the basic heat dissipation requirements of most components; under the assemblyNamely, the surface layer of the substrate is introduced with a proper layer with high thermal conductivity coefficient as a heat sink layer (heat sink), so as to further improve the working efficiency and the working life of the component.

Drawings

FIG. 1 is a schematic structural view of a prior art intrinsic or heteroepitaxy on a surface of a high quality single crystal substrate;

fig. 2 is a schematic structural diagram of a first embodiment of a substrate according to the present invention;

fig. 3 is a schematic structural diagram of a second embodiment of the substrate of the present invention;

fig. 4 is a schematic structural view of the assembly of the present invention.

Description of the reference symbols

The support structure 10: a polycrystalline ceramic core 11, a barrier layer 12, a clad layer 13;

a heat dissipation layer 20;

a two-dimensional material layer 30;

an epitaxial group III nitride layer 40;

a conductive layer 50;

a heat dissipating structure 60;

a passivation layer 70;

gate 81, source 82, drain 83.

Detailed Description

The present invention will now be described more fully hereinafter with reference to the accompanying drawings and specific examples.

As shown in fig. 2 and 3, the present invention discloses a iii-nitride epitaxial ceramic substrate for semiconductor manufacturing process, which includes a supporting structure 10, a heat dissipation layer 20, a two-dimensional material layer 30 and an epitaxial iii-nitride layer 40.

The support structure 10 includes a polycrystalline ceramic core 11, a barrier layer 12, and a cladding layer 13. Wherein the polycrystalline ceramic core 11 comprises polycrystalline aluminum nitride, or the polycrystalline ceramic core 11 comprises polycrystalline aluminum nitride and one or more dopants. The barrier layer 12 is coupled to the periphery of the polycrystalline ceramic core 11; the barrier layer 12 may comprise an AlN layer (e.g., PECVD AlN) covering the polycrystalline ceramic core 11 at least at the sidewalls and bottom, the AlN layer having a thickness of greater than 200nm. Drawing (A)2, the barrier layer 12 is formed by coating (i.e., half-coating) the polycrystalline ceramic core 11 on the sidewalls and bottom; as shown in FIG. 3, the barrier layer 12 is formed by coating (i.e., fully coating) the polycrystalline ceramic core 11 on the sidewalls and the front and bottom surfaces. The cladding layer 13 is coupled to the periphery of the barrier layer 12; the cladding layer 13 may include Al ₂ O ₃ Or a SiN layer, al ₂ O ₃ Or the SiN layer has a thickness of 50nm to 200nm.

The bottom support structure 10 of the substrate further comprises a conductive layer 50, such as: sputter TiN or Doped PolySi. Specifically, as shown in fig. 3, the conductive layer 50 is disposed between the polycrystalline ceramic core 11 and the barrier layer 12, or as shown in fig. 2, the conductive layer 50 is disposed between the barrier layer 12 and the clad layer 13. The conductive layer 50 may be a metal layer, a metal nitride, or a polysilicon layer.

The heat dissipation layer 20 is coupled to the top of the support structure 10, and the heat dissipation layer 20 is a single layer or a combination of layers, such as: CVD AlN, PECVD diamnd, cathode vacuum arc DLC (Diamond like carbon). The heat dissipation layer 20 comprises at least one layer of high thermal conductivity aluminum nitride or diamond-like, and the thickness of the heat dissipation layer 20 is 500nm to 30 μm.

The two-dimensional material layer 30 (a 2D layer meeting the III-Nitride epitaxy requirement) is coupled to the top of the heat sink layer 20. The two-dimensional material layer 30 is a single-crystal or multi-crystal to two-dimensional ultrathin material intermediate layer, the single-crystal or multi-crystal to two-dimensional ultrathin material intermediate layer has a top layer, the mismatching degree of the lattice constant of the top layer and AlN, alGaN or GaN is not more than 20%, and the two-dimensional material intermediate layer is suitable for AlN, alGaN or GaN epitaxy. The monocrystalline or polycrystalline orientation two-dimensional ultrathin material intermediate layer is selected from hBN and MoS ₂ 、WS ₂ 、MoSe ₂ Or WSe ₂ A set of (a). The thickness of the monocrystalline or polycrystalline two-dimensional ultrathin material intermediate layer is more than 0.5nm. At least the top layer of the polycrystalline two-dimensional ultrathin material intermediate layer is composed of two crystal regions (domains) which are matched with each other at an angle of 60 degrees.

The epitaxial ill-nitride layer 40 is epitaxially grown on top of the two-dimensional material layer 30 by van der waals epitaxy.

The utility model forms an epitaxial substrate with the surface layer lattice constant and the basal thermal expansion coefficient highly matched with III-Nitride such as AlN and GaN by applying a 2D material interposer meeting the epitaxial requirements of III-Nitride and Van Der Waals Epitaxy (VDWE) on the surface of a polycrystalline AlN ceramic substrate; the high heat conduction layer is favorable for the requirement of quick heat dissipation of the components; the AlN ceramic substrate core portion is effectively coated by the side wall and the bottom barrier layer to remove the escape of impurities from the ceramic sintered body, and the bottom conductive layer satisfies the electrostatic adsorption operation requirement.

As shown in fig. 4, the present invention also discloses a group iii nitride semiconductor device using the group iii nitride epitaxial ceramic substrate. The heat dissipation structure 60 penetrating through the epitaxial III-nitride layer 40 and directly connected to the substrate heat dissipation layer 20 is added around the epitaxial III-nitride layer 40, the heat dissipation structure 60 with high thermal conductivity is introduced to directly conduct the heat generated by the device into the heat dissipation layer 20, and the heat dissipation structure 60 is made of the same material as the heat dissipation layer 20 and is made of aluminum nitride or diamond-like carbon with high thermal conductivity. A passivation layer 70, a gate 81, a source 82 and a drain 82 are formed on top of the epitaxial group iii nitride layer 40 and the heat spreading structure 60.

The utility model discloses a manufacturing procedure as follows:

step 1, using a surface-polished polycrystalline AlN ceramic sintered body substrate (polycrystalline ceramic core 11) as a starting material, and performing appropriate process treatment (including thin film evaporation, chemical mechanical polishing, spin-on-coating, and heat treatment) to highly planarize the substrate surface to obtain a support structure 10 for preparation of a subsequent manufacturing process; the thin film deposition may include the steps of coating the AlN barrier layer 12 and the coating layer 13 and forming the bottom conductive layer 50. The AlN barrier layer 12 may be formed by coating the entire ceramic substrate (front surface, bottom surface and side walls) by LPCVD, or by coating the entire ceramic substrate by two steps of front and back surfaces by PECVD or other thin film deposition; or coating the AlN barrier layer 12 on the bottom surface and the side wall of the ceramic substrate by using a PECVD method or other film evaporation methods; a coating layer 13 of alumina or silicon nitride or a combination of the two can be coated on the surface of the AlN barrier layer 12 by ALD and PECVD respectively; the bottom conductive layer 50 may be formed by CVD doped polysilicon or sputtering (sputter) transition metal (such as Ti, W, ni, mo, ta, etc.) or nitride thereof (such as WN, tiN, taN, tiSiN, etc.), and may be formed between the bottom polycrystalline ceramic core 11 and the barrier layer 12 or between the barrier layer 12 and the cladding layer 13.

And 2, coating a heat dissipation layer 29 on the surface of the support structure 10 in the step 1, and flattening the surface. The heat dissipation layer 11 may be a combination of the high thermal conductivity layers described below or a single thin layer of material in which surface planarization is achieved alone. The high thermal coefficient of transmission layer may comprise the options of a high purity (AlN purity > 99.9%) high crystallinity, a thin layer of chemically vapor deposited or thermally treated spin-on AlN, a thin layer of vapor deposited silicon carbide, a thin layer of microwave PECVD diamond, a thin layer of physically or chemically vapor deposited diamond-like carbon (diamond), and the like. For example, when a microwave PECVD diamond thin layer with an ultrahigh heat transfer coefficient is adopted, an AlN thin layer is additionally coated on the top layer in a rotating mode to meet the requirement for planarization; the total thickness of the heat dissipation layer 20 is 500nm to 30 μm according to the manufacturing and application requirements.

And 3, growing a polycrystalline two-dimensional material layer 30 (2D layer) on the surface of the c-plane sapphire chip by using the existing manufacturing process.

And 4, growing an applicable 2D layer from the surface of the sapphire in the existing process, peeling the layer, and transferring the layer to the surface of the support structure 10 (AlN ceramic substrate) containing the barrier layer 12 and the heat dissipation layer 20.

Step 5, the substrate with the polycrystalline orientation 2D material thin layer in the step 4 can continue to carry out subsequent III-nitride epitaxy; or, proceeding AlN or AlGaN nucleation layer coating and proceeding III-nitride epitaxy to form an epitaxial III-nitride layer 40.

The group iii nitride epitaxial layer produced in step 6 in step 5 may be further subjected to a group iii nitride semiconductor device production process. The semiconductor device may incorporate a heat sink structure 60 directly connected to the substrate heat sink layer 20 at the periphery of the active region (epitaxial group III nitride layer 40) of the device. One example is in component Si ₃ N ₄ Before the passivation layer 70 is deposited, the trench required for the heat dissipation structure 60 is fabricated by photolithography and etching process, and then the high thermal conductivity material and the process suitable for vapor deposition process in the process of fabricating the heat dissipation layer 20 in step 2 are used to completely fill the trench, and the high thermal conductivity material on the surface outside the trench is polished by chemical mechanical polishing processMaterial removal and sequential completion of Si ₃ N ₄ Passivation layer 70 is deposited and other necessary processes for the fabrication of devices such as gate 81, source 82 and drain 83. Finally, a lateral semiconductor device is obtained.

The above description is only an implementation example of the present invention, and is not a limitation to the protection scope of the present invention. It should be noted that after reading this description, those skilled in the art can make equivalent changes according to the design concept of the present application, which fall within the protection scope of the present application.

Claims

1. A group III nitride epitaxial ceramic substrate suitable for semiconductor process is characterized in that: comprises a supporting structure, a heat dissipation layer, a two-dimensional material layer and an epitaxial III-nitride layer; wherein the support structure comprises a polycrystalline ceramic core, a barrier layer and a coating layer; the barrier layer is coupled with the periphery of the polycrystalline ceramic core; the cladding layer is coupled with the periphery of the barrier layer;

the heat dissipation layer is coupled with the top of the support structure; the two-dimensional material layer is coupled to the top of the heat dissipation layer; an epitaxial III-nitride layer is epitaxially grown on top of the two-dimensional material layer by Van der Waals epitaxy.

2. The group iii nitride epitaxial ceramic substrate for semiconductor processing according to claim 1, wherein: the polycrystalline ceramic core comprises polycrystalline aluminum nitride.

3. The group iii nitride epitaxial ceramic substrate for semiconductor processing according to claim 1, wherein: the two-dimensional material layer is a single-crystal or polycrystalline two-dimensional ultrathin material intermediate layer, the single-crystal or polycrystalline two-dimensional ultrathin material intermediate layer is provided with a top layer, the mismatching degree of the lattice constant of the top layer and AlN, alGaN or GaN is not more than 20%, and the two-dimensional material intermediate layer is suitable for AlN, alGaN or GaN epitaxy.

4. The group iii nitride epitaxial ceramic substrate for semiconductor processing according to claim 1, wherein: the two-dimensional material layer is a single crystal or polycrystal orientation two-dimensional ultrathin filmA material interposer, the single-crystal or polycrystalline oriented two-dimensional ultrathin material interposer is selected from hBN, moS ₂ 、WS ₂ 、MoSe ₂ Or WSe ₂ 。

5. The group-ill nitride epitaxial ceramic substrate for use in semiconductor processing as claimed in claim 1, wherein: the two-dimensional material layer is a monocrystalline or polycrystalline two-dimensional ultrathin material intermediate layer, and the thickness of the monocrystalline or polycrystalline two-dimensional ultrathin material intermediate layer is larger than 0.5nm.

6. The group iii nitride epitaxial ceramic substrate for semiconductor processing according to claim 1, wherein: the two-dimensional material layer is a monocrystalline or polycrystalline two-dimensional ultrathin material intermediate layer, and at least the top layer of the polycrystalline two-dimensional ultrathin material intermediate layer is composed of two crystallization areas which are mutually matched at an angle of 60 degrees.

7. The group iii nitride epitaxial ceramic substrate for semiconductor processing according to claim 1, wherein: the heat dissipation layer comprises at least one aluminum nitride or diamond-like layer, and the thickness of the heat dissipation layer is 500nm to 30 mu m.

8. The group iii nitride epitaxial ceramic substrate for semiconductor processing according to claim 1, wherein: the barrier layer comprises an AlN layer, at least the side wall and the bottom surface of the AlN layer are coated with the polycrystalline ceramic core, and the thickness of the AlN layer is more than 200nm.

9. The group iii nitride epitaxial ceramic substrate for semiconductor processing according to claim 1, wherein: the coating layer comprises Al ₂ O ₃ Or a SiN layer, al ₂ O ₃ Or the SiN layer has a thickness of 50nm to 200nm.

10. The group iii nitride epitaxial ceramic substrate for semiconductor processing according to claim 1, wherein: the bottom of the substrate also comprises a conducting layer, the conducting layer is arranged between the polycrystalline ceramic core and the barrier layer or between the barrier layer and the coating layer, and the conducting layer is a metal layer, a metal nitride or a polycrystalline silicon layer.

11. A semiconductor assembly, characterized by: a group iii nitride epitaxial ceramic substrate suitable for semiconductor processing according to any one of claims 1 to 10, wherein a heat sink structure is formed on the periphery of the epitaxial group iii nitride layer, the heat sink structure penetrating through the epitaxial group iii nitride layer and directly connecting to the heat sink layer, the heat sink structure is made of aluminum nitride or diamond-like layer.