CN218240952U

CN218240952U - ARM-based low-power-consumption aviation domestic graphics processing system

Info

Publication number: CN218240952U
Application number: CN202221848232.9U
Authority: CN
Inventors: 孙锴; 张伟; 丰新龙
Original assignee: Taiyuan Aero Instruments Co Ltd
Current assignee: Taiyuan Aero Instruments Co Ltd
Priority date: 2022-07-15
Filing date: 2022-07-15
Publication date: 2023-01-06
Anticipated expiration: 2032-07-15

Abstract

The utility model discloses a low-power consumption aviation domestic graphics processing system based on ARM, including little processing circuit, little processing circuit carries out data communication through RS422 communication circuit, ARINC429 communication circuit and outside, carries out data acquisition, solves the processing to generate the figure and show with LVDS video signal output. The system reduces the power consumption, and the power consumption is only 2W; the volume is reduced, the cost is reduced, and good economic and social effects are realized.

Description

ARM-based low-power-consumption aviation domestic graphics processing system

Technical Field

The utility model belongs to the technical field of the graphics processing system, especially, relate to a low-power consumption aviation domestic graphics processing system based on ARM.

Background

At present, airborne display systems are mainly divided into two types, and simple functions only support simple graphic acceleration functions, such as filling, dot-dash lines, copying and the like, and do not support OpenGL. The other is to adopt a CPU + GPU architecture, which has large power consumption, large volume and complex operation and needs to be specially configured with a CPU driver. The processing of the video is usually realized by using an FPGA to overlay the video output by the external device.

The existing aerial graphic processing system adopting the first architecture has the following disadvantages: the graph processing performance is poor, and the frame rate is low; the Opengl graphic interface is not supported, and the transportability is poor; an embedded operating system is not supported.

The existing aerial graphic processing system adopting the second architecture has the following disadvantages: the power consumption is large, and is about 5-10W; the system is provided with a Vxworks5.5 operating system and an OpenGL1.1 graphic programming interface; an FPGA is required to be added to realize the functions of video superposition and the like; the overall dimension is large, about 160 × 180.

SUMMERY OF THE UTILITY MODEL

Purpose of the utility model

In order to solve the problem, the utility model provides a low-power consumption aviation domestic graphics processing system based on ARM adopts embedded ARM framework treater (integrated GPU) as main processing circuit, has carried out optimal design to the hardware circuit, and on the basis of function before realizing, the function and the performance of demonstration class product have been promoted, the chip quantity that has significantly reduced simultaneously, has reduced area occupied, reduces the development degree of difficulty, shortens project development cycle. Meanwhile, the product reliability is improved, and the cost is reduced. .

Technical solution of utility model

The low-power-consumption aviation domestic graphic processing system based on the ARM comprises a micro-processing circuit, wherein the micro-processing circuit is in data communication with the outside through an RS422 communication circuit and an ARINC429 communication circuit, and performs data acquisition and resolving processing, so that a graphic is generated and is output and displayed through LVDS video signals.

Preferably, the micro-processing circuit adopts a processor with a 4-core ARM-ContexA7+ GPU architecture.

Preferably, the micro-processing circuit is provided with an OpenGLES graphic operation interface.

Preferably, the micro-processing circuit is further connected with the eMMC memory circuit and used for storing the operating system and the application software.

Preferably, the microprocessor circuit is further connected with a NOR Flash memory circuit and a DDR3 memory circuit, the NOR Flash memory circuit is used for storing a boot program, and the DDR3 memory circuit is used for operating a system and displaying a video generated by the system.

Preferably, the microprocessor circuit is further connected with an ARINC429 communication circuit, an Ethernet transceiver circuit, a key collection circuit, an AD conversion circuit, a power management circuit and a clock circuit, and is a cross-linking interface of the system and the peripheral equipment.

The utility model has the advantages that: the power consumption is reduced, and the power consumption is only 2W; the volume is reduced, the cost is reduced, and good economic and social effects are realized. Matching with a high-reliability real-time operating system SylixOS operating system; supporting a new graphic programming interface OpenGLES2.0; the graphic processing efficiency is improved: a standard 1024 x 768 resolution PFD picture refresh rate greater than 30FPS; the multi-channel video output is supported, and various application scenes can be met; the external dimension is reduced to 65mm multiplied by 70mm.

Drawings

Fig. 1 is the structure diagram of the low-power consumption aviation domestic graphics processing system based on the ARM of the present invention.

Detailed Description

The utility model discloses a realize through following technical scheme.

The low-power-consumption aviation domestic graphic processing system based on the ARM comprises a micro-processing circuit, an eMMC storage circuit, a NOR Flash storage circuit, a DDR3 storage circuit, an RS422 communication circuit, an RS232 communication circuit, an ARINC429 communication circuit, an Ethernet transceiver circuit, a key acquisition circuit, an AD conversion circuit, a power management circuit and a clock circuit, wherein the eMMC storage circuit, the NOR Flash storage circuit, the DDR3 storage circuit, the RS422 communication circuit, the RS232 communication circuit, the ARINC429 communication circuit, the Ethernet transceiver circuit, the key acquisition circuit, the AD conversion circuit, the power management circuit and the clock circuit are connected with the micro-processing circuit. The micro-processing circuit is in data communication with the outside through the RS422 circuit and the ARINC429 circuit, and performs data acquisition and calculation processing, so that a graph is generated and output and displayed through LVDS video signals.

The eMMC storage circuit is used for storing an operating system and application software, the NOR Flash storage circuit is used for storing a start-up bootstrap program, the DDR3 storage circuit is used for operating the operating system and displaying a video which is generated by the system independently, the microprocessing circuit is crosslinked with the RS422 communication circuit and the RS232 communication circuit through a UART interface on the microprocessing circuit to complete RS422 and RS232 data crosslinking, the microprocessing circuit is crosslinked with the ARINC429 communication circuit and the AD conversion circuit through an SPI interface on the microprocessing circuit to complete ARINC429 data crosslinking and analog quantity acquisition, the microprocessing circuit is crosslinked with the Ethernet transceiver circuit through an EMAC interface on the microprocessing circuit to achieve software debugging and burning, the microprocessing circuit is communicated with the key acquisition circuit through a GPIO port on the microprocessing circuit to complete key acquisition, and the power management circuit and the clock circuit are used for supplying power to the system and starting up the vibration of the microprocessing circuit.

The micro-processing circuit adopts a high-performance low-power-consumption multi-core processor with a 4-core ARM-ContexA7+ GPU architecture, and is provided with an OpenGLES graphic operation interface. The main characteristics are as follows:

a) Low power consumption 40nm technology;

b) Working main frequency: supporting up to 4 ARM-ContexA7 cores, wherein the speed of each core can reach 1.2GHZ;

c) The memory 1G can be expanded to 2G;

d) Host interface: the system supports interfaces such as UART, USB, SPI, IIC, PWM, SATA, SD and the like;

e) Rendering capacity: the method comprises 1 rendering pipeline, wherein when the rendering pipeline is 400MHz, the pixel filling rate is 1.6Gpixels/s, and the filling rate is 64M triangles/s;

f) Maximum resolution is supported: standard VESA time sequence display is supported, and the maximum resolution is 1920 multiplied by 1080;

g) High definition decoding support: h.264, 1080P @45fps hardware decoding, and texture display can be carried out on the decoded video;

h) And (3) display output: the system supports 2-path independent LVDS video signal output, supports 1-path RGB video signal output, can customize HDMI video signal output, and can customize MIPI video interface output;

i) Power consumption: the power consumption of the embedded full-function test core function circuit is less than 3W;

j) Working temperature range: -45 ℃ to 105 ℃;

k) And (3) packaging form: FBGA468.

The above embodiments are only for illustrating the technical conception and features of the present invention, and the purpose thereof is to enable those skilled in the art to understand the contents of the present invention and to implement the same, so as not to limit the protection scope of the present invention, and all the equivalent changes or modifications made according to the spirit of the present invention should be covered in the protection scope of the present invention. The technology, shape and construction parts which are not described in detail in the present invention are all known technology.

Claims

1. The low-power-consumption aviation domestic graphic processing system based on the ARM is characterized by comprising a micro-processing circuit, wherein the micro-processing circuit is in data communication with the outside through an RS422 communication circuit and an ARINC429 communication circuit, and performs data acquisition and calculation processing, so that a graphic is generated and is output and displayed through LVDS video signals.

2. The ARM-based low-power aviation domestic graphics processing system of claim 1, wherein the micro-processing circuit employs a processor of 4-core ARM-ContexA7+ GPU architecture.

3. The ARM-based low-power aviation domestic graphics processing system of claim 1, wherein said micro-processing circuitry has an OpenGLES graphics operations interface.

4. The ARM-based low-power consumption graphics processing system for aerospace, nationwide, as set forth in claim 1, wherein the microprocessor circuit is further coupled to the eMMC memory circuit for storing operating system and application software.

5. The ARM-based low-power-consumption aviation domestic graphics processing system as claimed in claim 1, wherein said micro-processing circuit is further connected to a NOR Flash memory circuit for storing boot program and a DDR3 memory circuit for operating system operation and display memory for system self-generated video.

6. The ARM-based low-power consumption aviation domestic graphics processing system as claimed in claim 1, wherein the micro-processing circuit is further connected with an ARINC429 communication circuit, an Ethernet transceiver circuit, a key collection circuit, an AD conversion circuit, a power management circuit and a clock circuit, and is a cross-linking interface for the system and peripheral equipment.