CN202502713U - LED display screen controller based on SOPC - Google Patents

LED display screen controller based on SOPC Download PDF

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Publication number
CN202502713U
CN202502713U CN2012200132350U CN201220013235U CN202502713U CN 202502713 U CN202502713 U CN 202502713U CN 2012200132350 U CN2012200132350 U CN 2012200132350U CN 201220013235 U CN201220013235 U CN 201220013235U CN 202502713 U CN202502713 U CN 202502713U
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China
Prior art keywords
led display
sopc
data
controller
module
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Expired - Fee Related
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CN2012200132350U
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Chinese (zh)
Inventor
陈大明
林主峰
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Shanghai Ling Xin vision technology Limited by Share Ltd
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SHANGHAI LISTEN INFORMATION TECHNOLOGY Co Ltd
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Abstract

The utility model discloses an LED display screen controller based on an SOPC. The controller comprises a memory module, a data interaction interface module, and an FPGA chip containing an SOPC embedded system module and an LED display control logic module. The controller is characterized in that: the SOPC embedded system module reads original display data of an LED display screen through a data interaction interface, then obtains final display data of the LED display screen through data processing, and sends the final display data to the LED display control logic module to carry out display control, and finally display of the data is realized on the LED display screen; and the memory module is used for storing configuration data, an application code, data within the FPGA. According to the utility model, a single FPGA is used to construct a soft core CPU, added with a corresponding peripheral device, the control of the LED display screen is realized, and the utility model has the advantages of low cost, short development cycle, high universality, full customization of a hardware system, a long life cycle of the FPGA chip and the like.

Description

LED display controller based on SOPC
Technical field:
The utility model relates to a kind of LED display controller based on SOPC.
Background technology:
Existing middle and high end LED display controller adopts the hardware structure of MCU+FPGA+ peripheral chip more, and MCU is responsible for control tasks such as LED display controller upper machine communication, video data renewal, and FPGA is responsible for LED display turntable driving task.This scheme cost is high, and the construction cycle is long, is subject to the influence of MCU sdlc chip.
SOPC; Being System On a Programmable Chip, is to be put into total system on the silicon chip with the FPGA technology, and the research and the electronic information processing .SOPC that are used for embedded system are a kind of special embedded systems; It is SOC(system on a chip) (SOC); Promptly accomplish the main logic function of total system by single chip but it is not simple SOC, it also is a programmable system, has the design flexible mode; Can reduce, extendible, scalable, and possess the function of software and hardware at system programmable.
The utility model content:
In view of above-mentioned technical matters, the utility model provides a kind of LED display controller based on SOPC.This device adopts soft nucleus CPU of monolithic FPGA built, adds corresponding peripheral hardware, realizes the control of LED display, has advantages such as cost is low, construction cycle weak point, highly versatile, hardware system is customizable fully, the fpga chip life cycle is long.
The concrete technical scheme of the utility model is following:
Based on the LED display controller of SOPC, comprise memory module, data interaction interface module, and the fpga chip that comprises SOPC embedded system module and LED display control logic module; It is characterized in that; After said SOPC embedded system module reads the LED display raw display data through the data interaction interface; Obtain the final video data of LED display through data processing; Give LED display control logic module and show control, finally on LED display, realize showing; Said memory module is used to store FPGA internal configurations data, application code, data storage.
Furthermore; Said fpga chip inside is integrated with and comprises the soft nuclear of CPU, general input/output port (GPIO), USB controller, timer, IIC controller, SPI controller, universal asynchronous reception/dispensing device (UART), sdram controller, ethernet mac module, piece random access memory (Block RAM) and LED display drive logic, and above-mentioned these modules realize that through inner 32 buses communication each other connects.
As preferred version, the general input/output port (GPIO) in the said fpga chip is used for connecting outer button; This outer button comprises testing button and button is set, and is connected to the soft nuclear of CPU through general input/output port (GPIO), and is used for LED display test, the setting of controller correlation parameter.
As preferred version; In the said fpga chip; External RS232 or the RS485 interface of USB interface, universal asynchronous reception/dispensing device (UART) that the USB controller is external; And the external Ethernet interface of ethernet mac module, these interfaces are in order to realize the information interaction and the remote software update of control card and host computer.
As preferred version, the IIC controller in the said fpga chip is realized obtaining and being provided with of real-time clock through external real-time clock RTC chip.
As preferred version, the external SPI Flash chip that is used to store FPGA configuration data, CPU application program, video data of the SPI controller in the said fpga chip.
As preferred version, the external SDRAM chip of the sdram controller in the said fpga chip.
As preferred version; Piece random access memory in the said fpga chip (Block RAM) adopts the two-port RAM structure; Be used to store the video data of LED display; Said CPU is soft, and nuclear is written to two-port RAM with video data, and the LED display drive logic reads the data in the two-port RAM and generates the signal of control LED display.
As preferred version, said data interaction interface comprises the one or more combination in these of serial ports, USB interface, SD card and Ethernet interface.
As preferred version, said storer comprises the one or more combination in these of SDRAM storer, SRAM storer and FLASH storer.
The beneficial effect of the utility model is following:
1. the SOPC technology is used for the LED display controller,, has the design flexible mode, can reduce, extendible, scalable, and possess the function of software and hardware at system programmable than the scheme of MCU+FPGA.The systematicness price ratio is high.
2. utilize the inner Block RAM of FPGA to make up two-port RAM; Be used to store the video data of LED display; CPU is written to two-port RAM with video data; The LED display drive logic reads the data in the two-port RAM and generates the coherent signal of control LED display, can CPU be shown that from numerous and diverse LED control procedure frees like this, thereby improve the performance of controller.
3. production cost is low, maintenance rate is low, and integrated level is high, highly versatile, not influenced by sdlc chip.
Do not show control procedure 4.CPU do not participate in the strict and numerous and diverse LED of sequential, display effect is good.
Description of drawings:
Further specify the utility model below in conjunction with accompanying drawing and embodiment.
Fig. 1 is the said LED display controller overall architecture synoptic diagram based on SOPC of the utility model.
Fig. 2 is the said LED display controller detailed architecture synoptic diagram based on SOPC of the utility model.
Embodiment:
For technological means, creation characteristic that the utility model is realized, reach purpose and be easy to understand understanding with effect, below in conjunction with concrete diagram, further set forth the utility model.
As shown in Figure 1, the described LED display controller based on SOPC of the utility model comprises memory module 110, data interaction interface module 120, and the fpga chip 130 that comprises SOPC embedded system module 131 and LED display control logic module 132.Wherein, data interaction interface 120 comprises the one or more combination in these of serial ports, USB interface, SD card and Ethernet interface.Memory module 110 comprises the one or more combination in these of SDRAM storer, SRAM storer and FLASH storer.
After SOPC embedded system module 131 reads LED display 140 raw display data through data interaction interface 120; Obtain the final video data of LED display 140 through data processing; Give LED display control logic module 132 and show control, finally on LED display 140, realize showing; Memory module 110 is used to store FPGA internal configurations data, application code, data storage.
As shown in Figure 2; The whole LED displaying screen controller specifically; Be integrated with in fpga chip inside exactly and comprise the soft nuclear of CPU 201, general input/output port 202, USB controller 203, timer 2 04, IIC controller 205, SPI controller 206, universal asynchronous reception/dispensing device 207, sdram controller 208, ethernet mac module 209, piece random access memory 210 and LED display drive logic 211, above-mentioned these modules realize that through inner 32 buses 212 communication each other connects.
In addition, the relation for correlation module in the fpga chip and interface is following:
General input/output port 202 is used for connecting outer button 220; This outer button comprises testing button and button is set, and is connected to the soft nuclear 201 of CPU through general input/output port 202, and is used for LED display test, the setting of controller correlation parameter.
The USB interface 221 that USB controller 203 is external; RS232 or RS485 interface 222 that universal asynchronous reception/dispensing device 207 is external; And the external Ethernet interface 223 of ethernet mac module 209, these interfaces are in order to realize the information interaction and the remote software update of control card and host computer.
IIC controller 205 is realized obtaining and being provided with of real-time clock through external real-time clock RTC chip 224.
The SPI controller 206 external SPI Flash chips 225 that are used to store FPGA configuration data, CPU application program, video data.
Sdram controller 208 external SDRAM chips 226.
Piece random access memory 210 adopts the two-port RAM structure; Be used to store the video data of LED display 230; The soft nuclear of said CPU 201 is written to two-port RAM with video data, and LED display drive logic 211 reads the data in the two-port RAM and generates the signal of control LED display.Can CPU be shown that from numerous and diverse LED control procedure frees like this, improve the performance of controller.
More than show and described ultimate principle of the utility model and the advantage of principal character and the utility model.The technician of the industry should understand; The utility model is not restricted to the described embodiments; The principle of describing in the foregoing description and the instructions that the utility model just is described; Under the prerequisite that does not break away from the utility model spirit and scope, the utility model also has various changes and modifications, and these variations and improvement all fall in the utility model scope that requires protection.The utility model requires protection domain to be defined by appending claims and equivalent thereof.

Claims (10)

1. based on the LED display controller of SOPC, comprise memory module, data interaction interface module, and the fpga chip that comprises SOPC embedded system module and LED display control logic module; It is characterized in that; After said SOPC embedded system module reads the LED display raw display data through the data interaction interface; Obtain the final video data of LED display through data processing; Give LED display control logic module and show control, finally on LED display, realize showing; Said memory module is used to store FPGA internal configurations data, application code, data storage.
2. according to the LED display controller based on SOPC of claim 1; It is characterized in that; Said fpga chip inside is integrated with and comprises the soft nuclear of CPU, general input/output port, USB controller, timer, IIC controller, SPI controller, universal asynchronous reception/dispensing device, sdram controller, ethernet mac module, piece random access memory and LED display drive logic, and above-mentioned these modules realize that through inner 32 buses communication each other connects.
3. according to the LED display controller based on SOPC of claim 2, it is characterized in that the general input/output port in the said fpga chip is used for connecting outer button; This outer button comprises testing button and button is set, and is connected to the soft nuclear of CPU through general input/output port, and is used for LED display test, the setting of controller correlation parameter.
4. according to the LED display controller based on SOPC of claim 2; It is characterized in that; In the said fpga chip; External RS232 or the RS485 interface of USB interface, universal asynchronous reception/dispensing device that the USB controller is external, and the external Ethernet interface of ethernet mac module, these interfaces are in order to realize the information interaction and the remote software update of control card and host computer.
5. according to the LED display controller based on SOPC of claim 2, it is characterized in that the IIC controller in the said fpga chip is realized obtaining and being provided with of real-time clock through external real-time clock RTC chip.
6. according to the LED display controller based on SOPC of claim 2, it is characterized in that the external SPI Flash chip that is used to store FPGA configuration data, CPU application program, video data of the SPI controller in the said fpga chip.
7. according to the LED display controller based on SOPC of claim 2; It is characterized in that; Piece random access memory in the said fpga chip adopts the two-port RAM structure; Be used to store the video data of LED display, said CPU is soft, and nuclear is written to two-port RAM with video data, and the LED display drive logic reads the data in the two-port RAM and generates the signal of control LED display.
8. according to the LED display controller based on SOPC of claim 2, it is characterized in that the external SDRAM chip of the sdram controller in the said fpga chip.
9. according to the LED display controller based on SOPC of claim 1, it is characterized in that said data interaction interface comprises the one or more combination in these of serial ports, USB interface, SD card and Ethernet interface.
10. according to the LED display controller based on SOPC of claim 1, it is characterized in that said storer comprises the one or more combination in these of SDRAM storer, SRAM storer and FLASH storer.
CN2012200132350U 2012-01-12 2012-01-12 LED display screen controller based on SOPC Expired - Fee Related CN202502713U (en)

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103680402A (en) * 2013-09-11 2014-03-26 富顺光电科技股份有限公司 An asynchronous full color LED display control system based on an LEON3 soft core CPU
CN104103241A (en) * 2014-08-04 2014-10-15 上海斐讯数据通信技术有限公司 LED (Light Emitting Diode) display screen control system based on ARM (Asynchronous Response Mode) processor
CN104143314A (en) * 2014-06-18 2014-11-12 上海灵动微电子有限公司 Display control device
CN104658486A (en) * 2015-03-25 2015-05-27 何书专 High-compatibility LED display screen controller
CN106157888A (en) * 2016-08-31 2016-11-23 深圳市灵星雨科技开发有限公司 A kind of SOM display control program
CN106558286A (en) * 2017-02-14 2017-04-05 江苏利鼎微***有限公司 A kind of full-color LED display screen digital driving chip
CN112860621A (en) * 2021-02-10 2021-05-28 山东英信计算机技术有限公司 FPGA embedded management system, design method and medium

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103680402A (en) * 2013-09-11 2014-03-26 富顺光电科技股份有限公司 An asynchronous full color LED display control system based on an LEON3 soft core CPU
CN103680402B (en) * 2013-09-11 2015-12-23 富顺光电科技股份有限公司 A kind of asynchronous all-colour LED display control program based on LEON3 soft nucleus CPU and control method thereof
CN104143314A (en) * 2014-06-18 2014-11-12 上海灵动微电子有限公司 Display control device
CN104103241A (en) * 2014-08-04 2014-10-15 上海斐讯数据通信技术有限公司 LED (Light Emitting Diode) display screen control system based on ARM (Asynchronous Response Mode) processor
CN104658486A (en) * 2015-03-25 2015-05-27 何书专 High-compatibility LED display screen controller
CN106157888A (en) * 2016-08-31 2016-11-23 深圳市灵星雨科技开发有限公司 A kind of SOM display control program
CN106558286A (en) * 2017-02-14 2017-04-05 江苏利鼎微***有限公司 A kind of full-color LED display screen digital driving chip
CN106558286B (en) * 2017-02-14 2019-02-15 江苏利鼎微***有限公司 A kind of full-color LED display screen digital driving chip
CN112860621A (en) * 2021-02-10 2021-05-28 山东英信计算机技术有限公司 FPGA embedded management system, design method and medium

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Address after: 200072 room 94, building 149, 305 extension Road, Shanghai

Patentee after: Shanghai Ling Xin vision technology Limited by Share Ltd

Address before: 200072 room 94, building 149, 305 extension Road, Shanghai

Patentee before: Shanghai Listen Information Technology Co., Ltd.

CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20121024

Termination date: 20200112

CF01 Termination of patent right due to non-payment of annual fee