CN217335556U - Switch device - Google Patents
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- CN217335556U CN217335556U CN202220325001.3U CN202220325001U CN217335556U CN 217335556 U CN217335556 U CN 217335556U CN 202220325001 U CN202220325001 U CN 202220325001U CN 217335556 U CN217335556 U CN 217335556U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/30—Reactive power compensation
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Abstract
The utility model discloses a switching device, switching device includes: the voltage zero-crossing monitoring circuit comprises a voltage zero-crossing monitoring circuit, a logic control circuit, a switch driving circuit and a switch device; the input end of the voltage zero-crossing monitoring circuit is connected with a phase line of a power grid, and the output end of the voltage zero-crossing monitoring circuit is connected with the input end of the logic control circuit; the voltage zero-crossing monitoring circuit monitors the voltage of a phase line of the power grid in real time, forms a zero-crossing signal when the voltage zero-crossing is monitored, and sends the zero-crossing signal to the logic control circuit; the logic control circuit receives the zero-crossing signal, generates a control signal according to the zero-crossing signal and the switch operation signal and sends the control signal to the switch driving circuit, and the switch driving circuit controls the switch device to be switched on or switched off according to the control signal. The utility model discloses can control switch and only put through at voltage zero passage moment, can ensure the produced damage minimizing of putting through at every turn, and then prolong switching device's life-span, also can make the produced transient state electromagnetic noise minimizing of switch-on simultaneously.
Description
Technical Field
The utility model relates to the field of switch technology, especially, relate to a switching device.
Background
For lamps with internal circuits (starting circuit/driving circuit) including capacitor devices, such as LED lamps, self-ballasted fluorescent lamps (also called energy-saving lamps) and external ballasted fluorescent lamps (conventional fluorescent lamps), when the control switch is turned on, pulse current flowing through the switching device is generated due to charging of the capacitor in the circuit. For lamps whose impedance varies greatly with temperature, such as incandescent lamps, tungsten lamps, and halogen lamps, a pulse current is also generated when the switch is turned on. On the other hand, for other electrical appliances with similar characteristics, such as a switching power supply, a television, a display and the like, a pulse current is generated when the switch is turned on for the above two reasons.
However, this pulse current is much larger than the steady-state current, and is a major source of damage to the switching device, an important factor affecting the lifetime of the switching device, and a source of transient electromagnetic noise. The magnitude of the pulse current is related to the phase of the phase line voltage at the moment the switch is switched on: maximum at extreme phase (90 or 270 degrees), maximum damage to the switch and maximum transient electromagnetic noise; when the voltage is in a zero-crossing phase (0 degrees or 180 degrees), the damage to the switch and the transient electromagnetic noise are minimum. It is therefore important to design a switch that is only switched on at the zero crossing of the voltage.
SUMMERY OF THE UTILITY MODEL
The embodiment of the utility model provides a technical problem that will solve provides a switching device, can control switch only put through at voltage zero passage moment, can ensure the produced damage minimizing of putting through at every turn, and then extension switching device's life-span, also can make the produced transient state electromagnetic noise minimizing of switch-on simultaneously.
In order to achieve the above object, an embodiment of the present invention provides a switching device, including: the voltage zero-crossing monitoring circuit comprises a voltage zero-crossing monitoring circuit, a logic control circuit, a switch driving circuit and a switch device;
the input end of the voltage zero-crossing monitoring circuit is connected with a power grid phase line, and the output end of the voltage zero-crossing monitoring circuit is connected with the input end of the logic control circuit; the voltage zero-crossing monitoring circuit monitors the voltage of a phase line of a power grid in real time, forms a zero-crossing signal when the voltage zero-crossing is monitored, and sends the zero-crossing signal to the logic control circuit;
the output end of the logic control circuit is connected with the input end of the switch driving circuit, the output end of the switch driving circuit is connected with the switch device, and the switch device is connected with the power grid phase line; the logic control circuit receives the zero-crossing signal, generates a control signal according to the zero-crossing signal and the switch operation signal and sends the control signal to the switch driving circuit, and the switch driving circuit controls the switch device to be switched on or switched off according to the control signal.
As an improvement of the above scheme, the voltage zero-crossing monitoring circuit comprises a first resistor, a second resistor, a first NPN-type switching tube and a first diode;
the input end of the first resistor is connected with the power grid phase line, and the output end of the first resistor is connected with the base electrode of the first NPN type switching tube;
a collector of the first NPN-type switching tube is connected with an input end of the logic control circuit, the collector of the first NPN-type switching tube is further connected with an output end of the second resistor, an input end of the second resistor is connected with a power supply, and an emitter of the first NPN-type switching tube is grounded;
the anode of the first diode is connected with the emitter of the first NPN type switch tube, and the cathode of the first diode is connected with the base of the first NPN type switch tube.
As an improvement of the above scheme, the first resistor is an input resistor, and the second resistor is a pull-up resistor.
As an improvement of the above scheme, the logic control circuit includes a flip-flop and a delay module, a CLK terminal of the flip-flop is connected to a collector of the first NPN-type switching transistor, and a D terminal and/or a CLR terminal of the flip-flop are both connected to a user terminal and are configured to receive a switching operation signal of a user; the Q end of the trigger is connected with the input end of the delay module, and the output end of the delay module is connected with the input end of the switch driving circuit.
As an improvement of the above scheme, the delay module includes a third resistor, a fourth resistor, a fifth resistor, a second diode, a capacitor, and an operational amplifier;
the third resistor and the capacitor form an RC circuit; the input end of the third resistor is connected with the Q end of the trigger, the output end of the third resistor is connected with the input end of the capacitor, the input end of the capacitor is connected with the positive phase input end of the operational amplifier, and the output end of the capacitor is grounded;
the anode of the second diode is connected with the input end of the capacitor, and the cathode of the second diode is connected with the Q end of the trigger;
the input end of the fourth resistor is connected with a power supply, the output end of the fourth resistor is connected with the inverting input end of the operational amplifier, the input end of the fifth resistor is connected with the inverting input end of the operational amplifier, and the output end of the fifth resistor is grounded; the fourth resistor and the fifth resistor are both voltage dividing resistors, so that a bias voltage is formed at the inverting input end of the operational amplifier.
As an improvement of the above scheme, when the D terminal and/CLR terminal of the flip-flop receive the operation of the user terminal and are turned on, the D terminal and/CLR terminal change to a high level along with the switch operation signal, and when a zero-crossing signal occurs, the control signal output by the Q terminal of the flip-flop is a high level signal, and the high level signal is delayed by the delay module and then sent to the switch driving circuit.
As an improvement of the above scheme, when the D terminal and/or the CLR terminal of the flip-flop receive the operation of the user terminal and are turned off, the D terminal and/or the CLR terminal change to a low level along with the switch operation signal, and when a zero-crossing signal occurs, the control signal output by the Q terminal of the flip-flop is a low level signal, and the low level signal is delayed by the delay module and then sent to the switch driving circuit.
As an improvement of the above scheme, when the D end and/or the CLR end of the trigger receives that the operation of the user end is off, the D end and/or the CLR end change to a low level along with the switch operation signal, the asynchronous zero clearing function of the trigger is started, the control signal output by the Q end of the trigger is a low level signal, and the low level signal is delayed by the delay module and then sent to the switch driving circuit.
As an improvement of the above solution, the switch driving circuit includes a sixth resistor and a second NPN type switching tube;
the input end of the sixth resistor is connected with the output end of the logic control circuit, and the output end of the sixth resistor is connected with the base electrode of the second NPN type switching tube; and the collector of the second NPN type switching tube is connected with the switching device, and the emitter of the second NPN type switching tube is grounded.
As an improvement of the above scheme, when the control signal received by the switch driving circuit is a high-level signal, the second NPN-type switching tube is turned on to control the switching device to be turned on; when the control signal received by the switch driving circuit is a low-level signal, the second NPN type switching tube is turned off to control the switching device to be turned off.
Compared with the prior art, the embodiment of the utility model provides a pair of switching device's beneficial effect lies in: the voltage of a phase line of the power grid is monitored in real time through a voltage zero-crossing monitoring circuit, a zero-crossing signal is formed when the voltage zero-crossing is monitored, and the zero-crossing signal is sent to a logic control circuit. The logic control circuit receives the zero-crossing signal, generates a control signal according to the zero-crossing signal and the switch operation signal and sends the control signal to the switch driving circuit, and the switch driving circuit controls the switch device to be switched on or switched off according to the control signal. The embodiment of the utility model provides a can control switch and only put through at voltage zero passage moment, can ensure the produced damage minimizing of putting through at every turn, and then extension switching device's life-span, also can make the produced transient state electromagnetic noise minimizing of switch-on simultaneously.
Drawings
Fig. 1 is a schematic structural diagram of a preferred embodiment of a switchgear provided by the present invention;
fig. 2 is a schematic structural diagram of another preferred embodiment of a switching device provided by the present invention;
fig. 3 is a logic timing diagram of another preferred embodiment of a switching device provided by the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
In the description of the present application, the terms "first", "second", "third", etc. are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, features defined as "first," "second," "third," etc. may explicitly or implicitly include one or more of the features. In the description of the present application, "a plurality" means two or more unless otherwise specified.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
In the description of the present application, it is to be noted that, unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present invention belongs. The terminology used in the description of the present invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the present invention, and the specific meanings of the terms in the present application will be understood to those skilled in the art in a specific context.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a switch device according to a preferred embodiment of the present invention. The switching device includes: the voltage zero-crossing monitoring circuit comprises a voltage zero-crossing monitoring circuit, a logic control circuit, a switch driving circuit and a switch device;
the input end of the voltage zero-crossing monitoring circuit is connected with a power grid phase line, and the output end of the voltage zero-crossing monitoring circuit is connected with the input end of the logic control circuit; the voltage zero-crossing monitoring circuit monitors the voltage of a phase line of a power grid in real time, forms a zero-crossing signal when the voltage zero-crossing is monitored, and sends the zero-crossing signal to the logic control circuit;
the output end of the logic control circuit is connected with the input end of the switch driving circuit, the output end of the switch driving circuit is connected with the switch device, and the switch device is connected with the power grid phase line; the logic control circuit receives the zero-crossing signal, generates a control signal according to the zero-crossing signal and the switch operation signal and sends the control signal to the switch driving circuit, and the switch driving circuit controls the switch device to be switched on or switched off according to the control signal.
Specifically, in this embodiment, an input end of the voltage zero-crossing monitoring circuit is connected to a phase line of the power grid, and an output end of the voltage zero-crossing monitoring circuit is connected to an input end of the logic control circuit; the voltage zero-crossing monitoring circuit monitors the voltage of a phase line of a power grid in real time, the voltage of the phase line is subjected to level inversion at a zero crossing point, a zero-crossing signal is formed when the voltage zero crossing is monitored, and the zero-crossing signal is sent to the logic control circuit. The output end of the logic control circuit is connected with the input end of the switch driving circuit, the output end of the switch driving circuit is connected with the switch device, and the switch device is connected with the power grid phase line. The logic control circuit receives the zero-crossing signal, generates a control signal according to the zero-crossing signal and a switch operation signal of the user side and sends the control signal to the switch driving circuit, and the switch driving circuit controls the switch device to be switched on or switched off according to the control signal.
It should be noted that, the control signal in this embodiment is preferably a level signal, and the logic control circuit generates a high level signal or a low level signal according to the zero-crossing signal and the switch operation signal at the user end, and sends the high level signal or the low level signal to the switch driving circuit, so that the switch driving circuit controls the switch device to be turned on according to the high level signal, and controls the switch device to be turned off according to the low level signal.
The embodiment can control the switch to be switched on only at the zero-crossing moment of the voltage, can ensure that the damage generated by switching on each time is minimized, further prolong the service life of the switching device, and simultaneously can also minimize the transient electromagnetic noise generated by switching on the switch.
In another preferred embodiment, the voltage zero-crossing monitoring circuit comprises a first resistor, a second resistor, a first NPN-type switching tube and a first diode;
the input end of the first resistor is connected with the power grid phase line, and the output end of the first resistor is connected with the base electrode of the first NPN type switching tube;
a collector of the first NPN-type switching tube is connected with an input end of the logic control circuit, the collector of the first NPN-type switching tube is further connected with an output end of the second resistor, an input end of the second resistor is connected with a power supply, and an emitter of the first NPN-type switching tube is grounded;
the anode of the first diode is connected with the emitter of the first NPN type switch tube, and the cathode of the first diode is connected with the base of the first NPN type switch tube.
Specifically, please refer to fig. 2 and fig. 3, in which fig. 2 is a schematic structural diagram of another preferred embodiment of a switching device according to the present invention, and fig. 3 is a logic timing diagram of another preferred embodiment of a switching device according to the present invention. The voltage zero-crossing monitoring circuit comprises a first resistor R1, a second resistor R2, a first NPN type switching tube Q1 and a first diode D1; the input end of the first resistor R1 is connected to the grid phase line L, and the output end of the first resistor R1 is connected to the base 2 of the first NPN-type switching transistor Q1. The first resistor R1 controls the on/off state of the first NPN switch Q1 by using the L-line voltage as the input signal of the first NPN switch Q1. The collector 1 of the first NPN switch Q1 is connected to the input terminal of the logic control circuit, the collector 1 of the first NPN switch Q1 is further connected to the output terminal of the second resistor R2, the input terminal of the second resistor R2 is connected to the power source VCC1, and the emitter 3 of the first NPN switch Q1 is grounded. Therefore, when the voltage of the phase line (L) is positive (the phase is within 0-180 degrees), the switch tube Q1 is in a conducting state, Q1.1 and Q1.3 are connected, Q1.1 outputs low level, when the voltage of the phase line is negative (the phase is within 180 degrees and 360 degrees), the switch tube Q1 is in a disconnecting state, Q1.1 and Q1.3 are disconnected, Q1.1 is pulled high by VCC1, and high level is output. See in detail the Q1.1 and u1.clk (u1.clk is connected to Q1.1, both potentials are identical) signals in fig. 3. It can be seen that the circuit output appears level reversal at the L-line voltage zero crossing point, forming a zero crossing signal: a rising edge (180 degrees in phase) and a falling edge (360 degrees or 0 degrees in phase). This rising or falling edge can be used to trigger a logic control circuit to effect the turning on of a particular switching device at the zero-crossing time. The anode of the first diode D1 is connected to the emitter 3 of the first NPN switch Q1, and the cathode of the first diode D1 is connected to the base 2 of the first NPN switch Q1, so as to prevent the first NPN switch Q1 from being damaged due to an excessive reverse voltage when the L-line voltage is negative.
Preferably, the first resistor is an input resistor, and the second resistor is a pull-up resistor.
Specifically, the first resistor R1 is an input resistor, and controls the on/off state of the first NPN switch Q1 by using the L-line voltage as the input signal of the first NPN switch Q1. The second resistor R2 is a pull-up resistor, and clamps the indeterminate signal at a high level through a resistor, and also plays a role in current limiting.
In a further preferred embodiment, the logic control circuit includes a flip-flop and a delay module, a CLK terminal of the flip-flop is connected to a collector of the first NPN-type switching transistor, and a D terminal and/or a CLR terminal of the flip-flop are both connected to a user terminal and are configured to receive a switching operation signal of a user; the Q end of the trigger is connected with the input end of the delay module, and the output end of the delay module is connected with the input end of the switch driving circuit.
Specifically, the logic control circuit comprises a flip-flop U1 and a delay module, and the CLK terminal of the flip-flop is connected to the collector 1 of the first NPN-type switching transistor Q1. The D end and/CLR end of the trigger are connected with the user end and used for receiving the switch operation signal S of the user. When the switch-on operation signal appears, S is changed into high level, the level of the D pin and/CLR pin is pulled high, the Q pin is updated to output high level at the next zero-crossing signal, and the switch driving circuit is triggered to switch on the switch. When the disconnection operation signal appears, S is changed into low level, the level of the D pin and/CLR pin is pulled down, when the level of the/CLR pin is pulled down, the Q pin outputs low level, and the switch driving circuit is triggered to disconnect the switch. The Q end of the trigger is connected with the input end of the delay module, and the output end of the delay module is connected with the input end of the switch driving circuit.
It should be noted that the switching devices can be divided into fast-acting switches and slow-acting switches according to the time required for the switching devices to act. For a fast acting switch, because the switch action has almost no delay (the delay is far less than the voltage period of a power grid, the delay has no influence on the engineering, and the engineering can treat the delay as the delay does not exist), the switch is driven to be switched on at the voltage zero crossing point, and the effect is that the switch is switched on at the voltage zero crossing point. For the slow switch, because the switching action needs obvious time (time is compared with the voltage period of the power grid and cannot be ignored), the switch is driven to be switched on at the zero crossing point of the voltage, the switch can be switched on after a period of time delay after the zero crossing point of the voltage, and finally the following two conditions exist:
(1) the time delay is exactly an integral multiple of the half period of the voltage, and the switch is turned on exactly at the zero crossing of the voltage.
(2) The time delay experienced is not an integer multiple of a half cycle of the voltage and the switch is turned on at a non-voltage zero crossing.
In general, the operation delay of the slow switch is not exactly an integral multiple of a half-period of the voltage. Therefore, in order to avoid the situation of the above-mentioned case 2, the delay module is required to artificially add a time delay T1, and by adjusting T1, the slow switch turn-on delay T2 plus T1 can be exactly an integer multiple of a half period of the voltage, and the switch can be turned on at the zero crossing point of the voltage. Referring to fig. 3, T1 is the delay time of the delay module; t2 is the time required for the switching device to turn on; t3 is the time required for the switching device to turn off, and T1+ T2 is an integer multiple of a half cycle of the grid voltage, and can still turn on at the zero crossing of the voltage despite the delayed turn on of the slow switch. When the switching device is a fast switch, the delay time T1 of the delay block is 0, in which case the delay block may be eliminated.
It should be noted that the logic control in this embodiment is not limited to the D-type flip-flop, and may also be other logic devices, such as an MCU, an FPGA, and the like. For such complex logic devices as MCU, FPGA, etc., the function of the delay module can be realized in the device itself without additional external circuit.
In another preferred embodiment, the delay module comprises a third resistor, a fourth resistor, a fifth resistor, a second diode, a capacitor and an operational amplifier;
the third resistor and the capacitor form an RC circuit; the input end of the third resistor is connected with the Q end of the trigger, the output end of the third resistor is connected with the input end of the capacitor, the input end of the capacitor is connected with the positive phase input end of the operational amplifier, and the output end of the capacitor is grounded;
the anode of the second diode is connected with the input end of the capacitor, and the cathode of the second diode is connected with the Q end of the trigger;
the input end of the fourth resistor is connected with a power supply, the output end of the fourth resistor is connected with the inverting input end of the operational amplifier, the input end of the fifth resistor is connected with the inverting input end of the operational amplifier, and the output end of the fifth resistor is grounded; the fourth resistor and the fifth resistor are both voltage dividing resistors, so that a bias voltage is formed at the inverting input end of the operational amplifier.
Specifically, the delay module includes a third resistor R3, a fourth resistor R4, a fifth resistor R5, a second diode D2, a capacitor C1, and an operational amplifier U2.
The third resistor R3 and the capacitor C1 form an RC circuit; the input end of the third resistor R3 is connected with the Q end of the trigger, the output end of the third resistor R3 is connected with the input end of the capacitor C1, the input end of the capacitor C1 is connected with the non-inverting input end of the operational amplifier U2, and the output end of the capacitor C1 is grounded. When the Q terminal of the flip-flop outputs a high level, the capacitor C1 is charged through the third resistor R3, the capacitor C1 is charged to a voltage higher than the bias voltage at the inverting input terminal of the operational amplifier U2, and the out terminal of the operational amplifier outputs a high level, triggering the switch driving circuit. The time difference from the time when the Q end of the flip-flop outputs the high level to the time when the out end of the operational amplifier outputs the high level is the delay time T1 of the delay module. The anode of the second diode D2 is connected to the input terminal of the capacitor C1, and the cathode of the second diode D2 is connected to the Q terminal of the flip-flop. The second diode D2 functions as: when the Q terminal of the flip-flop goes low, the charge of the capacitor C1 can be discharged quickly. The input end of the fourth resistor R4 is connected with a power supply VCC1, the output end of the fourth resistor R4 is connected with the inverting input end of the operational amplifier U2, the input end of the fifth resistor R5 is connected with the inverting input end of the operational amplifier U2, and the output end of the fifth resistor R5 is grounded. The fourth resistor R4 and the fifth resistor R5 are voltage dividing resistors, so that the inverting input terminal of the operational amplifier U2 forms a bias voltage.
In another preferred embodiment, when the D terminal and/CLR terminal of the flip-flop receive the operation of the user terminal as on, the D terminal and/CLR terminal changes to high level along with the switch operation signal, and when a zero-crossing signal occurs, the control signal output by the Q terminal of the flip-flop is a high level signal, and the high level signal is sent to the switch driving circuit after being delayed by the delay module.
Specifically, when the U1.d end and the U1./CLR end of the flip-flop receive the operation of the user side and are switched on, the U1.d end and the U1./CLR end change to a high level along with the switch operation signal S, and when a zero-crossing signal occurs, the control signal output by the U1.q end of the flip-flop is a high level signal, and the high level signal is delayed by the delay module and then sent to the switch driving circuit.
In another preferred embodiment, when the D terminal and/CLR terminal of the flip-flop receive the operation of the user terminal as off, the D terminal and/CLR terminal changes to low level along with the switch operation signal, and when a zero-crossing signal occurs, the control signal output by the Q terminal of the flip-flop is a low level signal, and the low level signal is delayed by the delay module and then sent to the switch driving circuit.
Specifically, when the U1.d end and the U1./CLR end of the flip-flop receive that the operation of the user end is off, the U1.d end and the U1./CLR end change to low level along with the switch operation signal S, and when a zero-crossing signal occurs, the control signal output by the U1.q end of the flip-flop is a low level signal, and the low level signal is delayed by the delay module and then sent to the switch driving circuit.
In another preferred embodiment, when the D terminal and/or the CLR terminal of the flip-flop receive that the operation of the user terminal is off, the D terminal and/or the CLR terminal changes to a low level along with the switch operation signal, the asynchronous clear function of the flip-flop starts, the control signal output by the Q terminal of the flip-flop is a low level signal, and the low level signal is delayed by the delay module and then sent to the switch driving circuit.
Specifically, when the U1.d end and the U1./CLR end of the flip-flop receive the operation of the user side and are turned off, the U1.d end and the U1./CLR end change to low level along with the switch operation signal S of the user, at this time, the asynchronous zero clearing function of the flip-flop is started, the control signal output by the U1.q end of the flip-flop is a low level signal, and the low level signal is delayed by the delay module and then sent to the switch driving circuit. It should be noted that if the flip-flop has an asynchronous clear function, when the/CLR pin is low, the pin Q immediately goes low (regardless of whether the pin D is high or low). If the trigger does not have the asynchronous zero clearing function, the Q end of the trigger can output a low level signal when the zero crossing signal occurs.
In a further preferred embodiment, the switch driving circuit includes a sixth resistor and a second NPN-type switching tube;
the input end of the sixth resistor is connected with the output end of the logic control circuit, and the output end of the sixth resistor is connected with the base electrode of the second NPN type switching tube; and the collector of the second NPN type switching tube is connected with the switching device, and the emitter of the second NPN type switching tube is grounded.
In another preferred embodiment, when the control signal received by the switch driving circuit is a high-level signal, the second NPN-type switching tube is turned on to control the switching device to be turned on; when the control signal received by the switch driving circuit is a low-level signal, the second NPN type switching tube is turned off to control the switching device to be turned off.
Specifically, the switch driving circuit includes a sixth resistor R6 and a second NPN switching transistor Q2. The input end of the sixth resistor R6 is connected with the output end of the logic control circuit, and the output end of the sixth resistor R6 is connected with the base 2 of the second NPN-type switching tube Q2; the collector 1 of the second NPN switching transistor Q2 is connected to the switching device SW1, and the emitter 3 of the second NPN switching transistor Q2 is grounded. When the level signal received by the switch driving circuit is at a high level, the second NPN-type switching transistor Q2 is turned on, and the switching device SW1 is controlled to be turned on; when the level signal received by the switch driving circuit is low, the second NPN switching transistor Q2 is turned off, and the switching device SW1 is controlled to be turned off.
The embodiment of the utility model provides a switching device, through the input of voltage zero cross monitoring circuit is connected with the electric wire netting phase line, the output of voltage zero cross monitoring circuit with the input of logic control circuit is connected; the voltage zero-crossing monitoring circuit monitors the voltage of a phase line of a power grid in real time, forms a zero-crossing signal when the voltage zero-crossing is monitored, and sends the zero-crossing signal to the logic control circuit; the output end of the logic control circuit is connected with the input end of the switch driving circuit, the output end of the switch driving circuit is connected with the switch device, and the switch device is connected with the power grid phase line and the power supply; the logic control circuit receives the zero-crossing signal, generates a control signal according to the zero-crossing signal and the switch operation signal and sends the control signal to the switch driving circuit, and the switch driving circuit controls the switch device to be switched on or switched off according to the control signal. The embodiment of the utility model provides a can control switch and only put through at voltage zero passage moment, can ensure the produced damage minimizing of putting through at every turn, and then extension switching device's life-span, also can make the produced transient state electromagnetic noise minimizing of switch-on simultaneously.
The foregoing is a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of improvements and decorations can be made without departing from the principle of the present invention, and these improvements and decorations are also considered as the protection scope of the present invention.
Claims (10)
1. A switching device, comprising: the voltage zero-crossing monitoring circuit comprises a voltage zero-crossing monitoring circuit, a logic control circuit, a switch driving circuit and a switch device;
the input end of the voltage zero-crossing monitoring circuit is connected with a power grid phase line, and the output end of the voltage zero-crossing monitoring circuit is connected with the input end of the logic control circuit; the voltage zero-crossing monitoring circuit monitors the voltage of a phase line of a power grid in real time, forms a zero-crossing signal when the voltage zero-crossing is monitored, and sends the zero-crossing signal to the logic control circuit;
the output end of the logic control circuit is connected with the input end of the switch driving circuit, the output end of the switch driving circuit is connected with the switch device, and the switch device is connected with the power grid phase line; the logic control circuit receives the zero-crossing signal, generates a control signal according to the zero-crossing signal and the switch operation signal and sends the control signal to the switch driving circuit, and the switch driving circuit controls the switch device to be switched on or switched off according to the control signal.
2. The switching device according to claim 1, wherein the voltage zero crossing monitoring circuit comprises a first resistor, a second resistor, a first NPN-type switching tube, and a first diode;
the input end of the first resistor is connected with the power grid phase line, and the output end of the first resistor is connected with the base electrode of the first NPN type switching tube;
a collector of the first NPN-type switching tube is connected with an input end of the logic control circuit, the collector of the first NPN-type switching tube is further connected with an output end of the second resistor, an input end of the second resistor is connected with a power supply, and an emitter of the first NPN-type switching tube is grounded;
the anode of the first diode is connected with the emitter of the first NPN type switch tube, and the cathode of the first diode is connected with the base of the first NPN type switch tube.
3. The switching device of claim 2, wherein the first resistor is an input resistor and the second resistor is a pull-up resistor.
4. The switching device according to claim 2, wherein the logic control circuit comprises a flip-flop and a delay module, a CLK terminal of the flip-flop is connected to a collector of the first NPN-type switching transistor, and a D terminal and/or a CLR terminal of the flip-flop are connected to a user terminal for receiving a switching operation signal of a user; the Q end of the trigger is connected with the input end of the delay module, and the output end of the delay module is connected with the input end of the switch driving circuit.
5. The switching device of claim 4, wherein the delay module comprises a third resistor, a fourth resistor, a fifth resistor, a second diode, a capacitor, and an operational amplifier;
the third resistor and the capacitor form an RC circuit; the input end of the third resistor is connected with the Q end of the trigger, the output end of the third resistor is connected with the input end of the capacitor, the input end of the capacitor is connected with the positive phase input end of the operational amplifier, and the output end of the capacitor is grounded;
the anode of the second diode is connected with the input end of the capacitor, and the cathode of the second diode is connected with the Q end of the trigger;
the input end of the fourth resistor is connected with a power supply, the output end of the fourth resistor is connected with the inverting input end of the operational amplifier, the input end of the fifth resistor is connected with the inverting input end of the operational amplifier, and the output end of the fifth resistor is grounded; the fourth resistor and the fifth resistor are both voltage dividing resistors, so that a bias voltage is formed at the inverting input end of the operational amplifier.
6. The switching device according to claim 4, wherein when the D terminal and/CLR terminal of the flip-flop receive the operation of the user terminal as on, the D terminal and/CLR terminal changes to high level along with the switching operation signal, and when the zero-crossing signal occurs, the control signal output by the Q terminal of the flip-flop is a high level signal, and the high level signal is sent to the switch driving circuit after being delayed by the delay module.
7. The switching device according to claim 4, wherein when the D terminal and/CLR terminal of the flip-flop receive the operation of the user terminal as off, the D terminal and/CLR terminal changes to low level along with the switching operation signal, and when the zero-crossing signal occurs, the control signal output by the Q terminal of the flip-flop is a low level signal, and the low level signal is sent to the switch driving circuit after being delayed by the delay module.
8. The switching device according to claim 4, wherein when the D terminal and/or the CLR terminal of the flip-flop receive the operation of the user terminal as off, the D terminal and/or the CLR terminal changes to a low level along with the switching operation signal, the asynchronous clear function of the flip-flop is started, the control signal output by the Q terminal of the flip-flop is a low level signal, and the low level signal is sent to the switch driving circuit after being delayed by the delay module.
9. The switching device according to claim 1, wherein the switch driving circuit includes a sixth resistor and a second NPN-type switching tube;
the input end of the sixth resistor is connected with the output end of the logic control circuit, and the output end of the sixth resistor is connected with the base electrode of the second NPN type switching tube; and the collector of the second NPN type switching tube is connected with the switching device, and the emitter of the second NPN type switching tube is grounded.
10. The switching device according to claim 9, wherein when the control signal received by the switch driving circuit is a high level signal, the second NPN type switching transistor is turned on to control the switching device to be turned on; when the control signal received by the switch driving circuit is a low-level signal, the second NPN type switching tube is turned off to control the switching device to be turned off.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220325001.3U CN217335556U (en) | 2022-02-17 | 2022-02-17 | Switch device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220325001.3U CN217335556U (en) | 2022-02-17 | 2022-02-17 | Switch device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117054730A (en) * | 2023-10-11 | 2023-11-14 | 拓尔微电子股份有限公司 | Zero-crossing detection circuit, motor driving circuit and zero-crossing detection method |
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2022
- 2022-02-17 CN CN202220325001.3U patent/CN217335556U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117054730A (en) * | 2023-10-11 | 2023-11-14 | 拓尔微电子股份有限公司 | Zero-crossing detection circuit, motor driving circuit and zero-crossing detection method |
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