CN212909461U

CN212909461U - Drive circuit structure of multichannel PWM output

Info

Publication number: CN212909461U
Application number: CN202022145206.7U
Authority: CN
Inventors: 陈安武; 周龙; 白洪超
Original assignee: Qingdao Ainuo Instrument Co ltd
Current assignee: Qingdao Ainuo Instrument Co ltd
Priority date: 2020-09-25
Filing date: 2020-09-25
Publication date: 2021-04-06
Anticipated expiration: 2030-09-25

Abstract

The utility model relates to a drive circuit structure of multipath PWM output, DA voltage signal given by a singlechip is transmitted to an operational amplifier circuit, and the voltage signal amplified by the operational amplifier circuit is transmitted to a high-speed buffer; the PWM signal given by the single chip microcomputer passes through the optical coupling isolation circuit, the driving signal is connected with the MOS tube, the source electrode of the MOS tube is connected with the high-speed buffer, and the output end of the high-speed buffer is connected with the PWM output interface circuit. The utility model discloses utilize a singlechip resource to drive multichannel PWM output circuit simultaneously, saved the resource, improved efficiency of software testing to can set up corresponding parameter, need not artifical manual test, satisfy automatic actual test demand more; compared with the traditional direct drive and signal generator mode, the test speed is higher, the cost is lower, the volume is smaller, the system integration is convenient, and the method can be widely applied to an automatic test system; the problem that multichannel PWM drive test exists has been solved to this, and the cost has been reduced simultaneously, has realized electrical isolation, uses convenient more high-efficient.

Description

Drive circuit structure of multichannel PWM output

Technical Field

The utility model belongs to the technical field of automatic control, concretely relates to drive circuit structure of multichannel PWM output.

Background

PWM (pulse width modulation) is a technique that uses the digital output of a microprocessor and performs control by an analog circuit, and is now widely used in the fields of measurement, communication, power control and conversion, and the like. Currently, in the detection industry, there is a strong demand for a multi-path PWM driving technology, such as PWM dimming of an LED driving circuit, driving a MOS switch, and the like. When multiple paths of signals are driven through multiple paths of PWM, multiple signal generators are often adopted in the traditional design scheme to meet requirements, although the precision is high, the scheme is high in cost and difficult to integrate, and large-scale application is difficult due to the high cost. When multiple PWM driving signals are needed, the cost of the signal generator is too high, and the signal generator is not easy to be accepted by customers.

In the scheme of PWM waveform synthesis based on the application technology of a digital-to-analog chip and an inverter outside a single chip, the driving PWM is also realized by applying voltage to a source electrode, providing a driving signal to a grid electrode and controlling an MOS tube to be switched on and off to output a PWM waveform. However, the scheme has the greatest disadvantage that only one PWM drive can be supported, the circuit is complex, an external digital-to-analog chip is required, and the cost is high.

If through the direct output PWM ripples of singlechip, can have the not enough problem of driving force, drive circuit and by also not keep apart between the drive circuit simultaneously, the easy distortion that takes place of PWM output waveform also causes main control chip's damage easily.

SUMMERY OF THE UTILITY MODEL

For solving the technical problem, the utility model provides a drive circuit structure of multichannel PWM output utilizes singlechip and drive circuit to build the multichannel PWM output circuit of constituteing, and integration that can be more convenient is in test system, and drive circuit keeps apart completely with master control circuit, can export multichannel PWM simultaneously to can set up amplitude, frequency, duty cycle isoparametric, the precision also satisfies the industrial test requirement. The utility model discloses the technical scheme who adopts as follows:

a drive circuit structure of multi-path PWM output is disclosed, wherein a DA voltage signal given by a singlechip is transmitted to an operational amplifier circuit, and the voltage signal amplified by the operational amplifier circuit is transmitted to a high-speed buffer; the PWM signal that the singlechip provided passes through opto-isolator circuit, and drive signal is connected with the MOS pipe, and MOS pipe source electrode is connected with the high-speed buffer, and the output of high-speed buffer connects PWM output interface circuit.

After the PWM waveform output by the single chip microcomputer is isolated by the optical coupler, the voltage is output to the grid electrode of the MOS tube, the given voltage of the driving circuit is also given by the DA inside the single chip microcomputer, the signal is amplified in proportion through the operational amplifier circuit, the voltage signal is given to the source electrode of the MOS tube, the driving capability is increased after the output passes through the high-speed buffer, and the multi-path PWM output circuit is driven by one single chip microcomputer resource.

The utility model has the advantages that:

the utility model discloses utilize a singlechip resource to drive multichannel PWM output circuit simultaneously, saved the resource, improved efficiency of software testing to can set up corresponding parameter, need not artifical manual test, satisfy automatic actual test demand more.

Compare traditional direct drive and signal generator mode, the utility model discloses test speed is faster, and the cost is lower, and the volume is littleer, makes things convenient for system integration, can obtain wide application in automatic test system.

The utility model provides a problem that multichannel PWM drive test exists, the cost has been reduced simultaneously, has realized electrical isolation, uses more high-efficient convenience.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below. It should be apparent that the drawings in the following description are illustrative of some embodiments of the invention, and that those skilled in the art will be able to derive other drawings without inventive step from these drawings, which are within the scope of the present application.

Fig. 1 is a schematic diagram of a driving circuit structure according to an embodiment of the present invention;

fig. 2 is a schematic diagram of a driving circuit according to an embodiment of the present invention.

Detailed Description

The following describes embodiments of the present invention with reference to the drawings.

As shown in fig. 1, it is a schematic diagram of a driving circuit structure according to an embodiment of the present invention, and fig. 1 shows a circuit structure of a PWM driving circuit branch. DA voltage signals given by a single chip Microcomputer (MCU) are transmitted to an operational amplifier circuit through R1, and a resistor R1 is used for balancing impedance of an input end; the amplification of the operational amplifier circuit is 1+ (R3/R2), and the specific amplification depends on the test requirements, such as: 3 times of amplification is designed to improve the output voltage value; the amplified voltage signal is transmitted to a cache buffer through R4, a resistor R4 is used for playing a role of current limiting when the MOS is conducted, and the cache buffer is used for improving the driving capability. After a PWM signal provided by a single chip Microcomputer (MCU) passes through a push-pull circuit consisting of an NPN and a PNP, a driving signal is connected with an MOS (metal oxide semiconductor) tube through an optical coupling isolation circuit, a source electrode of the MOS tube is connected with a high-speed buffer, and an output end of the high-speed buffer is connected with a PWM output interface circuit through a fast recovery fuse.

Through the isolation of the high-speed optical coupler and the push-pull circuit, the isolation of the driving signal in the figure 1 is realized, and the driving capability is enhanced. The drive is obtained by the power of outside independent power supply system, can not cause the not enough problem of drive current because the singlechip driving capability is not enough, and the switching on of control MOS pipe that enough big drive current can be quick to realize the modulation of high frequency PWM waveform.

The MOS tube is controlled to be switched on and off by controlling the grid voltage of the MOS tube through the driving signal, so that the high and low levels of output are controlled, the driving capability is greatly improved through the driving amplification of the high-speed buffer, and the quick recovery fuse of the back-stage series can prevent the circuit damage caused by the short circuit of the output end. Based on the above principle, as long as the driving capability is large enough, multiple paths of PWM waveforms can be driven and output simultaneously. Fig. 1 shows only one circuit structure of PWM waveform output, several PWM waveforms are needed in practical application to correspondingly access and set several outputs, and the maximum number of access paths is affected by factors such as the frequency of PWM modulation.

As shown in fig. 2, is a schematic diagram of a driving circuit according to an embodiment of the present invention. If the PWM waveform output by the singlechip is directly output by the singlechip, the driving capability is not enough. The utility model discloses a PWM waveform of singlechip output is after the opto-coupler is kept apart, and output voltage gives the grid of MOS pipe, and drive circuit's given voltage also is given by the inside DA of singlechip, carries out the proportion amplification to the signal through the fortune circuit of putting, and voltage signal gives the source electrode of MOS pipe, and the output has increased the driving force behind the high-speed buffer to add the fast recovery fuse at the output, can protect the back stage circuit after the output short circuit.

Finally, it is to be noted that: the above embodiments are only specific embodiments of the present invention, and are not intended to limit the technical solutions of the present invention, and the scope of the present invention is not limited thereto. Those skilled in the art will understand that: any person skilled in the art can modify or easily conceive the technical solutions described in the foregoing embodiments or equivalent substitutes for some technical features within the technical scope of the present disclosure; such modifications, changes or substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.

Claims

1. A drive circuit structure of multi-path PWM output is characterized in that a DA voltage signal given by a single chip microcomputer is transmitted to an operational amplifier circuit, and the voltage signal amplified by the operational amplifier circuit is transmitted to a high-speed buffer; the PWM signal given by the single chip microcomputer passes through the optical coupling isolation circuit, the driving signal is connected with the MOS tube, the source electrode of the MOS tube is connected with the high-speed buffer, and the output end of the high-speed buffer is connected with the PWM output interface circuit.

2. The driving circuit structure of multi-channel PWM output according to claim 1, wherein a PWM signal given by the single chip microcomputer is connected with the opto-isolator circuit after passing through the push-pull circuit.

3. The driving circuit structure of claim 2, wherein the push-pull circuit comprises an NPN and a PNP.

4. The driving circuit structure of multi-channel PWM output according to claim 1, wherein the DA voltage signal given by the single chip microcomputer is transmitted to the operational amplifier circuit through R1.

5. The driving circuit structure of claim 1, wherein the voltage signal amplified by the operational amplifier circuit is transmitted to the high-speed buffer via R4.

6. A multi-PWM output driving circuit structure according to any one of claims 1-5, wherein the output terminal of the cache is connected to the PWM output interface circuit via a fast recovery fuse.