CN212726972U - Hysteresis voltage configurable comparator - Google Patents
Hysteresis voltage configurable comparator Download PDFInfo
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- CN212726972U CN212726972U CN202021142496.3U CN202021142496U CN212726972U CN 212726972 U CN212726972 U CN 212726972U CN 202021142496 U CN202021142496 U CN 202021142496U CN 212726972 U CN212726972 U CN 212726972U
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Abstract
The utility model discloses a configurable comparator of hysteresis voltage, include: the reference voltage circuit is used for respectively providing a first reference voltage and a second reference voltage for the differential input circuit and the cascode circuit; a differential input circuit comprising: a first differential input stage and a second differential input stage; and the cascode circuit is used for amplifying the output voltage of the first differential input stage and the voltage of the second differential input stage and then sending the amplified voltages to the comparator body. The utility model discloses can realize the configurable of hysteresis voltage, can carry out accurate regulation to height conversion threshold value, when satisfying system design, to the demand of different hysteresis voltages.
Description
Technical Field
The utility model relates to an analog integrated circuit field specifically relates to configurable comparator of hysteresis voltage.
Background
The hysteresis comparator is a CMOS comparator with hysteresis loop transfer characteristics. A positive feedback network is generally introduced on the basis of an inverting input single-threshold voltage comparator, so that an inverting input hysteresis comparator with double threshold values is formed. The threshold voltage of such a comparator varies with the output voltage due to feedback. Its sensitivity is lower, but its anti-interference ability is greatly raised.
Typically, the comparator operates in a noisy environment, and if the comparator is fast enough and the signal is noisy enough, the output will also be noisy, affecting the performance of the signal detection. In certain cases, a hysteresis characteristic is introduced in the comparator, the hysteresis voltage having to be greater than or equal to the maximum noise amplitude.
The hysteresis comparator is widely applied to the fields of communication circuits, signal detection and the like, can reduce the sensitivity of interference signals, and realizes waveform transformation and signal shaping. The hysteresis comparator has different comparison characteristics of positive and negative thresholds, and can be used in a voltage amplitude discrimination circuit. The hysteresis comparator has a plurality of circuit structures, and fig. 1a shows a conventional hysteresis comparator composed of a feedback resistor. In the hysteresis voltage comparator, as long as the change amplitude of the input signal voltage caused by the noise voltage does not exceed the hysteresis voltage, the stability of the output state can be ensured.
The circuit has a simple structure, the width of the voltage hysteresis is related to the size of an internal MOS tube and process parameters, so the width of the hysteresis voltage is not accurate enough, and some hysteresis comparators of a CMOS integrated circuit design method, such as the hysteresis comparator shown in FIG. 2, generate the hysteresis voltage by adjusting a feedback signal.
The hysteresis comparator is usually a fixed hysteresis voltage, and if the hysteresis voltage of the comparator needs to be adjusted, an external feedback circuit network needs to be redesigned during circuit design, so that the complexity of the circuit is increased, and the design is repeated and the cost is wasted.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a configurable comparator of hysteresis voltage and hysteresis voltage's control method, this configurable comparator of hysteresis voltage and hysteresis voltage's control method can realize the configurable of hysteresis voltage, can carry out accurate regulation to height conversion threshold value, when satisfying the system design, to the demand of different hysteresis voltages.
In order to achieve the above object, the present invention provides a configurable hysteresis voltage comparator, including: the reference voltage circuit is used for respectively providing a first reference voltage and a second reference voltage for the differential input circuit and the cascode circuit; a differential input circuit comprising: a first differential input stage comprising: the voltage regulator comprises a first NOT gate, a second NOT gate, a first switching tube, a second switching tube, a first input geminate transistor and a first hysteresis voltage regulating tube; the input end of the first not gate is connected to the output end of the comparator body, the output end of the first not gate is connected to the input end of the second not gate and the grid electrode of the second switch tube, the output end of the second not gate is connected to the grid electrode of the first switch tube, the drain electrode of the first switch is respectively connected to the first voltage input end of the comparator body and the grid electrode of the first input geminate transistor, the source electrode of the first switch tube is respectively connected to the drain electrode of the second switch tube and the grid electrode of the first hysteresis voltage adjusting tube, the drain electrode of the first hysteresis voltage adjusting tube is respectively connected to the drain electrode of the first input geminate transistor and the cascode circuit, and the source electrode of the first hysteresis voltage adjusting tube is connected to the source electrode of the first input geminate transistor; a second differential input stage comprising: the first non-gate, the first switching tube, the second input geminate transistor and the second hysteresis voltage adjusting tube are connected in series; the input end of the third not gate is connected to the output end of the comparator body and the grid of the fourth switching tube, the output end of the third not gate is connected to the grid of the third switching tube, the drain of the third switch is respectively connected to the second voltage input end of the comparator body and the grid of the second input pair tube, the source of the third switching tube is respectively connected to the drain of the fourth switching tube and the grid of the second hysteresis voltage adjusting tube, the drain of the second hysteresis voltage adjusting tube is respectively connected to the drain of the second input pair tube and the cascode circuit, and the source of the second hysteresis voltage adjusting tube is connected to the source of the second input pair tube; and the cascode circuit is used for amplifying the output voltage of the first differential input stage and the voltage of the second differential input stage and then sending the amplified voltages to the comparator body.
Preferably, at least one of the following is a MOS transistor: the voltage regulator comprises a first switch tube, a second switch tube, a first input geminate transistor, a first hysteresis voltage regulating tube, a third switch tube, a fourth switch tube, a second input geminate transistor and a second hysteresis voltage regulating tube.
Preferably, the cascode circuit is formed by connecting a plurality of MOS transistors.
Preferably, the comparator body is a two-stage open-loop comparator.
In addition, the present embodiment further provides a method for controlling a hysteresis voltage, using the configurable hysteresis voltage comparator, where the method for controlling the hysteresis voltage includes: when the output level of the comparator body is low level, the size of the input tube of the first differential input stage is a first input pair tube, and the size of the input tube of the second differential input stage is the sum of a second input pair tube and a second hysteresis voltage adjusting tube; and when the output level of the comparator body is high level, the size of the input tube of the first differential input stage is the sum of the first input pair tube and the first hysteresis voltage adjusting tube, and the size of the input tube of the second differential input stage is the second input pair tube.
According to the above technical scheme, the utility model discloses utilize differential input circuit to produce configurable hysteresis voltage, when in-service use, can select suitable first input geminate transistor, first hysteresis voltage control tube and second input geminate transistor, the hysteresis voltage control tube of second according to actual conditions, can select suitable hysteresis voltage grade according to the size of different signal input and noise, improve the accuracy of comparator, reduce the interference of noise.
Other features and advantages of the present invention will be described in detail in the detailed description which follows.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
FIG. 1a shows a conventional hysteresis comparator comprising a feedback resistor;
FIG. 1b is a graph illustrating the effect of the hysteresis voltage generated in FIG. 1 a;
FIG. 2 is a prior art hysteretic comparator for generating a hysteretic voltage by adjusting a feedback signal; and
fig. 3 is a circuit diagram illustrating a hysteresis voltage configurable comparator of the present invention.
Detailed Description
The following detailed description of the embodiments of the present invention will be made with reference to the accompanying drawings. It is to be understood that the description of the embodiments herein is for purposes of illustration and explanation only and is not intended to limit the invention.
Before the present embodiment is described in detail, it is first briefly said that the hysteresis comparator is usually a fixed hysteresis voltage, and if the hysteresis voltage of the comparator needs to be adjusted, the external feedback circuit network needs to be redesigned during circuit design, which increases the complexity of the circuit and causes design duplication and waste of money. In the related art, improvement needs to be performed on the basis of a schmitt trigger circuit to adjust the current of the schmitt trigger circuit, but the high-low switching threshold level of the schmitt trigger circuit is affected by the production process, the power supply voltage and the temperature, the hysteresis width is not accurate enough, a large defect exists in practical application, and the precision required by design is difficult to achieve in application.
In this embodiment, the present invention provides a circuit connection diagram of a configurable hysteresis voltage comparator, the configurable hysteresis voltage comparator comprising: the reference voltage circuit is used for respectively providing a first reference voltage and a second reference voltage for the differential input circuit and the cascode circuit; a differential input circuit comprising: a first differential input stage comprising: the voltage regulator comprises a first NOT gate, a second NOT gate, a first switching tube, a second switching tube, a first input geminate transistor and a first hysteresis voltage regulating tube; the input end of the first not gate is connected to the output end of the comparator body, the output end of the first not gate is connected to the input end of the second not gate and the grid electrode of the second switch tube, the output end of the second not gate is connected to the grid electrode of the first switch tube, the drain electrode of the first switch is respectively connected to the first voltage input end of the comparator body and the grid electrode of the first input geminate transistor, the source electrode of the first switch tube is respectively connected to the drain electrode of the second switch tube and the grid electrode of the first hysteresis voltage adjusting tube, the drain electrode of the first hysteresis voltage adjusting tube is respectively connected to the drain electrode of the first input geminate transistor and the cascode circuit, and the source electrode of the first hysteresis voltage adjusting tube is connected to the source electrode of the first input geminate transistor; a second differential input stage comprising: the first non-gate, the first switching tube, the second input geminate transistor and the second hysteresis voltage adjusting tube are connected in series; the input end of the third not gate is connected to the output end of the comparator body and the grid of the fourth switching tube, the output end of the third not gate is connected to the grid of the third switching tube, the drain of the third switch is respectively connected to the second voltage input end of the comparator body and the grid of the second input pair tube, the source of the third switching tube is respectively connected to the drain of the fourth switching tube and the grid of the second hysteresis voltage adjusting tube, the drain of the second hysteresis voltage adjusting tube is respectively connected to the drain of the second input pair tube and the cascode circuit, and the source of the second hysteresis voltage adjusting tube is connected to the source of the second input pair tube; and the cascode circuit is used for amplifying the output voltage of the first differential input stage and the voltage of the second differential input stage and then sending the amplified voltages to the comparator body.
Preferably, at least one of the following is a MOS transistor: the voltage regulator comprises a first switch tube, a second switch tube, a first input geminate transistor, a first hysteresis voltage regulating tube, a third switch tube, a fourth switch tube, a second input geminate transistor and a second hysteresis voltage regulating tube.
Preferably, the cascode circuit is formed by connecting a plurality of MOS transistors.
Preferably, the comparator body is a two-stage open-loop comparator.
The circuit structure in this embodiment solves the problems of inaccurate and non-configurable hysteresis voltage in the conventional comparator structure, can change the size of the adjusting tube according to the actual design index requirement to achieve the purpose of adjusting the hysteresis voltage, and can also adopt a plurality of adjusting tubes to select and switch to achieve the configurable characteristic of the hysteresis voltage. The utility model discloses a size of the input geminate transistor of adjustment comparator adopts the design of asymmetric geminate transistor, introduces offset voltage and cooperates the comparator state to carry out the selection of adjusting pipe operating condition through the initiative, forms configurable hysteresis voltage.
Fig. 3 is a circuit diagram of an embodiment, as shown in fig. 3, wherein the input terminals INP and INN are the first voltage input terminal and the second voltage input terminal of the comparator, respectively, and the size and characteristics of the first input pair transistor M4 and the second input pair transistor M12 connected to the two input terminals are identical; the sizes of the first hysteresis voltage adjusting tube M3 and the second hysteresis voltage adjusting tube M13 are smaller than M4 and M12, and the specific parameters can be selected according to the requirement of the comparator circuit for the hysteresis voltage.
In fig. 3, BIAS is a reference voltage circuit for generating two reference voltages VBN and VB 2; the first differential input stage capable of configuring hysteresis voltage is composed of NOT gates INV1 and INV2, switching tubes M1 and M2, an input geminate transistor M4 and a hysteresis voltage adjusting tube M3; the cascode circuit is composed of MOS transistors M5, M6, M7, M8, M9 and M10; a comparator COMP for performing a voltage comparison. The second differential input stage capable of configuring the hysteresis voltage is composed of an NOT gate IINV3, switching tubes M14 and M15, an input geminate transistor M12 and a hysteresis voltage adjusting tube M13; the comparator output CPOUT is connected to the NOT gate INV1, controls the switching states of the switching tubes M1 and M2, and changes the size of an input tube connected with the input end INP; the comparator output CPOUT controls the switching states of M14 and M15, adjusting the size of the input tube connected to the input INN.
The switching tubes M1, M2 and M3 form an input adjusting circuit to change the size of the input tube of the comparator, and the combination of various input tube sizes can be realized by adopting a plurality of input adjusting circuits and introducing control selection, so that the configuration purpose of various hysteresis voltage combinations is achieved.
MOS tubes M5, M6, M7, M8, M9 and M10 form a cascode circuit as a current signal amplifying circuit of an input geminate transistor, the result of current comparison is sent to a voltage comparator COMP, and finally, a voltage comparison result is output.
In addition, the present embodiment further provides a method for controlling a hysteresis voltage, using the configurable hysteresis voltage comparator, where the method for controlling the hysteresis voltage includes: when the output level of the comparator body is low level, the size of the input tube of the first differential input stage is a first input pair tube, and the size of the input tube of the second differential input stage is the sum of a second input pair tube and a second hysteresis voltage adjusting tube; and when the output level of the comparator body is high level, the size of the input tube of the first differential input stage is the sum of the first input pair tube and the first hysteresis voltage adjusting tube, and the size of the input tube of the second differential input stage is the second input pair tube.
When the comparator output CPOUT is at a low level, the output HP of the inverter INV1 is at a high level, the switch M2 is turned on, the switch M1 is turned off, the gate of the hysteresis voltage adjusting transistor M3 is connected to the analog ground level, the transistor M3 is turned off, and the size of the input transistor INP connected is only M4. When the comparator output CPOUT is at a high level, the output HP of the inverter INV1 is at a low level, the switch M2 is turned off, the switch M1 is turned on, and the gate of the hysteresis voltage adjusting transistor M3 is connected to the input terminal INP, and at this time, the size of the input terminal INP connected to the input terminal INP is (M3+ M4).
Similarly, when the comparator output CPOUT is low, the switch transistor M15 is turned off, the output of the inverter INV3 is high, the switch transistor M14 is turned on, and the gate of the hysteresis voltage adjusting transistor M13 is connected to the inverting input terminal INN, where the size of the input transistor to which INN is connected is (M12+ M13). When the comparator output CPOUT is at high level, the switch transistor M15 is turned on, the output of the inverter INV3 is at low level, the switch transistor M14 is turned off, and the gate of the hysteresis voltage adjusting transistor M13 is connected to analog ground, and the size of the input transistor in the INN connection is only M13.
As can be seen from the above, when the input voltage at the positive terminal INP of the comparator is smaller than the input voltage at the negative terminal INN, the output CPOUT of the comparator is at a low level, and the size of the input transistor connected to INP is M4, while the size of the input transistor connected to INN is (M12+ M13), and only when the input voltage at INP exceeds the input voltage at INN by a certain magnitude, for example, 15mV, the comparator can be inverted, and the state of the output CPOUT changes to a high level. After the output CPOUT of the comparator becomes high, the input transistor connected to INP has a size of (M3+ M4), and the input transistor connected to INN has a size of M12, and only when the input voltage of INP is lower than the input voltage of INN by a certain magnitude, for example, 15mV, the comparator is inverted and the state of the output CPOUT becomes low. The selection of the input regulating tube by the comparator state forms the required hysteresis voltage.
The above process can obtain different hysteresis upper limit voltages and hysteresis lower limit voltages on the basis of adjusting the sizes of M3 and M13. When a plurality of adjusting tubes and selection circuits are adopted, the setting of various hysteresis upper limit and lower limit voltages can be realized, and better application convenience is brought.
The configurable hysteresis voltage is obtained by changing the size of the input pair tube of the comparator by adopting the adjusting tube, so that the proper hysteresis voltage grade can be selected according to different signal inputs and noise sizes in an actual application system, the accuracy of the comparator is improved, and the noise interference is reduced. By adopting the multi-path adjusting tube, different hysteresis voltage grades can be realized, and the flexible configuration of the hysteresis voltage of the comparator can be realized.
The above are merely examples of the present application and are not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.
Claims (4)
1. A configurable hysteresis voltage comparator, the configurable hysteresis voltage comparator comprising:
the reference voltage circuit is used for respectively providing a first reference voltage and a second reference voltage for the differential input circuit and the cascode circuit;
a differential input circuit comprising:
a first differential input stage comprising: the voltage regulator comprises a first NOT gate, a second NOT gate, a first switching tube, a second switching tube, a first input geminate transistor and a first hysteresis voltage regulating tube; the input end of the first not gate is connected to the output end of the comparator body in a signal mode, the output end of the first not gate is connected to the input end of the second not gate and the grid electrode of the second switching tube in a signal mode, the output end of the second not gate is connected to the grid electrode of the first switching tube in a signal mode, the drain electrode of the first switch is connected to the first voltage input end of the comparator body and the grid electrode of the first input pair tube respectively, the source electrode of the first switching tube is connected to the drain electrode of the second switching tube and the grid electrode of the first hysteresis voltage adjusting tube respectively, the drain electrode of the first hysteresis voltage adjusting tube is connected to the drain electrode of the first input pair tube and the cascode circuit respectively, and the source electrode of the first hysteresis voltage adjusting tube is connected to the source electrode of the first input pair tube;
a second differential input stage comprising: the first non-gate, the first switching tube, the second input geminate transistor and the second hysteresis voltage adjusting tube are connected in series; the input end of the third not gate is connected to the output end of the comparator body and the grid of the fourth switching tube, the output end of the third not gate is connected to the grid of the third switching tube, the drain of the third switch is respectively connected to the second voltage input end of the comparator body and the grid of the second input pair tube, the source of the third switching tube is respectively connected to the drain of the fourth switching tube and the grid of the second hysteresis voltage adjusting tube, the drain of the second hysteresis voltage adjusting tube is respectively connected to the drain of the second input pair tube and the cascode circuit, and the source of the second hysteresis voltage adjusting tube is connected to the source of the second input pair tube; and
the cascode circuit is configured to amplify the output voltage of the first differential input stage and the voltage of the second differential input stage and then send the amplified voltages to the comparator body.
2. The configurable hysteresis voltage comparator according to claim 1, wherein at least one of the following is a MOS transistor: the voltage regulator comprises a first switch tube, a second switch tube, a first input geminate transistor, a first hysteresis voltage regulating tube, a third switch tube, a fourth switch tube, a second input geminate transistor and a second hysteresis voltage regulating tube.
3. The hysteresis voltage configurable comparator as claimed in claim 1, wherein the cascode circuit is formed by connecting a plurality of MOS transistors.
4. The hysteresis voltage configurable comparator as claimed in claim 1, wherein the comparator body is a two-stage open loop comparator.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111756358A (en) * | 2020-06-18 | 2020-10-09 | 安徽赛腾微电子有限公司 | Hysteresis voltage configurable comparator and hysteresis voltage control method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111756358A (en) * | 2020-06-18 | 2020-10-09 | 安徽赛腾微电子有限公司 | Hysteresis voltage configurable comparator and hysteresis voltage control method |
| CN111756358B (en) * | 2020-06-18 | 2024-05-14 | 安徽赛腾微电子有限公司 | Hysteresis voltage configurable comparator and hysteresis voltage control method |
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