CN212210831U - Low-power-consumption load circuit - Google Patents
Low-power-consumption load circuit Download PDFInfo
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- CN212210831U CN212210831U CN202021055234.3U CN202021055234U CN212210831U CN 212210831 U CN212210831 U CN 212210831U CN 202021055234 U CN202021055234 U CN 202021055234U CN 212210831 U CN212210831 U CN 212210831U
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Abstract
The utility model discloses a low-power consumption load circuit, including PNP triode Q2 and NPN triode Q1, PNP triode Q2's collecting electrode is connected to NPN triode Q1's base, first load resistance R1 is still connected to PNP triode Q2's collecting electrode, second load resistance R2 is connected to NPN triode Q1's collecting electrode, and first load resistance R1 and second load resistance R2's the other end is connected with the positive end of power output; an emitter of the NPN triode Q1 is connected with the negative end of the power output; a collector and an emitter of the PNP triode Q2 are connected with the negative end of the power output, and a third load resistor R3 is connected between the collector and the emitter of the PNP triode Q2; compared with the traditional load circuit, the load circuit has the advantages of low cost, easiness in realization, capability of reducing the loss of the circuit and improvement on the conversion efficiency of the power supply.
Description
Technical Field
The utility model relates to an electronic instrument and meter technical field specifically is a low-power consumption load circuit.
Background
In the design of the switching power supply, a load resistor with certain power needs to be placed in output for maintaining no-load standby power consumption and preventing the output voltage from fluctuating due to the instability of a no-load circuit. However, when the power supply operates in a load state, the presence of the load resistor increases additional loss, which reduces the efficiency of the switching power supply.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a low-power consumption load circuit solves the problem of proposing among the above-mentioned background art.
In order to achieve the above object, the utility model provides a following technical scheme:
a low-power-consumption load circuit comprises a PNP triode Q2 and an NPN triode Q1, wherein the base electrode of the NPN triode Q1 is connected with the collector electrode of the PNP triode Q2, the collector electrode of the PNP triode Q2 is also connected with a first load resistor R1, the collector electrode of the NPN triode Q1 is connected with a second load resistor R2, and the other ends of the first load resistor R1 and the second load resistor R2 are connected with the positive end of a power output; an emitter of the NPN triode Q1 is connected with the negative end of the power output; the collector and the emitter of the PNP triode Q2 are connected to the negative terminal of the power supply output, and a third load resistor R3 is connected between the collector and the emitter of the PNP triode Q2.
When the output is in no-load or the load is light, almost no voltage difference is generated at two ends of the third load resistor R3, the voltage difference between the emitter and the base of the PNP triode Q2 at the moment is not enough to enable the PNP triode Q2 to be conducted, the base of the NPN triode Q1 is connected to the output voltage through the first load resistor R1 at the moment, the NPN triode Q1 is conducted, and the second load resistor R2 is added at two ends of the output to form a load resistor, so that no-load standby power consumption is maintained.
When heavy load is output, the output current is large, the voltage difference between two ends of the third load resistor R3 is high, the voltage difference between the emitter and the base of the PNP triode Q2 exceeds 0.7V, at the moment, the PNP triode Q2 is conducted, the base level of the NPN triode Q1 is pulled down, the NPN triode Q1 is turned off, the connection between the second load resistor R2 and the output is disconnected, and the loss of the second load resistor R2 is reduced.
Compared with the prior art, the beneficial effects of the utility model are that: compared with the traditional load circuit, the load circuit has the advantages of low cost, easiness in realization, capability of reducing the loss of the circuit and improvement on the conversion efficiency of the power supply.
Drawings
Fig. 1 is a circuit diagram of a low power consumption load circuit according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Referring to fig. 1, a low power consumption load circuit includes a PNP transistor Q2 and an NPN transistor Q1, a base of the NPN transistor Q1 is connected to a collector of the PNP transistor Q2, the collector of the PNP transistor Q2 is further connected to a first load resistor R1, a collector of the NPN transistor Q1 is connected to a second load resistor R2, and the other ends of the first load resistor R1 and the second load resistor R2 are connected to a positive end of a power output; an emitter of the NPN triode Q1 is connected with the negative end of the power output; the collector and the emitter of the PNP triode Q2 are connected to the negative terminal of the power supply output, and a third load resistor R3 is connected between the collector and the emitter of the PNP triode Q2.
The specific working principle is as follows: when the output is in no-load or the load is light, almost no voltage difference is generated at two ends of the third load resistor R3, the voltage difference between the emitter and the base of the PNP triode Q2 at the moment is not enough to enable the PNP triode Q2 to be conducted, the base of the NPN triode Q1 is connected to the output voltage through the first load resistor R1 at the moment, the NPN triode Q1 is conducted, and the second load resistor R2 is added at two ends of the output to form a load resistor, so that no-load standby power consumption is maintained.
When heavy load is output, the output current is large, the voltage difference between two ends of the third load resistor R3 is high, the voltage difference between the emitter and the base of the PNP triode Q2 exceeds 0.7V, at the moment, the PNP triode Q2 is conducted, the base level of the NPN triode Q1 is pulled down, the NPN triode Q1 is turned off, the connection between the second load resistor R2 and the output is disconnected, and the loss of the second load resistor R2 is reduced.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (1)
1. A low power consumption load circuit, characterized by: the PNP triode Q2 and the NPN triode Q1 are included, the base electrode of the NPN triode Q1 is connected with the collector electrode of the PNP triode Q2, the collector electrode of the PNP triode Q2 is also connected with a first load resistor R1, the collector electrode of the NPN triode Q1 is connected with a second load resistor R2, and the other ends of the first load resistor R1 and the second load resistor R2 are connected with the positive end of the power supply output; an emitter of the NPN triode Q1 is connected with the negative end of the power output; the collector and the emitter of the PNP triode Q2 are connected to the negative terminal of the power supply output, and a third load resistor R3 is connected between the collector and the emitter of the PNP triode Q2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021055234.3U CN212210831U (en) | 2020-06-10 | 2020-06-10 | Low-power-consumption load circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021055234.3U CN212210831U (en) | 2020-06-10 | 2020-06-10 | Low-power-consumption load circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN212210831U true CN212210831U (en) | 2020-12-22 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202021055234.3U Active CN212210831U (en) | 2020-06-10 | 2020-06-10 | Low-power-consumption load circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN212210831U (en) |
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2020
- 2020-06-10 CN CN202021055234.3U patent/CN212210831U/en active Active
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