CN211830207U - Circuit compatible with input undervoltage protection and adjustable in starting delay time - Google Patents
Circuit compatible with input undervoltage protection and adjustable in starting delay time Download PDFInfo
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- CN211830207U CN211830207U CN202020659728.6U CN202020659728U CN211830207U CN 211830207 U CN211830207 U CN 211830207U CN 202020659728 U CN202020659728 U CN 202020659728U CN 211830207 U CN211830207 U CN 211830207U
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Abstract
The utility model discloses a compatible input undervoltage protection and start-up time delay adjustable circuit, including triode Q1, triode Q1, operational amplifier U1, voltage reference chip U2, time base chip U3, switching power supply module M1, resistance R1-resistance R9, diode D1-diode D3; the input end of the resistor R8 is connected to a positive power supply + Vin, the output end of the resistor R8 is electrically connected with the cathode of the voltage stabilizing diode ZD1, and the anode of the voltage stabilizing diode ZD1 is connected with a negative power supply-Vin; the output terminal of the resistor R8 is also connected to the input terminal of the resistor R9. The utility model provides a compatible input under-voltage protection can effectively reduce the start-up impulse current with start time delay adjustable circuit, and surge voltage is to the influence of back level load integrated circuit board when reducing the start-up, can delay the start, and hierarchical starting circuit has in turn improved the stability of system, and the components and parts low power dissipation that the circuit used, operational reliability is high.
Description
Technical Field
The utility model relates to power supply protection technical field, a compatible input undervoltage protection and start time delay adjustable circuit of special design.
Background
Along with the development of industry and the progress of society, system integration degree is higher more, in a set of complicated big system, has the main power supply unit of large capacity, the power supply bus, main circuit breaker, sub-equipment etc. and the power supply bus gives each sub-equipment with the electric energy transfer, has the power integrated circuit board to come the conversion voltage at the input among each sub-equipment, converts the high voltage on the bus into the load integrated circuit board and can use the low-voltage, and the low-voltage guarantees stable work for the power supply of load integrated circuit board.
In the actual operation process of the system, when a large system is started every time, the input capacitors at the front stage of all the power supply boards of the sub-equipment are charged instantly when a main breaker is closed, an impulse current is generated, the load boards of the sub-equipment also ask for current along with the starting of the power supply boards, the bus current is increased instantly, the output transient current output by a main power supply at the front stage of the bus also increases, the output voltage fluctuates, the bus voltage is unstable, the output voltage fluctuates greatly and affects the reliable work of the load, so vicious circle is generated, each equipment of the whole system is adversely affected, the main breaker also generates arc drawing at the closing moment, mechanical contacts bounce repeatedly, surge voltage and surge current are generated on the bus instantly, although the surge voltage is inhibited by an anti-surge design circuit in the power supply boards, the surge voltage with low energy level is transmitted to the load through a transformer winding of the power supply boards and a cross-over capacitor at the original side, if the control is not added, sensitive circuits such as a CPU and the like on the load board card can start to work at the same time, the stability of the CPU can be influenced by the transmitted surge energy, and some error signals can be sent to other equipment to trigger misoperation.
Based on the existing problems, the circuit which is compatible with input undervoltage protection and adjustable in starting delay time is provided.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a compatible input under-voltage protection and start time delay adjustable circuit can effectively reduce and start impulse current, and surge voltage is to the influence of back level load integrated circuit board when reducing the start-up, can delay the start-up, and hierarchical starting circuit has in turn improved the stability of system, and the components and parts low power dissipation that the circuit used, operational reliability is high to the problem of providing the normal work of transient state heavy current large voltage influence system among the above-mentioned background art is solved.
In order to achieve the above object, the utility model provides a following technical scheme: a circuit compatible with input under-voltage protection and adjustable in starting delay time comprises a triode Q1, a triode Q1, an operational amplifier U1, a voltage reference chip U2, a time base chip U3, a switching power supply module M1, a resistor R1-resistor R9, a diode D1-a diode D3; the input end of the resistor R8 is connected to a positive power supply + Vin, the output end of the resistor R8 is electrically connected with the cathode of the voltage stabilizing diode ZD1, and the anode of the voltage stabilizing diode ZD1 is connected with a negative power supply-Vin; the output end of the resistor R8 is also connected to the input end of the resistor R9, the output end of the resistor R9 is electrically connected with the base electrode of the triode Q1, the collector electrode of the triode Q1 is electrically connected to the positive power supply + Vin, the emitter electrode of the triode Q1 is electrically connected to the input end of the capacitor C5, and the output end of the capacitor C5 is connected to the negative power supply-Vin; an emitter of the triode Q1 is connected to an input end of a resistor R5, an output end of a resistor R5 is connected to an input end of a resistor R4, an output end of the resistor R4 is connected to a pin 6 of an operational amplifier U1, an output end of a resistor R5 is connected to a pin 2 electrically connected to a voltage reference chip U2, a pin 3 of the voltage reference chip U2 is connected to a negative power supply-Vin, and a pin 1 of a voltage reference chip U2 is connected to an input end of a resistor R4; the output end of the resistor R2 is connected to a pin 5 of the operational amplifier U1, and is electrically connected to the input end of the resistor R3 and the input end of the capacitor C2, and the output end of the resistor R3 is connected to the negative power-Vin after being connected with the output end of the capacitor C2; pin 7 of the operational amplifier U1 is connected to the input end of a resistor R6, and the output end of a resistor R6 is connected to a negative power supply-Vin; pin 4 of the operational amplifier U1 is connected to a negative supply-Vin; pin 7 of the operational amplifier U1 is connected to pin 8 of the time base chip U3 and to the collector of the triode Q2, pin 7 of the operational amplifier U1 is connected to the anode of the diode D1 and to the input end of the resistor R1, the output end of the resistor R1 is connected to the input end of the capacitor C1, and the output end of the capacitor C1 is connected to the negative power-Vin; the cathode of the diode D1 is connected with the output end of the resistor R1 and then is connected to the pin 2 and the pin 6 of the time base chip U3; pin 1 of the time base chip U3 is connected to the negative power supply-Vin, pin 5 of the time base chip U3 is connected to the input end of the capacitor C4, and the output end of the capacitor C4 is connected to the negative power supply-Vin; a pin 3 of the time-base chip U3 is connected to the input end of a resistor R7, the output end of the resistor R7 is connected to the base electrode of a triode Q2, and the emitter electrode of the triode Q2 is connected to a negative power supply-Vin; the collector of the transistor Q2 is connected to the cathode of the diode D2, the pin 4 of the time base chip U3 is connected to the pin 7 of the operational amplifier U1 and is electrically connected to the cathode of the diode D3, the anode of the diode D3 is connected to the anode of the diode D2 and then is connected to the pin 3 of the switching power module M1, the pin 1 of the switching power module M1 is connected to the positive power supply + Vin, and the pin 2 of the switching power module M1 is connected to the negative power supply-Vin.
Preferably, the operational amplifier U1 is model LM 258.
Preferably, the zener diode ZD1 is one of a 12V zener diode and a 5.1V zener diode.
Preferably, the voltage reference chip U2 has a model number TL 431.
Preferably, the model number of the time base chip U3 is LMC 555.
Compared with the prior art, the beneficial effects of the utility model are that: the utility model provides a compatible input under-voltage protection and start time delay adjustable circuit, components and parts and circuit topological structure that use can effectively reduce and start impulse current, and surge voltage is to the influence of back level load integrated circuit board when reducing the start-up, can delay the start-up, and hierarchical starting circuit has in batches improved the stability of system, and the components and parts low power dissipation that the circuit used, operational reliability is high.
Drawings
Fig. 1 is a schematic circuit diagram of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Referring to fig. 1, a circuit compatible with input under-voltage protection and adjustable start-up delay time includes a transistor Q1, a transistor Q1, an operational amplifier U1, a voltage reference chip U2, a time-base chip U3, a switching power supply module M1, a resistor R1-a resistor R9, a diode D1-a diode D3; the model of the operational amplifier U1 is LM258, the zener diode ZD1 selects one of a 12V voltage regulator tube and a 5.1V voltage regulator tube, the model of the voltage reference chip U2 is TL431, and the model of the time base chip U3 is LMC 555.
Wherein: the input end of the resistor R8 is connected to the positive power supply + Vin, the output end of the resistor R8 is electrically connected with the cathode of the Zener diode ZD1, and the anode of the Zener diode ZD1 is connected with the negative power supply-Vin; the output end of the resistor R8 is also connected to the input end of the resistor R9, the output end of the resistor R9 is electrically connected with the base electrode of the triode Q1 to provide base electrode voltage for the triode Q1, the collector electrode of the triode Q1 is electrically connected to a positive power supply + Vin, the emitter electrode of the triode Q1 is electrically connected to the input end of the capacitor C5, and the output end of the capacitor C5 is connected to a negative power supply-Vin; an emitter of the triode Q1 is connected to an input end of the resistor R5, an output end of the resistor R5 is connected to an input end of the resistor R4, an output end of the resistor R4 is connected to a pin 6 of the operational amplifier U1, an output end of the resistor R5 is connected to a pin 2 electrically connected to the voltage reference chip U2, a pin 3 of the voltage reference chip U2 is connected to a negative power supply-Vin, and a pin 1 of the voltage reference chip U2 is connected to an input end of the resistor R4; the output end of the resistor R2 is connected to the pin 5 of the operational amplifier U1, and is electrically connected to the input end of the resistor R3 and the input end of the capacitor C2, and the output end of the resistor R3 is connected to the negative power-Vin after being connected to the output end of the capacitor C2.
Wherein: pin 7 of the operational amplifier U1 is connected to the input terminal of the resistor R6, the output terminal of the resistor R6 is connected to the negative supply-Vin; pin 4 of the operational amplifier U1 is connected to a negative supply-Vin; pin 7 of the operational amplifier U1 is connected to pin 8 of the time base chip U3 and to the collector of the triode Q2, pin 7 of the operational amplifier U1 is connected to the anode of the diode D1 and to the input end of the resistor R1, the output end of the resistor R1 is connected to the input end of the capacitor C1, and the output end of the capacitor C1 is connected to the negative power-Vin; the cathode of the diode D1 is connected to the output of the resistor R1 and to pins 2 and 6 of the time base chip U3.
Wherein: pin 1 of the time base chip U3 is connected to the negative power supply-Vin, pin 5 of the time base chip U3 is connected to the input terminal of the capacitor C4, and the output terminal of the capacitor C4 is connected to the negative power supply-Vin; a pin 3 of the time-base chip U3 is connected to the input end of a resistor R7, the output end of the resistor R7 is connected to the base electrode of a triode Q2, and the emitter electrode of the triode Q2 is connected to a negative power supply-Vin; the collector of the transistor Q2 is connected to the cathode of the diode D2, the pin 4 of the time base chip U3 is connected to the pin 7 of the operational amplifier U1 and is electrically connected to the cathode of the diode D3, the anode of the diode D3 is connected to the anode of the diode D2 and then is connected to the pin 3 of the switching power module M1, the pin 1 of the switching power module M1 is connected to the positive power supply + Vin, and the pin 2 of the switching power module M1 is connected to the negative power supply-Vin.
The circuit compatible with input under-voltage protection and adjustable start delay time is characterized in that a switching power supply module M1 provides a DC/DC conversion function to convert high voltage input by a bus into required low voltage, a whole control loop mainly comprises a triode Q1, an operational amplifier U1, a voltage reference chip U2, a time-base chip U3 and other core components and functional units, the triode Q1, a resistor R8, a resistor R9, a voltage stabilizing diode ZD2 and a capacitor C5 are connected to form a control loop part, although a linear voltage stabilizing circuit is used as an auxiliary power supply, when the triode Q1 is a large-package triode, no radiating fins are required to be added, because the power consumption of the operational amplifier U1, the voltage reference chip U2 and the time-base chip U3 is very low, the working voltage of the voltage stabilizing diode ZD2 is determined by parameters, one of a 12V voltage stabilizing tube ZD and a 5.1V voltage stabilizing tube is selected as the voltage stabilizing diode 1, a voltage reference chip U2 is taken as a core, a resistor R5, a capacitor C3 and a voltage reference chip U2 are connected to form a reference source circuit, an operational amplifier U1 is taken as the core, a resistor R2, a resistor R3, a resistor R4, a capacitor C2 and the reference source circuit are connected to form a comparison circuit together to realize undervoltage comparison of input voltage, a time base chip U3 is taken as the core, and a diode D1, a diode D2, a resistor R1, a resistor R6, a resistor R7, a capacitor C1, a capacitor C4 and a triode Q2 are connected to form a delay circuit together, and a time constant is determined by the resistor R1 and the capacitor C1 to adjust delay time.
The voltage accessed by the switching power supply module M1 is 72V or 110V, and can convert and output 3.3V, 5V, 12V or 15V dc power, and the following description is given by inputting 110V voltage:
the allowable fluctuation range of the input voltage is 66V-154V, an appropriate resistor R2 and a resistor R3 are selected through calculation, an input undervoltage protection point can be set at 66V, when the input voltage is lower than 66V, the operational amplifier U1 outputs a low level, the Ctrl end of the switching power module M1 is pulled down through a diode D3, the switching power module M1 is closed to output, when the input voltage is higher than 66V, the operational amplifier U1 outputs a high level, a delay circuit taking the time-base chip U3 as a core is started, the delay time can be set to be 1S through the resistor R1 and a capacitor C3, when the time-base chip U3U3 is started, the pin 3 of the time-base chip U3 outputs a high level to a triode Q2 through the resistor R7, the triode Q2 enters a conducting state, the Ctrl end of the switching power module M1 is pulled down through the diode D2, the output of the switching power module M1 is closed, and the rear-stage load is not started, after 1S delay, the 3 rd pin of the time base chip U3 outputs low level to the triode Q2 through the resistor R7, the triode Q2 enters a cut-off state, the diode D2 is not conducted, the Ctrl end of the switching power supply module M1 is not pulled down, and the switching power supply module M1 starts to output.
The effect of setting the delay circuit: when a circuit breaker is closed by a bus, the output of a switching power supply module M1 is turned off, and at the moment, a rear-stage load board does not work, a rear-stage CPU cannot be influenced by surge voltage generated at the moment of closing the bus, so that the benefit is more obvious when multiple devices are started, in a set of large system, if multiple devices work simultaneously, the starting delay time of each sub-device power supply board is set to be different, if the first sub-device is started after 0.5S delay after being electrified, the second sub-device is started after 1S delay after being electrified, the third sub-device is started after 1.5S delay after being electrified, and after the starting time sequence is introduced, the load is started in batches, and the large-amplitude fluctuation of the output voltage of a main power supply of the large system can be effectively relieved.
To sum up, the utility model provides a compatible input undervoltage protection and start time delay adjustable circuit, components and parts and circuit topological structure that use can effectively reduce and start impulse current, and surge voltage is to the influence of back level load integrated circuit board when reducing the start-up, and the start-up that can delay is in grades in batches, has improved the stability of system, and the components and parts low power dissipation that the circuit used, operational reliability is high.
The above, only be the concrete implementation of the preferred embodiment of the present invention, but the protection scope of the present invention is not limited thereto, and any person skilled in the art is in the technical scope of the present invention, according to the technical solution of the present invention and the utility model, the concept of which is equivalent to replace or change, should be covered within the protection scope of the present invention.
Claims (5)
1. A circuit compatible with input under-voltage protection and adjustable in starting delay time is characterized by comprising a triode Q1, a triode Q1, an operational amplifier U1, a voltage reference chip U2, a time-base chip U3, a switching power supply module M1, a resistor R1-a resistor R9, a diode D1-a diode D3; the input end of the resistor R8 is connected to a positive power supply + Vin, the output end of the resistor R8 is electrically connected with the cathode of the voltage stabilizing diode ZD1, and the anode of the voltage stabilizing diode ZD1 is connected with a negative power supply-Vin; the output end of the resistor R8 is also connected to the input end of the resistor R9, the output end of the resistor R9 is electrically connected with the base electrode of the triode Q1, the collector electrode of the triode Q1 is electrically connected to the positive power supply + Vin, the emitter electrode of the triode Q1 is electrically connected to the input end of the capacitor C5, and the output end of the capacitor C5 is connected to the negative power supply-Vin; an emitter of the triode Q1 is connected to an input end of the resistor R5, an output end of the resistor R5 is connected to an input end of the resistor R4, an output end of the resistor R4 is connected to a pin 6 of the operational amplifier U1, an output end of the resistor R5 is connected to a pin 2 electrically connected to the voltage reference chip U2, a pin 3 of the voltage reference chip U2 is connected to a negative power supply-Vin, and a pin 1 of the voltage reference chip U2 is connected to an input end of the resistor R4;
the output end of the resistor R2 is connected to a pin 5 of the operational amplifier U1, and is electrically connected to the input end of the resistor R3 and the input end of the capacitor C2, and the output end of the resistor R3 is connected to the negative power-Vin after being connected with the output end of the capacitor C2; pin 7 of the operational amplifier U1 is connected to the input end of a resistor R6, and the output end of a resistor R6 is connected to a negative power supply-Vin; pin 4 of the operational amplifier U1 is connected to a negative supply-Vin; pin 7 of the operational amplifier U1 is connected to pin 8 of the time base chip U3 and to the collector of the triode Q2, pin 7 of the operational amplifier U1 is connected to the anode of the diode D1 and to the input end of the resistor R1, the output end of the resistor R1 is connected to the input end of the capacitor C1, and the output end of the capacitor C1 is connected to the negative power-Vin; the cathode of the diode D1 is connected with the output end of the resistor R1 and then is connected to the pin 2 and the pin 6 of the time base chip U3;
pin 1 of the time base chip U3 is connected to the negative power supply-Vin, pin 5 of the time base chip U3 is connected to the input end of the capacitor C4, and the output end of the capacitor C4 is connected to the negative power supply-Vin; a pin 3 of the time-base chip U3 is connected to the input end of a resistor R7, the output end of the resistor R7 is connected to the base electrode of a triode Q2, and the emitter electrode of the triode Q2 is connected to a negative power supply-Vin; the collector of the transistor Q2 is connected to the cathode of the diode D2, the pin 4 of the time base chip U3 is connected to the pin 7 of the operational amplifier U1 and is electrically connected to the cathode of the diode D3, the anode of the diode D3 is connected to the anode of the diode D2 and then is connected to the pin 3 of the switching power module M1, the pin 1 of the switching power module M1 is connected to the positive power supply + Vin, and the pin 2 of the switching power module M1 is connected to the negative power supply-Vin.
2. The circuit of claim 1, wherein the circuit is compatible with undervoltage protection and adjustable startup delay time, and comprises: the model of the operational amplifier U1 is LM 258.
3. The circuit of claim 1, wherein the circuit is compatible with undervoltage protection and adjustable startup delay time, and comprises: one of a 12V voltage regulator tube and a 5.1V voltage regulator tube is selected as the voltage regulator diode ZD 1.
4. The circuit of claim 1, wherein the circuit is compatible with undervoltage protection and adjustable startup delay time, and comprises: the model of the voltage reference chip U2 is TL 431.
5. The circuit of claim 1, wherein the circuit is compatible with undervoltage protection and adjustable startup delay time, and comprises: the model number of the time base chip U3 is LMC 555.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020659728.6U CN211830207U (en) | 2020-04-27 | 2020-04-27 | Circuit compatible with input undervoltage protection and adjustable in starting delay time |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202020659728.6U CN211830207U (en) | 2020-04-27 | 2020-04-27 | Circuit compatible with input undervoltage protection and adjustable in starting delay time |
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| Publication Number | Publication Date |
|---|---|
| CN211830207U true CN211830207U (en) | 2020-10-30 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202020659728.6U Active CN211830207U (en) | 2020-04-27 | 2020-04-27 | Circuit compatible with input undervoltage protection and adjustable in starting delay time |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113690974A (en) * | 2021-08-19 | 2021-11-23 | 深圳诺倍能电子技术有限公司 | Undervoltage protection and slow start circuit |
| CN114143124A (en) * | 2021-11-05 | 2022-03-04 | 国网江苏省电力有限公司盐城供电分公司 | Control device capable of starting power communication equipment in regions |
-
2020
- 2020-04-27 CN CN202020659728.6U patent/CN211830207U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113690974A (en) * | 2021-08-19 | 2021-11-23 | 深圳诺倍能电子技术有限公司 | Undervoltage protection and slow start circuit |
| CN114143124A (en) * | 2021-11-05 | 2022-03-04 | 国网江苏省电力有限公司盐城供电分公司 | Control device capable of starting power communication equipment in regions |
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Inventor after: Zhang Fuliang Inventor after: Hu Qingyu Inventor after: Li Ximei Inventor before: Hu Qingyu Inventor before: Li Ximei |