CN211697965U - Differential voltage acquisition circuit - Google Patents
Differential voltage acquisition circuit Download PDFInfo
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- CN211697965U CN211697965U CN201922189065.6U CN201922189065U CN211697965U CN 211697965 U CN211697965 U CN 211697965U CN 201922189065 U CN201922189065 U CN 201922189065U CN 211697965 U CN211697965 U CN 211697965U
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Abstract
The utility model discloses a differential voltage acquisition circuit, including electric capacity C1, resistance R3, resistance R4, triode Q1, resistance R1, resistance R2, voltage stabilization components and parts ZD1, electric capacity C1 is passed through to resistance R3's one end and is connected ground signal GND, triode Q1's collecting electrode is connected to resistance R3's the other end, triode Q1's collecting electrode passes through resistance R4 and is connected ground signal GND, triode Q1's projecting pole passes through resistance R1 and connects anodal power Ui +, triode Q1's base passes through resistance R2 and connects anodal power Ui +, triode Q1's base passes through voltage stabilization components ZD1 and connects negative pole power Ui-, the one end of resistance 539R 3 or the transmission of triode Q1 is the collection input of AD interface. The utility model discloses a differential signal need not to be in common ground, and differential signal's low pressure also can be the negative pressure moreover, and the circuit composition is simple moreover, and the cost is very low.
Description
Technical Field
The utility model relates to a differential voltage acquisition circuit.
Background
In the electronic industry, signals generated by supplying power by different power supplies are often generated, so that the signals are difficult to be grounded in signal output, and the signals which are not grounded are difficult to be acquired by utilizing a single chip microcomputer or an AD chip on one circuit board. The existing differential voltage acquisition circuit directly uses a differential amplification circuit built by one operational amplifier or uses two operational amplifiers to build two voltage followers and sends the two voltage followers to two AD ports for acquisition and processing, and the construction is complex and is not isolated.
SUMMERY OF THE UTILITY MODEL
The utility model aims at overcoming not enough in the current product, provide a differential voltage acquisition circuit. In order to achieve the purpose, the utility model is realized by the following technical scheme:
a differential voltage acquisition circuit comprises a capacitor C1, a resistor R3, a resistor R4, a triode Q1, a resistor R1, a resistor R2 and a voltage stabilizing component ZD1, wherein one end of the resistor R3 is connected with a ground signal GND through the capacitor C1, the other end of the resistor R3 is connected with a collector of the triode Q1, a collector of the triode Q1 is connected with the ground signal GND through the resistor R4, an emitter of the triode Q1 is connected with a positive power supply Ui through the resistor R1, a base of the triode Q1 is connected with the positive power supply Ui through the resistor R2, a base of the triode Q1 is connected with a negative power supply Ui through the voltage stabilizing component ZD1, one end of the resistor R3 or an emitter of the triode Q1 is an acquisition input end of.
Preferably, the voltage stabilizing component ZD1 is a voltage regulator tube, a TVS tube, an ESD tube, or a 0R resistor.
Preferably, the transistor Q1 is an NPN transistor or a PNP transistor.
Preferably, when the transistor Q1 is an NPN transistor, the emitter of the transistor Q1 is the acquisition input terminal of the AD interface.
Preferably, when the transistor Q1 is a PNP transistor, one end of the resistor R3 is an acquisition input end of the AD interface.
The utility model has the advantages as follows: the utility model discloses a differential voltage acquisition circuit's differential signal need not to be altogether, and differential signal's low pressure also can be the negative pressure moreover, and the circuit composition is simple moreover, and it is simple to revise according to actual scene, and the cost is very low, has good practicality and economic nature.
Drawings
Fig. 1 is a schematic circuit diagram of the PNP transistor of the present invention as transistor Q1;
fig. 2 is a schematic circuit diagram of the NPN transistor of the transistor Q1 according to the present invention.
Detailed Description
The technical scheme of the utility model is further explained by combining the attached drawings of the specification:
the first embodiment is as follows:
a differential voltage acquisition circuit comprises a capacitor C1, a resistor R3, a resistor R4, a PNP triode Q1, a resistor R1, a resistor R2 and a voltage stabilizing component ZD1, wherein one end of the resistor R3 is connected with a ground signal GND through the capacitor C1, the other end of the resistor R3 is connected with a collector of the PNP triode Q1, a collector of the PNP triode Q1 is connected with the ground signal GND through the resistor R4, an emitter of the PNP triode Q1 is connected with a positive power supply Ui through the resistor R1, a base of the PNP triode Q1 is connected with the positive power supply Ui through the resistor R2, a base of the PNP triode Q1 is connected with a negative power supply Ui through the voltage stabilizing component ZD1, one end of the resistor R3 is an acquisition input end of an AD interface, and the voltage stabilizing component ZD1 is a voltage regulator.
The specific implementation scheme is as shown in fig. 1, and the circuit is respectively an acquisition input end of an AD interface, a triode Q1, a voltage regulator tube ZD1, a capacitor C1 and resistors R1-R4. Wherein R3 and C1 form an RC filter circuit, so that the acquisition input end of the AD interface acquires a stable analog voltage value; r1 and R4 constitute resistors that scale up the voltage; r2 is the current-limiting resistor of ZD1, makes ZD1 work in reverse conducting state, makes Ub > Uc, guarantees that triode Q1 works in the enlarged state. The PNP transistor Q1 provides isolated voltage conversion for its circuitry.
The connection relationship of the circuit is as follows: ui + is connected to the e pole of Q1 through R1; ui + is connected to the b pole of Q1 through R2; the positive terminal of ZD1 is connected with Ui-, and the negative terminal is connected with the b pole of Q1; one end of R4 is grounded, and the other end is connected with the c pole of Q1; the C pole of the Q1 is sent to the acquisition input end of the AD interface through R3, and the C1 is connected between the acquisition input end of the AD interface and the ground in parallel.
The working process of the voltage-stabilized power supply circuit is as follows: when Ui + and Ui-apply voltage Ui (Ui > UBE (BE on voltage of Q1) + UZD1(ZD1 reverse voltage)), the voltage drop of R1 is UR1 ═ Ui-UBE-UZD1, so the current IR1 through R1 is UR 1/R1. However, when Ub > Uc, the triode is in an enlarged state, and Uc 4 ═ R4 ═ IR4 ═ R4 ═ IR1 ═ R4 ═ UR1/R1 ═ u-UBE-UZD 1 ═ R4/R1.
GND is 0 potential, Ui + ═ 20V, Ui ═ 10V.
1. It is assumed that the acquisition input end of the AD interface has an upper limit of 5V, so Uc < 5V.
2. For the triode to operate in the amplifying state, therefore Ub >6V, so ZD1 selects 18V and R2 selects 10k, leaving Ub at 8V.
3. If UBE is 0.5V, UR1 is 30V-UBE-UZD 1 is 11.5V.
4. When the amplification ratio is selected and 5:1 is selected, then R1 is 100k, R4 is 20k, so that Uc voltage UR 1R 4/R1 is 11.5V/5 is 2.3V, and the voltage is also acquired by the acquisition input end of the AD interface. Since the Ui-Uc voltage R11/R4+ UBE + UZD1, the measured Uc voltage is 2.3V, and the Ui voltage 30V can be calculated according to the formula, and other actual conditions are calculated according to the actual voltage.
By adopting the acquisition circuit in the patent, only one PNP triode is needed to realize the isolation of the transmission voltage and an AD port sampling processing signal, and the circuit scheme has simple devices and low cost.
The utility model discloses a differential voltage acquisition circuit's differential signal need not to be altogether, and differential signal's low pressure also can be the negative pressure moreover, and the circuit composition is simple moreover, and it is simple to revise according to actual scene, and the cost is very low, has good practicality and economic nature.
Example two:
a differential voltage acquisition circuit comprises a capacitor C1, a resistor R3, a resistor R4, an NPN triode Q1, a resistor R1, a resistor R2 and a voltage stabilizing component ZD1, wherein one end of the resistor R3 is connected with a ground signal GND through the capacitor C1, the other end of the resistor R3 is connected with a collector of the NPN triode Q1, a collector of the NPN triode Q1 is connected with the ground signal GND through the resistor R4, an emitter of the NPN triode Q1 is connected with a positive power supply Ui through the resistor R1, a base of the NPN triode Q1 is connected with the positive power supply Ui through the resistor R2, a base of the NPN Q1 is connected with a negative power supply Ui through the voltage stabilizing component 1, an emitter of the triode Q1 is an acquisition input end of an AD interface, and the voltage stabilizing component ZD1 is a voltage regulator or a TV.
The specific implementation scheme is as shown in fig. 2, and the circuit is respectively an acquisition input end of an AD interface, a triode Q1, a voltage regulator tube ZD1, a capacitor C1 and resistors R1-R4. Wherein R3 and C1 form an RC filter circuit, so that the acquisition input end of the AD interface acquires a stable analog voltage value; r1 and R4 constitute resistors that scale up the voltage; r2 is the current-limiting resistor of ZD1, makes ZD1 work in reverse conducting state, makes Ub > Uc, guarantees that triode Q1 works in the enlarged state. An NPN transistor Q1 provides isolated voltage conversion for its circuitry.
By adopting the acquisition circuit in the patent, the isolation transmission of voltage and the sampling processing of an AD port can be realized only by one NPN triode, and the circuit scheme has simple devices and low cost.
The utility model discloses a differential voltage acquisition circuit's differential signal need not to be altogether, and differential signal's low pressure also can be the negative pressure moreover, and the circuit composition is simple moreover, and it is simple to revise according to actual scene, and the cost is very low, has good practicality and economic nature.
It should be noted that the above list is only one specific embodiment of the present invention. Obviously, the present invention is not limited to the above embodiments, and many modifications can be made, and in short, all modifications that can be directly derived or suggested by the person skilled in the art from the disclosure of the present invention should be considered as the protection scope of the present invention.
Claims (5)
1. The differential voltage acquisition circuit is characterized by comprising a capacitor C1, a resistor R3, a resistor R4, a triode Q1, a resistor R1, a resistor R2 and a voltage stabilizing component ZD1, wherein one end of the resistor R3 is connected with a ground signal GND through the capacitor C1, the other end of the resistor R3 is connected with a collector of the triode Q1, a collector of the triode Q1 is connected with the ground signal GND through the resistor R4, an emitter of the triode Q1 is connected with a positive power supply Ui + through the resistor R1, a base of the triode Q1 is connected with the positive power supply Ui + through the resistor R2, a base of the triode Q1 is connected with a negative power supply Ui-through the voltage stabilizing component ZD1, and one end of the resistor R3 or an emitter of the triode Q1 is an acquisition input end of an.
2. The differential voltage acquisition circuit according to claim 1, wherein the voltage stabilizing component ZD1 is a voltage regulator tube, a TVS tube, an ESD tube, or a 0R resistor.
3. The differential voltage acquisition circuit of claim 1 wherein the transistor Q1 is an NPN transistor or a PNP transistor.
4. The differential voltage acquisition circuit of claim 3 wherein when transistor Q1 is an NPN transistor, the emitter of transistor Q1 is the acquisition input of the AD interface.
5. The differential voltage acquisition circuit of claim 3, wherein when the transistor Q1 is a PNP transistor, one end of the resistor R3 is an acquisition input terminal of an AD interface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922189065.6U CN211697965U (en) | 2019-12-09 | 2019-12-09 | Differential voltage acquisition circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922189065.6U CN211697965U (en) | 2019-12-09 | 2019-12-09 | Differential voltage acquisition circuit |
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| CN211697965U true CN211697965U (en) | 2020-10-16 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115219770A (en) * | 2022-09-20 | 2022-10-21 | 昆山硕通电子有限公司 | Voltage detection device, voltage sampling circuit and isolation power supply |
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2019
- 2019-12-09 CN CN201922189065.6U patent/CN211697965U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115219770A (en) * | 2022-09-20 | 2022-10-21 | 昆山硕通电子有限公司 | Voltage detection device, voltage sampling circuit and isolation power supply |
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