CN211047322U

CN211047322U - Multi-output drive circuit and L ED drive chip

Info

Publication number: CN211047322U
Application number: CN201922415992.5U
Authority: CN
Inventors: 孙顺根; 蔡晓辉
Original assignee: Shanghai Bright Power Semiconductor Co Ltd
Current assignee: Shanghai Bright Power Semiconductor Co Ltd
Priority date: 2019-12-27
Filing date: 2019-12-27
Publication date: 2020-07-17
Anticipated expiration: 2029-12-27

Abstract

The utility model discloses a multiplexed output drive circuit and L ED drive chip multiplexed output drive circuit sets up constant current through adopting single resistance, the constant current with setting carries out the mirror image through the current mirror, can set up two or more ways output current, control output current's output simultaneously through regulation and control signal, owing to only need single resistance can set up two or more ways output current, make corresponding L ED drive chip can save peripheral components and parts quantity and cost, reduce encapsulation cost and volume, output that output current can be controlled through regulation and control signal simultaneously, realize adjusting luminance.

Description

Multi-output drive circuit and L ED drive chip

Technical Field

The utility model relates to an L ED lamp illumination technical field especially relates to a multiplexed output drive circuit and L ED driver chip with dimming function.

Background

With the development of L ED lamp technology, L ED lamp has wider application field, and L ED lamp lighting application is an important application among them L ED lamp lighting application needs special L ED driving chip control, which can make L ED lamp obtain good, uniform and stable current, thus making L ED lamp light more uniformly, and at the same time, can prolong the service life of L ED lamp, and meet the application requirements of various occasions.

Referring to fig. 1, a schematic diagram of a conventional multi-output L ED driving chip structure, the L ED driving chip 10 includes multi-output driving circuits 11-1 n, each of which is composed of an operational amplifier and an NMOS transistor and is electrically connected to an external resistor, for example, the output driving circuit 11 composed of an operational amplifier a1 and an NMOS transistor M1 follows a first reference voltage Vref1 to a high voltage end of a resistor R1, since the first reference voltage Vref1 is stable and does not change with the change of the operating temperature and the operating power supply, the current on the resistor R1 is constant, and a relatively constant output current Iout-1 is provided to a load (e.g., L ED lamps) through an NMOS transistor M1.

For the multi-output linear L ED driving chip, an operational amplifier and an NMOS tube are integrated in the chip, and resistors are used as peripheral components, because each output current is set by one resistor respectively, such as R1, R2, … … and Rn (n is more than or equal to 2) in FIG. 1, n resistors and n chip pins are needed, the number and the cost of the peripheral components are greatly increased, and the chip packaging cost and the size are increased.

Therefore, it is desirable to improve the conventional multi-output linear L ED driving chip, so as to realize multi-output L ED lamp output current, and simultaneously save the number and cost of peripheral components and reduce the packaging cost and volume.

Disclosure of Invention

An object of the utility model is to provide a multiplexed output drive circuit and L ED driver chip to the technical problem who exists among the prior art, adopt single resistance to set up multiplexed output current, can save peripheral components and parts quantity and cost, reduce encapsulation cost and volume.

In order to achieve the above object, the utility model provides a multiplexed output drive circuit, multiplexed output drive circuit includes: a current generation unit for generating and outputting a constant current; the current mirror is electrically connected with the current generation unit and is used for carrying out current mirror image conversion on the constant current to generate and output reference current; the current obtaining branch circuit is electrically connected with the current mirror and used for obtaining the reference current; and the multiple output driving branches are respectively electrically connected with the current acquisition branch, and each output driving branch is used for proportionally mirroring the reference current under the control of a regulation signal, generating corresponding output current and outputting the corresponding output current to a corresponding load.

In order to achieve the above object, the present invention provides an L ED driver chip, wherein the L ED driver chip is applied to provide driving current for multiple loads, the chip has a first interface connected to an external current setting resistor, a second interface for receiving the control signal inputted from the outside of the chip, and multiple output interfaces, and the chip further comprises a multiple output driver circuit, wherein the voltage follower of the multiple output driver circuit is connected to the current setting resistor through the first interface, and each output driving branch of the multiple output driver circuit is connected to the corresponding control signal through the second interface, and generates corresponding output current and outputs the control signal to the corresponding load through the output interface.

The utility model has the advantages of the utility model discloses an adopt single resistance to set up constant current, the constant current with setting up carries out the mirror image through the current mirror, can set up two or more ways output current, can control output current's output through the regulation and control signal simultaneously, come the mirror image through increasing the current source and set up output current to through the corresponding transistor grid voltage of setting up control output current, can improve the matching nature of current source to output current, be applicable to and need bear higher withstand voltage and need higher application of matching precision the utility model discloses L ED driver chip owing to only need single resistance can set up two or more ways output current, can save peripheral components and parts quantity and cost, reduces encapsulation cost and volume, can control output current's output through the regulation and control signal simultaneously, realizes adjusting luminance.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

FIG. 1 is a schematic diagram of a conventional multiplexed L ED driver chip;

FIG. 2 is a schematic diagram of the structure of the multi-output driving circuit of the present invention;

fig. 3 is a schematic structural diagram of a first embodiment of the multi-output driving circuit of the present invention;

fig. 4 is a schematic structural diagram of a second embodiment of the multi-output driving circuit of the present invention;

fig. 5 is a schematic structural diagram of a third embodiment of the multi-output driving circuit of the present invention;

fig. 6 is a schematic structural diagram of the L ED driver chip of the present invention.

Detailed Description

The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. It is to be understood that the embodiments described are only some embodiments of the invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without any creative work belong to the protection scope of the present invention. The terms "first," "second," "third," and the like in the description and in the claims, as well as in the drawings, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the objects so described are interchangeable under appropriate circumstances. Furthermore, the terms "comprising" and "having," as well as any variations thereof, are intended to cover a non-exclusive inclusion.

The utility model provides a multiplexed output drive circuit and L ED driver chip sets up constant current through adopting single resistance, and the constant current who will set up carries out the mirror image through the current mirror, can set up two way or more output current, can control output current's output through regulation and control signal simultaneously, come the mirror image through increasing the current source and set up output current, and through setting up the corresponding transistor grid voltage of control output current, can improve the matching nature of current source to output current, be applicable to and need bear higher withstand voltage and need the application of higher matching precision, the utility model discloses L ED driver chip, owing to only need single resistance can set up two way or more output current, can save peripheral components and parts quantity and cost, reduce encapsulation cost and volume, can control output current's output through regulation and control signal simultaneously, realize adjusting luminance.

Referring to fig. 2, the structure of the multi-output driving circuit of the present invention is schematically illustrated. The multi-output driving circuit 20 includes: the current generation unit 21, the current mirror 22, the current acquisition branch 23, and the multiple output driving branches (the first output driving branch 241 to the nth output driving branch 24n, n is greater than or equal to 2), and the PWM signal is used as the regulation signal.

The current generation unit 21 is configured to generate and output a constant current I1, the current mirror 22 is electrically connected to the current generation unit 21, the current mirror 22 is configured to perform current mirror conversion on the constant current I1 to generate a reference current I2, the current obtaining branch 23 is electrically connected to the current mirror 22 to obtain and output a reference current I2, each of the output driving branches 241 to 24n is electrically connected to the current obtaining branch 23, and each of the output driving branches 241 to 24n is configured to proportionally mirror the reference current I2 under control of a control signal PWM to generate corresponding output currents Iout-1 to Iout-n and output the corresponding output currents Iout-1 to Iout-n to corresponding loads (first load 291 to nth load 29n), where when the control signal PWM connected to the corresponding output driving branch 24x is active (e.g., PWM is 1), the output driving branch 24x is in an active state, the reference current I2 is proportionally mirrored to generate and output the corresponding output current Iout-x to the corresponding load 291 to nth load 29, and when the corresponding output driving branch 24x is in an inactive state (e.g., when the corresponding output driving branch 24x is connected to a lamp string L, the corresponding output driving circuit is connected to a non-operative state, e.g., a non-led 3875, a non-led-th load is connected to a non-load.

In a further embodiment, the current generating unit 21 includes a voltage follower 210 and a first reference voltage Vref1, the voltage follower 210 is electrically connected to a current setting resistor Rset, and is configured to follow the first reference voltage Vref1 to the current setting resistor Rset, so as to generate and output the constant current I1.

The utility model provides a multiplexed output drive circuit sets up the constant current through adopting the electric current to set up resistance, carries out the mirror image through the current mirror with the electric current that sets up, and each way output current is set for by an output drive branch road respectively, adopts single resistance can set up two or more ways output current, can save resistance components and parts quantity and cost, controls corresponding output drive branch road through the PWM signal simultaneously, realizes the control to output current's output to realize adjusting luminance to L ED lamp.

Referring to fig. 3, a schematic diagram of a first embodiment of a multi-output driving circuit according to the present invention is shown.

The voltage follower 210 of the current generating unit 21 is composed of an operational amplifier a1 and an output transistor N1. The positive input end of the operational amplifier A1 receives a first reference voltage Vref1, the negative input end thereof is connected to a common voltage end through a current setting resistor Rset, and the output end thereof is connected to the control end of the output transistor N1. The output transistor N1 has a first terminal connected to the common voltage terminal through the current setting resistor Rset, a second terminal as an output terminal of the current generating unit 21, and the output transistor N1 is configured to respond to the output of the operational amplifier a1 to output the constant current I1.

In a further embodiment, the output transistor N1 is an NMOS transistor, and the gate of the NMOS transistor is the control terminal of the output transistor N1, the source thereof is the first terminal of the output transistor N1, and the drain thereof is the second terminal of the output transistor N1. That is, the voltage follower constituted by the operational amplifier a1 and the NMOS transistor N1 follows the first reference voltage Vref1 to the source of the NMOS transistor N1 (i.e., the high voltage end of the current setting resistor Rset), and then the constant current I1 is formed by the current setting resistor Rset. Since the first reference voltage Vref1 is stable and does not vary with the operating temperature and the operating power supply, the current on the current setting resistor Rset is constant, and thus a constant current I1 can be output through the NMOS transistor N1. It should be noted that the output transistor N1 may also be a PMOS transistor or a Bipolar Junction Transistor (BJT), and the corresponding parameters, i.e., the adaptive modification of the circuit connection mode, may be performed according to design requirements.

The current mirror 22 includes a first mirror transistor P1 and a second mirror transistor P2. The first mirror transistor P1 is used for receiving the constant current I1; the second mirror transistor P2 is used for generating the reference current I2 according to the constant current I1. Wherein the first mirror transistor P1 and the second mirror transistor P2 are the same type of transistor.

In a further embodiment, the first mirror transistor P1 and the second mirror transistor P2 are cascode PMOS transistors, and the second mirror transistor P2 copies the current of the first mirror transistor P1. The source of the first mirror transistor P1 is connected to a power supply VDD, and the drain of the first mirror transistor P1 is shorted to the gate thereof, and serves as the input terminal of the current mirror 22 and is electrically connected to the output terminal of the current generating unit 21; that is, the drain of the first mirror transistor P1 is electrically connected to the drain of the output transistor N1. The drain of the second mirror transistor P2 serves as the output of the current mirror 22.

The current obtaining branch 23 includes a load transistor M0. The load transistor M0 is used as a load of the current mirror 22 (i.e., as a load of the second mirror transistor P2), and acquires and outputs the reference current I2. In this embodiment, the load transistor M0 is an NMOS transistor, the drain of the load transistor M0 is electrically connected to the drain of the second mirror transistor P2, the gate thereof is shorted to the drain thereof and then serves as the output terminal of the current obtaining branch 23, and the source thereof is connected to a common voltage terminal.

The structures of the output driving branches are the same, and the first output driving branch 241 will be described as an example below. The first output driving branch 241 includes a control unit 2411 and a driving transistor M1. The control unit 2411 is configured to control the conduction of the driving transistor M1 in response to a control signal PWM 1; the driving transistor M1 is used for being turned on under the control of the regulating unit 2411 to proportionally mirror the reference current I2, and generate and output an output current Iout-1. Specifically, the input end of the regulating unit 2411 is electrically connected to the gate of the load transistor M0, the control end thereof is configured to respond to a regulating signal PWM1, and the output end thereof is electrically connected to the control end of the driving transistor M1; the first terminal of the driving transistor M1 is connected to the common voltage terminal, and the second terminal thereof is used as the output terminal of the output driving branch 241. In this embodiment, the driving transistor M1 is an NMOS transistor, a gate of the NMOS transistor serves as a control terminal of the driving transistor M1, a source of the NMOS transistor serves as a first terminal of the driving transistor M1, and a drain of the NMOS transistor serves as a second terminal of the driving transistor M1, and also serves as an output terminal of the first output driving branch 241.

In a further embodiment, the driving transistor M1 and the load transistor M0 are the same type of transistor, and the output current of the output driving branch 241 can be adjusted by adjusting the device parameter of the driving transistor M1. n output driving branches 241-24 n can generate and output n output currents Iout-1-Iout-n; n output currents Iout-1 to Iout-n can be the same by selecting the same driving transistor; the n output currents Iout-1 to Iout-n can be different by adjusting the device parameters of the driving transistor.

In a further embodiment, the control unit 2411 includes a first switch tube S11 and a second switch tube S12. A first terminal of the first switch tube S11 is connected to the output terminal of the current obtaining branch 23, a control terminal thereof is configured to be closed in response to the control signal PWM1, and a second terminal thereof is connected to the control terminal of the driving transistor M1. The second switch transistor S12 has a first terminal connected to the common voltage terminal, a control terminal for turning off in response to the control signal PWM1, and a second terminal connected to the control terminal of the driving transistor M1. When the first switch tube S11 is turned on in response to the control signal PWM1, the second switch tube S12 is turned off in response to the control signal PWM1, and then the driving transistor M1 is controlled to be turned on. The first switch tube S11 and the second switch tube S12 may be both switch elements or transistors connected in a switch form.

The working principle of the embodiment is as follows: 1) the voltage follower 210 formed by the operational amplifier A1 and the NMOS transistor N1 is electrically connected with the current setting resistor Rset, the first reference voltage Vref1 is followed to the source of the NMOS transistor N1, and then the current setting resistor Rset forms a constant current I1; 2) PMOS tubes P1 and P2 of the cascode carry out current mirror image conversion on the constant current I1 to generate a reference current I2; 3) the NMOS tube M0 acquires and outputs a reference current I2; 4) when the PWM1 is asserted (e.g., PWM1 is 1), the first switch tube S11 is closed, and the second switch tube S12 is opened, so that the NMOS tube M1 and the NMOS tube M0 in the first output driving branch 241 form a 1: an N-type current mirror, wherein an NMOS tube M1 proportionally mirrors the current in an NMOS tube M0 and provides the current as output current Iout-1 to a corresponding load to form constant current drive; when the control signal PWM1 is inactive (e.g., PWM1 is 0), the first switch tube S11 is open, the second switch tube S12 is closed, the first output driving branch 241 is disconnected from the NMOS tube M0, and no output current is output. The control principle of the output driving branches 242-24 n of other paths is the same.

All the output driving branches 241 to 24n can receive the same control signal PWM at the same time to provide output current at the same time, all the output driving branches 241 to 24n can receive different control signals PWM respectively to provide output current respectively, and corresponding to L ED lamps, different L ED lamps are controlled to be lightened.

Referring to fig. 4, a schematic diagram of a second embodiment of the multi-output driving circuit of the present invention is shown. The difference from the embodiment shown in FIG. 3 is that in this embodiment, a voltage setting module 41, a load current source I-0 connected to the load transistor M0, and a driving current source (I-1-I-n) connected to each of the driving transistors (M1-Mn) are added to the multi-output driving circuit, and each of the driving current sources (I-1-I-n) is electrically connected to the load current source I-0. The voltage setting module 41 is configured to generate preset voltages (Vg 0-Vgn) according to a second reference voltage Vref2, and output the preset voltages (Vg 0-Vgn) to the control terminal of the load transistor M0 and the control terminals of the corresponding driving transistors (M1-Mn), respectively; the regulation unit is coupled between the voltage setting module 41 and the control terminals of the corresponding driving transistors (M1-Mn) to control the paths between the preset voltages (Vg 0-Vgn) and the control terminals of the corresponding driving transistors (M1-Mn). The preset voltage (Vg 0-Vgn) is set so that the voltage on the load current source I-0 is substantially the same as the voltage on the drive current sources (I-1-I-n). That is, the present embodiment implements mirror setting of the output currents Iout-1, Iout-2, … … Iout-n by the load current source I-0, and can improve the matching of the load current source I-0 to the driving current sources (I-1 to I-n) by setting the preset voltage. The voltage setting module 41 may be implemented by an op-amp.

Still taking the first output driving branch 241 as an example for illustration, in the embodiment, the adjusting and controlling unit 2411 is coupled between the voltage setting module 41 and the control terminal of the driving transistor M1 to control a path from the preset voltage Vg1 to the control terminal of the driving transistor M1.

Specifically, the gate of the NMOS transistor M0, which is a load transistor, receives a corresponding preset voltage Vg0, and the source thereof is connected to the common voltage terminal through the load current source I-0. The gate of the NMOS transistor M1 as a driving transistor receives a corresponding preset voltage Vg1 through the first switch tube S11 of the control unit 2411, and simultaneously the gate is connected to the common voltage terminal through the second switch tube S12 of the control unit 2411, and the source is connected to the common voltage terminal through the driving current source I-1. The gate voltage of the series NMOS transistors M0 and M1 is set to make the voltage Vg0 substantially consistent with that of Vg1, while the threshold voltage Vgs of the series NMOS transistors M0 and M1 are relatively close, so that the voltages of the Vs0 and Vs1 nodes can be made substantially the same, namely the voltages of the current sources I-0 and I-1 are the same, and the matching of the load current source I-0 to the drive current source I-1 can be improved.

The control principle of all output drive branches is the same: the output currents Iout-1, Iout-2 and … … Iout-n can be set by mirroring the current source I-0, and the Vg0 voltage is basically consistent with Vg1, Vg2, … … and Vgn by setting the gate voltages of NMOS tubes M1, M2, … … and Mn which are respectively connected with the NMOS tube M0 in series, while the Vgs voltages of the NMOS tubes M1, M2, … … and Mn are relatively close, so that the Vs0, Vs1, Vs2, … … and Vsn node voltages are basically the same, namely the voltages of the current sources I-1, I-2, … … and I-n are the same, and the matching of the load current source I-0 to the drive current sources I-1, I-2, … … and I-n is improved; the gate voltages of the NMOS transistors M1, M2, … …, Mn are switched by the PWMx signal, thereby realizing dimming. That is, multiplexed output drive circuit, be applicable to the application that needs adjust luminance, be applicable to simultaneously and need bear higher withstand voltage and need the application of higher matching precision.

Referring to fig. 5, a third embodiment of the multi-output driving circuit of the present invention is shown. The difference from the embodiment shown in fig. 4 is that in this embodiment, the regulation unit is further coupled between the driving current source and the corresponding load current source to control the path between the corresponding driving current source and the load current source, i.e. the current sources I-1, I-2, … …, I-N are switched by the PWMx signal to implement dimming. Wherein, the regulation and control unit is only composed of a first switch tube.

Still taking the first output driving branch 241 as an example for explanation, specifically, the gate of the NMOS transistor M1 serving as a driving transistor receives a corresponding preset voltage Vg1, and the source thereof is connected to the driving current source I-1; the driving current source I-1 is connected to the load current source I-0 through the first switch tube S11 of the regulating unit 2411, and the driving current source I-1 is further connected to a common voltage end.

The control principle of all output driving branches is as follows: the output currents Iout-1, Iout-2 and … … Iout-n can be set by mirroring the current source I-0, and the Vg0 voltage is basically consistent with Vg1, Vg2, … … and Vgn by setting the gate voltages of NMOS tubes M1, M2, … … and Mn which are respectively connected with the NMOS tube M0 in series, while the Vgs voltages of the NMOS tubes M1, M2, … … and Mn are relatively close, so that the Vs0, Vs1, Vs2, … … and Vsn node voltages are basically the same, namely the voltages of the current sources I-1, I-2, … … and I-n are the same, and the matching of the load current source I-0 to the drive current sources I-1, I-2, … … and I-n is improved; the switching-in state of the current sources I-1, I-2, … …, I-n is controlled by the PWMx signal, so as to realize dimming. That is, multiplexed output drive circuit, be applicable to the application that needs adjust luminance, be applicable to simultaneously and need bear higher withstand voltage and need the application of higher matching precision.

Based on the same inventive concept, the utility model also provides an L ED driver chip, L ED driver chip is applied to and provides drive current for multichannel load.

Referring to fig. 6, the chip 60 has a first interface CS connected to an external current setting resistor Rset, a second interface Dim for receiving a control signal PWM inputted from the outside of the chip, and a plurality of output interfaces Out 1-Outn, the chip 60 further includes the multi-output driving circuit 20, wherein a current generating unit 21 of the multi-output driving circuit 20 is electrically connected to the current setting resistor Rset through the first interface CS, each of the output driving branches 241-24 n (n is greater than or equal to 2) of the multi-output driving circuit 20 receives the corresponding control signal PWM through the second interface Dim, generates a corresponding output current Iout-x and outputs the output current Iout-x to corresponding loads (a first load 291-n load 29n) through the output interface Outx, the multi-output driving branches can receive the same control signal Dim through the same second interface, and the multi-output driving branches can receive different control signals PWMx through different second interfaces Dim.

Specifically, the current generation unit 21 follows a first reference voltage Vref1 to the current setting resistor Rset to generate and output a constant current I1, the current mirror 22 is electrically connected to the current generation unit 21, the current mirror 22 performs current mirror conversion on the constant current I1 to generate a reference current I2, the current obtaining branch 23 is electrically connected to the current mirror 22 and is used for obtaining and outputting a reference current I2, each output driving branch is electrically connected to the current obtaining branch 23, and the reference current I2 is proportionally mirrored under the control of a corresponding regulation signal PWMx to generate a corresponding output current Iout-x and output the corresponding output current Iout-x to a corresponding load 29x, wherein the first reference voltage Vref1 and the second reference voltage Vref2 can be generated according to a chip internal supply voltage, the load 29x can be a single 732 ED lamp or a plurality of L ED lamps connected in series L string, and specific structures and beneficial effects of the multi-path output driving circuit 20 are not described in detail herein.

Adopt multiplexed output drive circuit's L ED drive chip, owing to only need single resistance can set up two or more ways output current, can save peripheral components and parts quantity and cost, reduce encapsulation cost and volume, can control output current's output through regulation and control signal simultaneously, realize adjusting luminance.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of improvements and decorations can be made without departing from the principle of the present invention, and these improvements and decorations should also be regarded as the protection scope of the present invention.

Claims

1. A multi-output driver circuit, comprising:

a current generation unit for generating and outputting a constant current;

the current mirror is electrically connected with the current generation unit and is used for carrying out current mirror image conversion on the constant current to generate a reference current;

the current acquisition branch circuit is electrically connected with the current mirror and used for acquiring and outputting the reference current; and

and the multiple output driving branches are respectively electrically connected with the current acquisition branch, and each output driving branch is used for proportionally mirroring the reference current under the control of a regulation signal, generating corresponding output current and outputting the corresponding output current to a corresponding load.

2. The multi-output driver circuit as claimed in claim 1, wherein the control signal is a PWM signal.

3. The multi-output driving circuit as claimed in claim 1, wherein the current generating unit comprises a voltage follower and a first reference voltage, the voltage follower is electrically connected to a current setting resistor for following the first reference voltage to the current setting resistor, thereby generating the constant current and outputting the constant current.

4. The multi-output driver circuit according to claim 3, wherein the voltage follower is composed of an operational amplifier and an output transistor;

the positive input end of the operational amplifier receives the first reference voltage, the negative input end of the operational amplifier is connected to a common voltage end through a current setting resistor, and the output end of the operational amplifier is connected to the control end of the output transistor;

the first end of the output transistor is connected to the common voltage end through the current setting resistor, the second end of the output transistor is used as the output end of the voltage follower, and the output transistor is used for responding to the output of the operational amplifier so as to output the constant current.

5. The multi-output driver circuit of claim 1, wherein the current mirror includes a first mirror transistor and a second mirror transistor;

the first mirror transistor is used for receiving the constant current;

the second mirror transistor is used for generating the reference current according to the constant current.

6. The multi-output driver circuit as claimed in claim 1, wherein the current obtaining branch comprises a load transistor, and the load transistor is used as a load of the current mirror, obtains the reference current and outputs the reference current.

7. The multi-output driving circuit according to claim 6, wherein each of the output driving branches comprises a control unit and a driving transistor;

the regulation and control unit is used for responding to the regulation and control signal and controlling the conduction of the driving transistor;

the driving transistor is used for conducting under the control of the regulating and controlling unit, mirroring the reference current in proportion, generating and outputting corresponding output current.

8. The multi-output driver circuit as claimed in claim 7, wherein the driver transistor and the load transistor are of the same type, and the output current of the output driver branch is adjusted by adjusting the device parameter of the driver transistor.

9. The multi-output driver circuit according to claim 7, wherein the control unit comprises at least a first switch tube;

the first switch tube is used for responding to the regulation and control signal to be closed so as to control the conduction of the driving transistor.

10. The multi-output driver circuit as claimed in claim 7, wherein the multi-output driver circuit further comprises a voltage setting module, a load current source connected to the load transistor and a driving current source connected to each of the driving transistors;

the voltage setting module is used for generating a preset voltage according to a second reference voltage and respectively outputting the preset voltage to the control end of the load transistor and the control end of the driving transistor;

wherein the voltage across the load current source is substantially the same as the voltage across the drive current source by setting the preset voltage.

11. The multi-output driver circuit of claim 10,

the regulation and control unit is further coupled between the voltage setting module and the control end of the driving transistor to control a path from the preset voltage to the control end of the driving transistor; or the like, or, alternatively,

the regulation unit is further coupled between the driving current source and the load current source to control a path between the driving current source and the load current source.

12. An L ED driving chip, wherein the L ED driving chip is used for providing driving current for a plurality of paths of loads, and is characterized in that the chip is provided with a first interface connected with an external current setting resistor, a second interface for receiving a regulation signal input from the outside of the chip, and a plurality of output interfaces;

the chip further comprises the multi-output driving circuit according to any one of claims 1 to 11, wherein a current generating unit of the multi-output driving circuit is electrically connected to the current setting resistor through the first interface, and each output driving branch of the multi-output driving circuit receives a corresponding control signal through the second interface, generates a corresponding output current, and outputs the output current to a corresponding load through one output interface.