CN210723026U - Transistor structure - Google Patents
Transistor structure Download PDFInfo
- Publication number
- CN210723026U CN210723026U CN201922237511.6U CN201922237511U CN210723026U CN 210723026 U CN210723026 U CN 210723026U CN 201922237511 U CN201922237511 U CN 201922237511U CN 210723026 U CN210723026 U CN 210723026U
- Authority
- CN
- China
- Prior art keywords
- type
- region
- photodiode
- layer
- triode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Light Receiving Elements (AREA)
Abstract
The embodiment of the utility model discloses transistor structure. The transistor structure comprises a photodiode and a triode, wherein the photodiode comprises a P-type region and an N-type region, the P-type region and the N-type region of the photodiode are heavily doped regions, an emitting region of the triode is a heavily doped region, and the P-type region or the N-type region of the photodiode is connected with the emitting region of the triode. The utility model discloses technical scheme is through the launch site connection with photodiode's P type district or N type district and triode, and the weak photocurrent that produces photodiode is exported after the triode is enlargied, can realize the photocurrent of amplification, improves photodiode's photoelectric conversion efficiency.
Description
Technical Field
The embodiment of the utility model provides a relate to semiconductor device technical field, especially relate to a transistor structure.
Background
The photodiode as a photoelectric detector can detect the light power incident on the photodiode and complete the conversion function of light/electric signals, and is widely applied to the fields of fingerprint identification and the like, wherein the photodiode with a PIN structure is the most commonly used semiconductor photoelectric detector at present.
In order to solve the problems that a depletion layer of a PN junction is only a few microns, the penetration depth of long wavelength is larger than the width of the depletion layer, and most incident light is absorbed by a neutral region, a layer of intrinsic semiconductor with low doping concentration is arranged in the PN junction, and the structure is called as an I-type region, so that the PIN photodiode is formed. However, the photodiode of the PIN structure has a problem of low photocurrent due to low optical conversion efficiency.
SUMMERY OF THE UTILITY MODEL
An embodiment of the utility model provides a transistor structure to solve the photodiode of PIN structure's light conversion efficiency not high, there is the less problem of photocurrent.
In order to realize the technical problem, the utility model discloses a following technical scheme:
an embodiment of the utility model provides a transistor structure, include: a photodiode and a triode;
the photodiode comprises a P-type region and an N-type region, the P-type region and the N-type region of the photodiode are heavily doped regions, and the emitting region of the triode is a heavily doped region;
the P-type region or N-type region of the photodiode is connected with the emitting region of the triode.
Furthermore, the P-type region or the N-type region of the photodiode is shared with the emitting region of the triode.
Furthermore, the P-type region or the N-type region of the photodiode is connected with the emitting region of the triode through metal or electrically connected.
Furthermore, the emitting region of the triode is doped in an N type or a P type;
the N-type region of the photodiode is doped N-type, and the P-type region of the photodiode is doped P-type.
Further, the N type doping is phosphorus doping; the P-type doping is boron doping.
Furthermore, the triode is a PNP type triode;
the P-type region of the photodiode is coupled to the emitter region of the triode.
Furthermore, the triode is an NPN type triode;
the N-type region of the photodiode is coupled to the emitter region of the transistor.
Further, the transistor structure includes:
a semiconductor substrate having a first conductivity type;
a first layer formed on the semiconductor substrate and having a second conductivity type;
a first trench formed in the first layer;
a second layer formed in the first trench and having a first conductivity type;
an insulating layer covering the semiconductor substrate, the first layer, and the second layer;
a second trench formed in the insulating layer and the second layer;
a third layer formed in the second trench in the second layer and having the second conductivity type and being more heavily doped than the second layer;
a depletion layer formed within the second trench in the insulating layer and on the third layer and having a lighter doping than the third layer;
and a fourth layer formed in the second trench in the insulating layer, on the depletion layer, having the first conductivity type and being more heavily doped than the depletion layer.
Further, the transistor structure further comprises:
a conductive layer formed within the second trench in the insulating layer and on the fourth layer;
the conductive layer is a metal layer or a transparent conductive layer.
Furthermore, the first conduction type is P type, and the second conduction type is N type;
or the first conduction type is an N type, and the second conduction type is a P type.
The embodiment of the utility model provides a transistor structure includes photodiode and triode, and photodiode includes P type district and N type district, and photodiode's P type district and N type district are the heavily doped region, and the launch site of triode is the heavily doped region, and photodiode's P type district or N type district link with the launch site of triode. The P-type region or the N-type region of the photodiode is connected with the emitting region of the triode, so that weak photocurrent generated by the photodiode is amplified by the triode and then output, the photocurrent is amplified, and the photoelectric conversion efficiency of the photodiode is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required to be used in the description of the embodiments of the present invention will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the contents of the embodiments of the present invention and the drawings without creative efforts.
Fig. 1 is a schematic diagram of a transistor structure according to an embodiment of the present invention;
fig. 2 is a schematic diagram of another transistor structure provided by an embodiment of the present invention;
fig. 3 is a schematic diagram of another transistor structure provided by the embodiment of the present invention;
fig. 4 is a schematic diagram of another transistor structure provided by the embodiment of the present invention;
fig. 5 is a schematic diagram of another transistor structure provided by the embodiment of the present invention;
fig. 6 is a schematic diagram of another transistor structure provided by an embodiment of the present invention;
fig. 7 is a schematic diagram of another transistor structure according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
As mentioned in the background art, the conventional PIN structured photodiode has a problem that its optical conversion efficiency is not high and its photocurrent is small. The inventor finds that although a depletion layer is added to the photodiode with the conventional PIN structure, the absorption capacity of light is improved, most incident light is absorbed by a neutral region due to the fact that the penetration depth of light with long wavelength is larger than the width of the depletion layer, and the photoelectric conversion efficiency is reduced.
Based on the above technical problem, the present embodiment proposes the following solutions:
an embodiment of the utility model provides a transistor structure. Fig. 1 is a schematic diagram of a transistor structure according to an embodiment of the present invention. Referring to fig. 1, the embodiment of the present invention provides a transistor structure 100 including a photodiode 1 and a transistor 2, wherein the photodiode 1 includes a P-type region 11 and an N-type region 12, the P-type region 11 and the N-type region 12 of the photodiode 1 are heavily doped regions, an emitting region 21 of the transistor 2 is a heavily doped region, and the P-type region 11 or the N-type region 12 of the photodiode 1 is coupled to the emitting region 21 of the transistor 2.
Specifically, the P-type region 11 and the N-type region 12 of the photodiode 1 are heavily doped regions, which can lengthen the length of the depletion layer of the photodiode 1 as much as possible, the incident light enters the photodiode 1 and is fully absorbed to generate a large number of electron-hole pairs, thereby improving the light absorption efficiency and greatly improving the photoelectric conversion efficiency of the photodiode 1, the emitting region 21 of the triode 2 is a heavily doped region, the emitting region 21 of the triode 2 is doped with a large concentration, which can make more carriers enter the collector region, thereby increasing the amplification factor of the triode, the P-type region 11 or the N-type region 12 of the photodiode 1 is connected with the emitting region 21 of the triode 2, the amplification effect of the triode 2 can achieve the amplification effect of 1 to 100 times on the photocurrent of the photodiode 1, so that the photocurrent output by the photodiode 1 is amplified, and the photoelectric conversion efficiency is improved. It should be noted that fig. 1 exemplarily shows a case where the N-type region 12 of the photodiode 1 is coupled to the emitting region 21 of the transistor 2, and the region with padding in fig. 1 is a heavily doped region. It should be noted that the amplification effect of the triode 2 can achieve the amplification effect of 1 to 100 times on the photocurrent of the photodiode 1, and according to the needs of practical application, the triode 2 with the transistor structure provided in this embodiment can also achieve the reduction of the photocurrent of the photodiode 1 by a certain multiple, so that the triode 2 can achieve the conversion of 0.1 to 100 times on the photocurrent of the photodiode 1 to meet different application conditions.
The transistor structure provided by the embodiment comprises a photodiode and a triode, wherein the photodiode comprises a P-type region and an N-type region, the P-type region and the N-type region of the photodiode are heavily doped regions, an emitting region of the triode is a heavily doped region, and the P-type region or the N-type region of the photodiode is connected with the emitting region of the triode. The P-type region or the N-type region of the photodiode is connected with the emitting region of the triode, so that weak photocurrent generated by the photodiode is amplified by the triode and then output, the photocurrent is amplified, and the photoelectric conversion efficiency of the photodiode is improved.
Alternatively, fig. 2 is a schematic diagram of another transistor structure provided in the embodiment of the present invention. Referring to fig. 2, the P-type region 11 or the N-type region 12 of the photodiode 1 is shared with the emission region 21 of the transistor 2.
Specifically, since the P-type region 11 or the N-type region 12 of the photodiode 1 is a heavily doped region, and the emitter region 21 of the transistor 2 is a heavily doped region, the P-type region 11 or the N-type region 12 of the photodiode 1 and the emitter region 21 of the transistor 2 are shared, so that the doping process of ion implantation can be simplified during ion implantation, and the space of the P-type region 11 or the N-type region 12 of the photodiode 1 or the emitter region 21 of the transistor 2 can be saved, thereby reducing the size of the transistor structure 100. It should be noted that fig. 2 exemplarily shows a case where the N-type region 12 of the photodiode 1 is shared with the emission region 21 of the transistor 2.
Optionally, fig. 3 is a schematic diagram of another transistor structure provided in the embodiment of the present invention. Referring to fig. 3, the P-type region 11 or the N-type region 12 of the photodiode 1 is connected to the emitting region 21 of the transistor 2 by metal bonding or electrical connection.
Specifically, the P-type region 11 or the N-type region 12 of the photodiode 1 and the emitting region 21 of the triode 2 are connected or electrically connected through metal, and the amplification effect of the triode 2 can achieve the amplification effect of 1 to 100 times on the photocurrent of the photodiode 1, so that the photocurrent is amplified and the photoelectric conversion efficiency is improved. Fig. 3 exemplarily shows a case where the P-type region 11 of the photodiode 1 is electrically connected to the emitter region 21 of the transistor 2. It should be noted that the amplification effect of the triode 2 can achieve the amplification effect of 1 to 100 times on the photocurrent of the photodiode 1, and the triode 2 can also achieve the reduction of the photocurrent of the photodiode 1 by a certain factor according to the needs of practical application occasions, so that the triode 2 can also achieve the conversion of 0.1 to 100 times on the photocurrent of the photodiode 1 to meet different application conditions.
Optionally, the emitting region 21 of the transistor 2 is doped N-type or P-type, the N-type region 12 of the photodiode 1 is doped N-type, and the P-type region 11 of the photodiode 1 is doped P-type.
Specifically, the N-type region 12 of the photodiode 1 is doped N-type, the P-type region 11 of the photodiode 1 is doped P-type, the P-type doping can generate high concentration holes, the N-type doping can generate high concentration electrons, the holes generated by incident light move to the N-type region 12 of the photodiode 1, the electrons generated by incident light move to the P-type region 11 of the photodiode 1, so that photocurrent generated from the P-type region 11 to the N-type region 12 is generated, when the transistor 2 is a PNP-type transistor 2, the emitter region 21 of the transistor 2 is doped P-type, when the transistor 2 is an NPN-type transistor 2, the emitter of the transistor 2 is doped N-type, illustratively, the base region of the NPN-type transistor 2 is P-type, the emitter region 21 is N-type, when a positive voltage is input to the base region, electrons of the emitter region 21 are attracted by the holes of the base region to surge toward the base region due to the electric field, because the base region is made to be very thin, only a part of electrons collide with holes of the base region to generate base region current, the other part of electrons gather near the collector junction, the electrons gathered on the collector junction under the action of an electric field pass through the collector junction and collide with the holes gathered on the collector region to generate collector region current, a small photocurrent is input into the emitter region 21 and the base region, the collector region can output a large photocurrent, and the amplification effect on the photocurrent of the photodiode 1 is achieved.
Alternatively, the N-type doping may be phosphorus doping and the P-type doping may be boron doping.
Specifically, the N-type doping after doping with phosphorus can generate high-concentration electrons, the P-type doping after doping with boron can generate high-concentration holes, the concentration of the electrons and the concentration of the holes are increased, the migration speed of the electrons can be improved, the migration rate of the electrons from the N-type region 12 to the P-type region 11 of the photodiode 1 is improved, the efficiency of converting incident light into current by the photodiode is improved, the amplification factor of the triode is improved, and the photocurrent output by the photodiode is further amplified. It is noted that the N-type dopant may be, but is not limited to, phosphorus, and the P-type dopant may be, but is not limited to, boron.
Optionally, fig. 4 is a schematic diagram of another transistor structure provided in the embodiment of the present invention. Referring to fig. 4, the transistor 2 is a PNP transistor, and the P-type region 11 of the photodiode 1 is coupled to the emitter region 21 of the transistor 2.
Specifically, the triode 2 is a PNP triode, the emitter region 21 is a P-type region, the emitter E corresponds to the electrode E, a layer of intrinsic semiconductor with very low doping concentration is arranged in a PN junction of the photodiode 1, i.e., the I-type region 13, the structure is a PIN photodiode 1, the N-type region 12 of the photodiode 1 corresponds to the electrode a, and the P-type region 11 of the photodiode 1 is connected with the emitter region 21, i.e., the P-type region, of the triode 2, because the doped particles of the P-type regions are the same, the doping process of ion implantation can be simplified during ion implantation, the space of the P-type region 11 of the photodiode 1 or the emitter region 21 of the triode 2 can be saved, and the size of the transistor structure 100 can be reduced. With continued reference to FIG. 4, the photocurrent I of the photodiode 11From P-type region 11 to N-type region 12, and the current of transistor 2 flows from P-type region of emitter region 21 to N-type region of base region B, with a magnitude of I1Current I of collector region C of triode 22Is equal to β I1β is the amplification factor of the transistor 2, β is greater than 0.1 and less than 100, preferably β is greater than 1 and less than 100, so as to satisfy the amplification effect of the transistor structure 100 on photocurrent the photodiode 1 of the transistor structure 100 converts the incident light signal into photocurrent I1Through the photodiode 1Is coupled to the emitter region 21 of the transistor 2 such that the photocurrent I is generated1The amplified photocurrent I is output from the collector region C under the amplification of the triode 22The efficiency of converting the optical signal into the current signal is further improved.
Optionally, fig. 5 is a schematic diagram of another transistor structure provided in the embodiment of the present invention. Referring to fig. 5, the transistor 2 is an NPN type transistor, and the N-type region 12 of the photodiode 1 is coupled to the emitter region 21 of the transistor 2.
Specifically, the triode 2 is an NPN type triode, the emitter region 21 is an N-type region and corresponds to the electrode E, the P-type region 11 of the photodiode 1 corresponds to the electrode a, and the N-type region 12 of the photodiode 1 is coupled to the emitter region 21 of the triode 2, i.e., the N-type region, and since the doped particles in the N-type region are the same, the doping process of ion implantation can be simplified during ion implantation, and at the same time, the space of the N-type region 12 of the photodiode 1 or the emitter region 21 of the triode 2 can be saved, and the size of the transistor structure 100 can be reduced. With continued reference to fig. 4, the emitter region 21 of the NPN transistor 2 is an N-type region, the base region B is a P-type region, the collector region C is an N-type region, the photodiode 1 may be a PIN photodiode 1, the N-type region 12 of the photodiode 1 has a plurality of electrons collected to form a negative charge region, the P-type region 11 has a plurality of holes collected to form a positive charge region, when incident light impinges on the photodiode 1, a large amount of incident light is absorbed by the I-type region 13, electrons in the hole-electron pairs generated by the I-type region 13 move to the P-type region 11, holes in the hole-electron pairs generated by the I-type region 13 move to the N-type region 12, and an optical signal is converted into a photocurrent I from the P-type region 11 to the N-type region 12, I-electron1Since the width of the type I region 13 is limited, the photocurrent I is obtained1The N-type region 12 of the photodiode 1 is connected with the emitting region 21 of the NPN-type triode 2, namely the N-type region, and the photocurrent I of the photodiode 1 is small1The magnitude of the current is from the emitting region 21 to the base region B of the triode 2, and the amplified photocurrent I is output by the collector region C under the amplification effect of the NPN type triode 22Equal to β I1Thereby improving the photoelectric conversion efficiency of the photodiode 1.
Optionally, fig. 6 is a schematic diagram of another transistor structure provided in the embodiment of the present invention. Referring to fig. 6, transistor structure 100 includes: a semiconductor substrate 61, the semiconductor substrate 61 having a first conductivity type; a first layer 62, the first layer 62 being formed on the semiconductor substrate 61 and having a second conductivity type; a first trench 63, the first trench 63 being formed in the first layer 62; a second layer 64, the second layer 64 being formed in the first trench 63 and having the first conductivity type; an insulating layer 65, the insulating layer 65 covering the semiconductor substrate 61, the first layer 62, and the second layer 64; a second trench 66, the second trench 66 being formed in the insulating layer 65 and the second layer 64; a third layer 67, the third layer 67 being formed in the second trench 66 in the second layer 64 and having the second conductivity type and being more heavily doped than the second layer 64; a depletion layer 68, the depletion layer 68 being formed within the second trench 66 in the insulating layer 65 and on the third layer 67, and having a lighter doping than the third layer 67; a fourth layer 69, the fourth layer 69 being formed within the second trench 66 in the insulating layer 65 and on the depletion layer 68 and having the first conductivity type and being more heavily doped than the depletion layer 68.
Optionally, with continued reference to fig. 6, the transistor structure 100 further includes a conductive layer 60, the conductive layer 60 is formed in the second trench 66 in the insulating layer 65, and on the fourth layer 69, the conductive layer 60 is a metal layer or a transparent conductive layer.
Alternatively, the first conductivity type may be a P-type, and the second conductivity type may be an N-type; alternatively, the first conductive type may be an N-type, and the second conductive type may be a P-type. It should be noted that fig. 6 exemplarily shows a case where the first conductivity type may be a P-type and the second conductivity type may be an N-type, the transistor structure 100 shown in fig. 6 corresponds to the transistor structure 100 shown in fig. 5, and the first layer 62 has the second conductivity type corresponding to the collector region C in fig. 5; the second layer 64 has a first conductivity type corresponding to the base region B in fig. 5; the third layer 67 has a region of the second conductivity type corresponding to the emitter region 21, i.e. electrode E, in fig. 5, and common to the N-type region 12 of the photodiode 1; depletion layer 68 corresponds to type I region 13 in fig. 5; fourth layer 69 has a first conductivity type corresponding to P-type region 11 in fig. 5 and conductive layer 60 corresponding to electrode a in fig. 5.
Fig. 7 is a schematic diagram of another transistor structure according to an embodiment of the present invention. Referring to fig. 7, fig. 7 exemplarily shows a case where the first conductivity type may be an N-type and the second conductivity type may be a P-type, the transistor structure 100 shown in fig. 7 corresponds to the transistor structure 100 shown in fig. 4, and the first layer 62 has the second conductivity type corresponding to the collector region C in fig. 4; the second layer 64 has a first conductivity type corresponding to the base region B in fig. 4; the third layer 67 has a region of the second conductivity type corresponding to the emitter region 21, i.e., electrode E, in fig. 4, and common to the P-type region 11 of the photodiode 1; depletion layer 68 corresponds to type I region 13 in fig. 4; fourth layer 69 has a first conductivity type corresponding to N-type region 12 in fig. 4 and conductive layer 60 corresponding to electrode a in fig. 4.
It should be noted that the foregoing is only a preferred embodiment of the present invention and the technical principles applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail with reference to the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the scope of the present invention.
Claims (10)
1. A transistor structure, comprising: a photodiode and a triode;
the photodiode comprises a P-type region and an N-type region, the P-type region and the N-type region of the photodiode are heavily doped regions, and an emitting region of the triode is a heavily doped region;
the P-type region or the N-type region of the photodiode is coupled to an emission region of the triode.
2. The transistor structure of claim 1,
the P-type region or the N-type region of the photodiode is shared with an emitting region of the triode.
3. The transistor structure of claim 1,
the P-type region or the N-type region of the photodiode is connected with the emitting region of the triode through metal or electrically connected.
4. The transistor structure of claim 1,
the emitting region of the triode is doped in an N type or a P type;
the N-type region of the photodiode is doped in an N-type mode, and the P-type region of the photodiode is doped in a P-type mode.
5. The transistor structure of claim 4,
the N-type doping is phosphorus doping; the P-type doping is boron doping.
6. The transistor structure of claim 1,
the triode is a PNP type triode;
the P-type region of the photodiode is coupled to the emitter region of the triode.
7. The transistor structure of claim 1,
the triode is an NPN type triode;
the N-type region of the photodiode is connected with the emitting region of the triode.
8. The transistor structure of claim 1, further comprising:
a semiconductor substrate having a first conductivity type;
a first layer formed on the semiconductor substrate and having a second conductivity type;
a first trench formed in the first layer;
a second layer formed within the first trench and having a first conductivity type;
an insulating layer covering the semiconductor substrate, the first layer, and the second layer;
a second trench formed in the insulating layer and the second layer;
a third layer formed within the second trench in the second layer and having a second conductivity type and being more heavily doped than the second layer;
a depletion layer formed within the second trench in the insulating layer and on the third layer and having a lighter doping than the third layer;
a fourth layer formed within the second trench in the insulating layer and over the depletion layer, and having the first conductivity type and being more heavily doped than the depletion layer.
9. The transistor structure of claim 8, further comprising:
a conductive layer formed within the second trench in the insulating layer and on the fourth layer;
the conducting layer is a metal layer or a transparent conducting layer.
10. The transistor structure of claim 8,
the first conduction type is a P type, and the second conduction type is an N type;
or, the first conductivity type is N-type, and the second conductivity type is P-type.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922237511.6U CN210723026U (en) | 2019-12-13 | 2019-12-13 | Transistor structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922237511.6U CN210723026U (en) | 2019-12-13 | 2019-12-13 | Transistor structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN210723026U true CN210723026U (en) | 2020-06-09 |
Family
ID=70928974
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201922237511.6U Active CN210723026U (en) | 2019-12-13 | 2019-12-13 | Transistor structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN210723026U (en) |
-
2019
- 2019-12-13 CN CN201922237511.6U patent/CN210723026U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9570647B2 (en) | Avalanche photodiode detector | |
| CN203218303U (en) | Photoelectric detector and radiation detector | |
| CN108538865B (en) | Silicon-based three-photoelectric detector | |
| CN103904152B (en) | Photoelectric detector and manufacturing method thereof and radiation detector | |
| KR101125435B1 (en) | Metal Wrap Through type solar cell | |
| CN114141886A (en) | Avalanche photodiode array detector | |
| CN106252456B (en) | A kind of high-sensitivity phototransistors and its manufacture method | |
| CN113838940A (en) | Integrated photoelectric detector and manufacturing method thereof | |
| CN207572377U (en) | A kind of ultraviolet snowslide drifting detector of more drift ring structures | |
| CN210723026U (en) | Transistor structure | |
| US4160678A (en) | Heterojunction solar cell | |
| CN115224138B (en) | Horizontal pull-through germanium-silicon avalanche photodetector | |
| CN110993708A (en) | Silicon photoelectric detector with current amplification function | |
| CN115295646A (en) | High-performance light detector chip epitaxial wafer | |
| JPS61170079A (en) | Semiconductor light-receiving element | |
| JP3206350B2 (en) | Solar cell | |
| KR101310518B1 (en) | Solar cell and method of manufacturing the same | |
| CN112786635A (en) | Vertical charge transfer type photon demodulator and working method thereof | |
| JP2013501364A (en) | Silicon photomultiplier compatible with high efficiency CMOS technology | |
| CN106571375B (en) | A kind of integrated circuit of silicon substrate APD | |
| CN214043683U (en) | Photovoltaic cell piece and photovoltaic module | |
| CN109904271A (en) | Light sensing semiconductor unit and light sensing semiconductor array | |
| WO2023207245A1 (en) | Photoelectric detector and optical chip | |
| CN214152901U (en) | Vertical charge transfer type photon demodulator | |
| RU2240631C1 (en) | Photodetector |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |