CN210668333U - 芯片封装组件 - Google Patents

芯片封装组件 Download PDF

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CN210668333U
CN210668333U CN201921868059.7U CN201921868059U CN210668333U CN 210668333 U CN210668333 U CN 210668333U CN 201921868059 U CN201921868059 U CN 201921868059U CN 210668333 U CN210668333 U CN 210668333U
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chip
layer
substrate
metal layer
package assembly
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赵源
周涛
郭函
曹流圣
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Bitmain Technologies Inc
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Bitmain Technologies Inc
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Abstract

本申请提供一种芯片封装组件，其封装效率更高并且具有较好的散热性能。所述芯片封装组件包括：基板；芯片，嵌埋在所述基板上的开孔内；金属层，制作于所述基板的第一表面，用于对所述芯片进行散热；至少一个布线层，制作于所述基板的第二表面。

Description

芯片封装组件
技术领域
本申请实施例涉及芯片技术领域，并且更具体地，涉及一种芯片封装组件。
背景技术
传统的芯片封装过程需要先由基板厂商按要求设计、制造基板，然后基板送到封装厂作为封装材料的一部分进行封装。这给芯片的封装带来了成本和周期的增加。并且，对于高密度集成的芯片，在运行时所产生的热量会大幅增加，若不及时排除，将会导致芯片封装组件过热而威胁芯片寿命。
实用新型内容
本申请实施例提供一种芯片封装组件，其封装效率更高并且具有较好的散热性能。
第一方面，提供了一种芯片封装组件，包括：
基板；芯片，嵌埋在所述基板上的开孔内；
金属层，制作于所述基板的第一表面，用于对所述芯片进行散热；至少一个布线层，制作于所述基板的第二表面。
在一种可能的实现方式中，所述芯片的厚度大于所述基板的厚度，所述基板的第一表面上制作有填充材料层，且所述填充材料层的表面的高度与所述芯片的表面的高度相同。
在一种可能的实现方式中，所述填充材料层为ABF材料层。
在一种可能的实现方式中，所述芯片封装组件还包括：PID层，位于所述基板的第二表面与所述至少一个布线层之间。
在一种可能的实现方式中，所述PID层上具有至少一个开窗，所述至少一个开窗用于连通所述芯片与所述至少一个布线层，所述至少一个开窗基于光束扫描形成。
在一种可能的实现方式中，所述芯片封装组件还包括：PI层，位于所述基板的第二表面与所述至少一个布线层之间。
在一种可能的实现方式中，所述PI层上具有至少一个开窗，所述至少一个开窗用于连通所述芯片与所述至少一个布线层，所述至少一个开窗基于光照掩膜版形成。
在一种可能的实现方式中，所述金属层包括第一金属层和第二金属层，其中，所述第一金属层和所述第二金属层之间设置有间隔层，所述间隔层中设置有至少一个通孔，所述第二金属层覆盖所述间隔层且填充所述至少一个通孔。
在一种可能的实现方式中，所述至少一个通孔位于所述间隔层中位于所述芯片上方的部分。
在一种可能的实现方式中，所述芯片封装组件为算力芯片，具有相同结构的多个所述算力芯片设置于同一电路板上。
基于上述技术方案，该芯片封装组件中的芯片嵌埋在基板的开孔内，并且芯片表面制作有用于进行散热的金属层，因此，该芯片封装组件的封装效率更高，并且能够通过表面金属层实现散热，尤其适用于高密度集成的芯片。
附图说明
图1是本申请实施例的芯片封装组件的示意性框图。
图2是基于图1所示的芯片封装组件的一种可能的实现方式的示意图。
图3是芯片表面和基板表面的高度的示意图。
图4是芯片封装组件中PID层和PI层的示意图。
图5是芯片封装组件中的用于散热的金属层的示意图。
图6是芯片封装组件中的用于散热的金属层的示意图。
具体实施方式
下面将结合附图，对本申请中的技术方案进行描述。
传统的芯片封装过程需要先由基板厂商按要求设计、制造基板，然后基板送到封装厂作为封装材料的一部分，从而与芯片一起进行封装。对于高密度集成的芯片，这种方式大大增加了封装周期和成本。应理解，本申请实施例中所述的高密度集成的芯片，是指集成有大量电子元器件的芯片。由于该芯片上分布有大量电子元器件，在工作时会产生较大的热量，因此，在对这类芯片进行封装时，需要考虑芯片散热问题。
为此，本申请实施例提出了一种芯片封装组件，其封装过程更为高效，并且解决了芯片的散热问题，尤其适用于高密度集成的芯片。
图1是本申请实施例的芯片封装组件100的示意性框图。如图1所示，该芯片封装组件100包括：
基板110；
芯片120，嵌埋在基板110上的开孔内；
金属层130，制作于基板110的第一表面，用于对芯片120进行散热；
至少一个布线层140，制作于基板110的第二表面。
该实施例中，基板上设置有开孔，芯片嵌埋至该开孔内。在基板和芯片的一侧制作有金属层，该金属层覆盖芯片和基板的表面。该金属层与芯片表面接触，芯片产生的热量可以直接传导至该金属层，从而实现散热。在基板和芯片的另一侧制作有至少一个布线层，该至少一个布线层包括一个或多个金属层，这些金属层具有特殊的线路结构，用来实现相应的电气功能。
用于对芯片120进行散热的金属层130可以通过背面金属化(BacksideMetallizing，BSM)工艺形成，因此，金属层130也称为BSM层。并且，该BSM层上方还可以焊接散热器，从而进一步改善导热性能。
可以看出，由于芯片嵌埋在基板中，芯片与基板合为一体，可以作为一个整体进行后续加工，方便制作用于对芯片进行散热的金属层。该金属层覆盖芯片和基板的表面，相比于通过绝缘材料覆盖芯片表面，该金属层具有更高的导热效率，并可以通过焊锡将散热器焊接到该金属层上，从而实现对芯片更为高效的散热。
应理解，基板上的开孔可以是开通孔，但本申请实施例并不限于此，也可以采用开盲孔的方式替换开通孔的方式。以下均以该开孔是通孔为例进行描述。
本申请实施例对芯片120和基板110的厚度不做限定。例如，芯片120的厚度可以与基板110的厚度相同，也可以大于基板110的厚度。
其中，可选地，芯片120的厚度大于基板110的厚度时，基板110的第一表面上制作有填充材料层150，且填充材料层150的高度与芯片120的表面的高度相同。
例如图2所示，基板110上设置有开孔，芯片120嵌埋至基板110的开孔中。芯片120的厚度大于基板110的厚度，因此芯片120的上表面高出基板110的上表面。这时，可以通过填充材料150，将芯片120固定在基板110的开孔内。填充材料150用来填充芯片120与开孔之间的间隙。并且，例如图3所示，填充材料150还可以覆盖基板110的上表面，以使基板110的上表面与芯片120的上表面对齐。由于基板110上表面的填充材料层150的高度与芯片120的高度相同，可以使芯片与基板表面更加平整，从而方便后续的金属层130的制作，避免制作过程中金属层130发生翘曲。这时，用于散热的金属层130可以直接覆盖芯片120的表面以及该填充材料150的表面。从图2中可以看出，金属层130与芯片120贴合，而于基板110的上表面之间填充有填充材料150。
在具体实现时，例如可以将芯片120首先与特殊膜层粘连在一起，并通过该膜层，从基板的下侧将芯片120放入基板110的开孔内。接着在基板110的上表面的上方放置压板。由于芯片120的上表面高于基板110的上表面，因此，在基板110的上表面的上方放置压板后，芯片120的表面会与该压板贴合，而基板110的上表面与该压板之间存在间隙。注入填充材料150，使用填充材料150填充芯片120与开孔之间的间隙，以及基板110的上表面与该压板之间的间隙。在对填充材料150进行固化后，就能够将芯片120固定在该开孔内。之后，再将该膜层去除。该膜层例如可以是感光材料膜层，比如UV膜等。
该膜层具有粘性，因此，也可以现将该膜层粘连在基板110的下表面，并使其覆盖基板110上的开孔位置，之后，再将芯片120从基板110的上表面放入该开孔内。由于该膜层具有粘黏性，将芯片120入开孔后，芯片120会被该膜层粘连住，从而保证后续填充时芯片120的位置不发生变化。
在芯片120的研磨过程中，很难完全将芯片120的高度研磨至与基板110的高度完全相同，从而导致后续制作的金属层130容易发生翘曲。而填充材料层130较好地弥补了芯片120和基板110在高度方向上的高度差，可以使芯片120与基板110的表面形成一个完整的平面，方便金属层130的制作，可以避免芯片120上方的金属层130发生翘曲。可以说，这种方式降低了芯片120研磨过程中对精度的要求，减小了加工难度和加工时间。
填充材料150例如可以是味之素复合薄膜(Ajinomoto Build-up Film，ABF)、树脂等材料。这类材料在一种条件下呈液态，而在另一条件下呈固态。例如，该填充材料在不同温度下呈不同的状态；或者在特定波长的光线照射前后呈不同的状态。在进行填充时，该填充材料以液态进行填充，而其由液态变为固态后，可以固定住芯片的位置。
如图2所示，基板110和芯片120的下表面制作有至少一个布线层140，其中布线层140包括金属层M1、金属层M2和金属层M3。金属层M1、金属层M2和金属层M3彼此之间为填充材料150。其中，在基板110的下表面进行金属层M1的生长，其次依次进行通孔和金属层M2、金属层M3的生长。芯片120的焊盘可以与金属层M1电连接。
如图2所示，还可以在金属层M3下方进行焊接/掩膜(Solder/Mask，S/M)处理，并采用例如化学镀镍钯浸金(Electroless Nickel Electroless Palladium Immersion Gold，ENEPIG)技术进行表面处理，从而形成S/M层160和表面处理层170。
此外，还可以采用例如有机可焊性抗氧化处理(Organic Solder-abilityPreservatives，OSP)等方式，对该金属层150的表面进行表面处理，形成OSP层，图2中未示出。
可选地，芯片封装组件100还包括：聚亚酰胺(Polymide，PI)层180，位于基板110的第二表面与至少一个布线层140之间。
其中，PI层180上具有至少一个开窗，该至少一个开窗用于连通芯片120与至少一个布线层140，该至少一个开窗基于光照掩膜版形成。
或者，可选地，芯片封装组件100还包括：可光成像介质(Photo ImaginableDielectric，PID)190，位于基板110的第二表面与至少一个布线层140之间。
其中，PID层190上具有至少一个开窗，该至少一个开窗用于连通芯片120与至少一个布线层140，该至少一个开窗基于光束扫描形成。
如图4所示，芯片120与金属层M1之间设置有PI层180或者PID层190。PI层180和PID层190例如可以实现线路保护、缓冲芯片封装过程中的应力等作用。但是，PI层180的制作需要用到掩膜板，其成本和时间都增加了，而通过PID层190代替PI层180，能够明显降低该芯片封装组件100的封装成本和封装时间。
PI层180在制作时，首先需要在基板110和芯片120的表面覆盖PI材料，并将掩膜板覆盖于基板110表面的PI材料上，并且使用光线照射该掩膜板，以形成具有至少一个开窗的PI层180。
而PID层190在制作时，可以通过光束扫描的方式在PID层上形成开窗。具体地，可以在基板110和芯片120的表面覆盖PID材料，并利用数控的方式提前设置扫描参数，从而利用光束，基于该扫描参数，在PID材料上扫描出开窗，最终形成如图4所示的具有开窗的PID层190。芯片120的焊盘可以通过PID层190的开窗与金属层M1电连接。
可选地，如图5所示，金属层130可以包括第一金属层1301和第二金属层1302，其中，第一金属层1301和第二金属层1302之间设置有间隔层1303，间隔层1303中设置有至少一个通孔，第二金属层1302覆盖间隔层1303且填充至少一个通孔。
在制作金属层130的过程中，可以在基板110的第一表面上先溅射第一金属层1301；在第一金属层1301上覆盖间隔层并在间隔层上刻蚀出至少一个通孔，例如采用干刻蚀的方式形成至少一个通孔；并在具有至少一个通孔的该间隔层上，溅射第二金属层1302。
其中，采用溅射的方式，可以使第二金属层覆盖间隔层的表面，并且将金属材料溅射至间隔层上的通孔内。这样，芯片顶面的热量可以依次通过第一金属层、通孔内的金属、以及第二金属层传导出去。
从图5可以看出，基板110下方设置有布线层140，布线层140中包括金属层M1、金属层M2和金属层M3，由于基板110下侧分布的金属层数量较多，因此容易导致基板110上下两侧的应力分布不均匀，从而使基板110上侧的金属层130易发生翘曲。因此，将金属层130设置为双层结构，增加了基板110上侧的支撑强度，能够均衡基板110上下两侧的应力分布，从而尽量避免翘曲，提高封装可靠性。
该实施例对间隔层上的通孔数量、密度和位置等均不作限定。例如，间隔层上的至少一个通孔，可以设置在该间隔层中位于该芯片上方的部分，从而实现对芯片顶部的散热；或者，例如图6所示，该至少一个通孔也可以均匀地分布在间隔层上。
金属层130可以采用高导热性材料，例如铜、铝等。
间隔层的材料例如可以是ABF或导热硅脂等。
本申请实施例对芯片类型不做限定。例如，封装后的所述芯片可以为算力芯片，具有相同结构的多个所述算力芯片设置于同一电路板上。
应理解，对于传统计算机而言，一片印刷电路板(Printed Circuit Board，PCB)上仅放置一个计算处理器芯片，例如中央处理器(Central Processing Unit，CPU)或者图形处理单元(Graphic Processing Unit，GPU)等。而对于采用算力芯片的产品来说，一片PCB(称为算力板)上往往会密集地放置多个结构相同的计算处理器芯片(称为算力芯片)。并且，在这些算力芯片中，至少两个算力芯片会通过串联的方式连接在一起。
需要说明的是，在不冲突的前提下，本申请描述的各个实施例和/或各个实施例中的技术特征可以任意的相互组合，组合之后得到的技术方案也应落入本申请的保护范围。
应理解，本申请实施例中的具体的例子只是为了帮助本领域技术人员更好地理解本申请实施例，而非限制本申请实施例的范围，本领域技术人员可以在上述实施例的基础上进行各种改进和变形，而这些改进或者变形均落在本申请的保护范围内。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (10)

1.一种芯片封装组件，其特征在于，包括：
基板；
芯片，嵌埋在所述基板上的开孔内；
金属层，制作于所述基板的第一表面，用于对所述芯片进行散热；
至少一个布线层，制作于所述基板的第二表面。
2.根据权利要求1所述的芯片封装组件，其特征在于，所述芯片的厚度大于所述基板的厚度，所述基板的第一表面上制作有填充材料层，且所述填充材料层的表面的高度与所述芯片的表面的高度相同。
3.根据权利要求2所述的芯片封装组件，其特征在于，所述填充材料层为味之素复合膜ABF材料层。
4.根据权利要求1至3中任一项所述的芯片封装组件，其特征在于，所述芯片封装组件还包括：
可光成像介质PID层，位于所述基板的第二表面与所述至少一个布线层之间。
5.根据权利要求4所述的芯片封装组件，其特征在于，所述PID层上具有至少一个开窗，所述至少一个开窗用于连通所述芯片与所述至少一个布线层，所述至少一个开窗基于光束扫描形成。
6.根据权利要求1至3中任一项所述的芯片封装组件，其特征在于，所述芯片封装组件还包括：
聚酰亚胺PI层，位于所述基板的第二表面与所述至少一个布线层之间。
7.根据权利要求6所述的芯片封装组件，其特征在于，所述PI层上具有至少一个开窗，所述至少一个开窗用于连通所述芯片与所述至少一个布线层，所述至少一个开窗基于光照掩膜版形成。
8.根据权利要求1至3中任一项所述的芯片封装组件，其特征在于，所述金属层包括第一金属层和第二金属层，其中，所述第一金属层和所述第二金属层之间设置有间隔层，所述间隔层中设置有至少一个通孔，所述第二金属层覆盖所述间隔层且填充所述至少一个通孔。
9.根据权利要求8所述的芯片封装组件，其特征在于，所述至少一个通孔位于所述间隔层中位于所述芯片上方的部分。
10.根据权利要求1至3中任一项所述的芯片封装组件，其特征在于，所述芯片封装组件为算力芯片，具有相同结构的多个所述算力芯片设置于同一电路板上。
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