CN210607245U - Module stacking and packaging structure - Google Patents
Module stacking and packaging structure Download PDFInfo
- Publication number
- CN210607245U CN210607245U CN201921275288.8U CN201921275288U CN210607245U CN 210607245 U CN210607245 U CN 210607245U CN 201921275288 U CN201921275288 U CN 201921275288U CN 210607245 U CN210607245 U CN 210607245U
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- Prior art keywords
- circuit substrate
- package
- electrically connected
- opening
- packaged
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19106—Disposition of discrete passive components in a mirrored arrangement on two different side of a common die mounting substrate
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- Combinations Of Printed Boards (AREA)
Abstract
The utility model provides a module piles up packaging structure, it contains: a circuit substrate; a first system-in-package electrically connected to and packaged on a first side surface of the circuit substrate; a second system-in-package electrically connected to and packaged on a second side of the circuit substrate; the second circuit substrate is provided with an opening, a first side surface of the second circuit substrate is provided with a plurality of electric contacts, the circuit substrate is stacked on the second circuit substrate, each first connecting element is respectively and electrically connected with each electric contact, and part or all of electronic components of the second system-level package are accommodated in the opening. Therefore, the utility model discloses can reach not only easily with signal integration output and radiating effect good, can make whole stack up encapsulation weight reduction, volume reduce, manufacturing is convenient, reaches the efficiency.
Description
Technical Field
The utility model relates to a encapsulation indicates a module piles up packaging structure especially.
Background
The common package of substrate or circuit board is formed by stacking one or more than two substrates or circuit boards, and the front or back of a single substrate or circuit board is often packaged with the plural active and passive components with electronic components, so when two or more substrates or circuit boards are stacked for packaging, the heat dissipation problem of electronic components (especially the heat dissipation when the main control chip is located between two substrates or two circuit boards) will be generated between the two substrates or two circuit boards, and the stacking of two substrates or two circuit boards (with a bulky chip) will inevitably cause the problem of larger overall package volume, and in addition, because the stacking packaging of two substrates or two circuit boards will also cause the design of circuit connection between the two substrates or two circuit boards to be more complicated.
SUMMERY OF THE UTILITY MODEL
Therefore, in view of the above-mentioned processing products related to the module stacked package structure, the inventor of the present invention has earnestly studied and developed innovatively, and has conducted many years of intense research and study, and finally developed a package structure which not only can easily integrate and output signals and has a good heat dissipation effect, but also can reduce the weight, volume and manufacture of the whole stacked package.
In order to achieve the above object, the utility model adopts the following technical scheme:
a module stack package structure, comprising:
a circuit substrate;
a first system-in-package electrically connected to and packaged on a first side surface of the circuit substrate;
a second system-in-package electrically connected to and packaged on a second side of the circuit substrate;
the second circuit substrate is provided with an opening, the circuit substrate is stacked on the second circuit substrate, the circuit substrate is electrically connected to the first side surface of the second circuit substrate through a plurality of first connecting elements, and part or all of electronic components of the second system-in-package are accommodated in the opening.
The module stack package structure, wherein: the first connecting element is a solder ball or a solder bump.
The module stack package structure, wherein: the second system in package is a CPU.
The module stack package structure, wherein: the fourth circuit substrate is arranged on the circuit substrate in an overlapping mode, the fourth circuit substrate is electrically connected to the first side face of the circuit substrate through the plurality of third connecting elements, and part or all of electronic components of the first system-in-package are accommodated in the groove.
The module stack package structure, wherein: the third connecting element is a solder ball or a solder bump.
A module stack package structure, comprising:
a circuit substrate;
a first system-in-package electrically connected to and packaged on a first side surface of the circuit substrate;
a second system-in-package electrically connected to and packaged on a second side of the circuit substrate;
a second circuit substrate, on which a groove is arranged, the circuit substrate is stacked on the second circuit substrate, the circuit substrate is electrically connected to the first side surface of the second circuit substrate through a plurality of first connecting elements, and part or all of the electronic components of the second system-in-package are accommodated in the groove;
the second connecting elements are respectively formed on the second side surface of the circuit substrate and are electrically connected with the circuit substrate;
and a third system-level package electrically connected to and packaged on a second side of the second circuit substrate.
The module stack package structure, wherein: the first connecting element and the second connecting element are solder balls or solder bumps.
The module stack package structure, wherein: the first side surface of the third circuit substrate is connected with the first substrate through the second connecting elements, the third circuit substrate is provided with a second opening, and the second system-level package, the second circuit substrate and the third system-level package are accommodated in the second opening.
Therefore, the present invention can be used in a stacked package manner, and mainly rely on the opening formed in the second circuit board below, so that the electronic component of the second system-in-package on the second side of the circuit board can be accommodated in the opening and exposed. Therefore, the utility model discloses can reach not only easily with signal integration output and radiating effect good, can make whole stack up encapsulation weight reduction, volume reduce, manufacturing is convenient, reaches the efficiency.
Drawings
Fig. 1A is a schematic side view of the structure of the first embodiment of the present invention.
Fig. 1B is a schematic side view of the first embodiment of the present invention.
Fig. 2 is a schematic view of the three-dimensional structure of the preferred embodiment of the present invention and the use of connecting other modules.
Fig. 3A is a schematic side view of the structure of the second embodiment of the present invention.
Fig. 3B is a schematic side view of the second embodiment of the present invention.
Fig. 4A is a schematic side view of the third embodiment of the present invention.
Fig. 4B is a schematic side view of the third embodiment of the present invention.
Fig. 5A is a schematic side view of the fourth embodiment of the present invention.
Fig. 5B is a schematic side view of the fourth embodiment of the present invention.
Description of reference numerals: [ the utility model ] 1 circuit board; 11 a first side; 12 a second side; 2 a first system in package; 3a second system in package; 4a first connecting element; 41 a second connecting element; 5a second circuit substrate; 50 a first side; 51, opening a hole; 52 electrical contacts; 53 grooves; 54 a second side; 55 a third system level package; 6 a third circuit board; 61 a first side; 62 a second opening; 7 a fourth circuit board; 71 a third connecting element; 72 a first side; 73 a second side; 74 grooves; 8 fourth system in package; 100 transmission flat cables; and 200, modules.
Detailed Description
In order to make it convenient to understand the other characteristic contents and advantages of the present invention and the efficacy achieved thereby more clearly, the present invention is described in detail with reference to the accompanying drawings as follows:
referring to fig. 1A, fig. 1B and fig. 2, a main object of the present invention is to provide a module stacking and packaging structure, which includes: a circuit substrate 1, a first system-in-package 2, a second system-in-package 3, a plurality of first connecting elements 4 and a second circuit substrate 5. Preferably, the second circuit substrate 5 can be used as a Carrier Board (Carrier Board).
The first system-in-package 2 is electrically connected and packaged on a first side 11 of the circuit substrate 1, and the second system-in-package 3 is electrically connected and packaged on a second side 12 of the circuit substrate 1. The plurality of first connecting elements 4 are respectively formed on the second side 12 of the circuit substrate 1, and the plurality of first connecting elements 4 are electrically connected to the circuit substrate 1, so that the electronic components of the first system-in-package 2 and the second system-in-package 3 can be electrically connected to the first connecting elements 4 through the circuit design (Layout) of the circuit substrate 1.
The second circuit substrate 5 has an opening 51, a first side surface 50 of the second circuit substrate 5 has a plurality of electrical contacts 52, the circuit substrate 1 is stacked on the second circuit substrate 5, so that each of the first connecting elements 4 is electrically connected to each of the electrical contacts 52 on the first side surface 50 of the second circuit substrate 5, and part or all of the electronic components of the second system-in-package 3 are accommodated in the opening 51.
The present invention is further described, for ease of understanding, in a single stacked package. The utility model is mainly made by using the electronic assembly technology of Surface-mount technology (SMT). The active and passive electronic components of the first system-in-package 2 and the second system-in-package 3 are electrically connected to the first side 11 and the second side 12 of the circuit substrate 1 by SMD in sequence.
In this embodiment, the first system-in-package 2 may include active and passive components, such as a combination of a processor (AP, CPU) or a controller or a memory or a communication module (Wi-Fi, bluetooth) or a diode or a resistor or an inductor or a capacitor or related optical components. The plurality of first connection elements 4 may be Solder balls (Solder balls) or Solder bumps (Solder bumps), which are formed by Ball placement (Ball placement) process.
In this embodiment, the second system in package 3 may be a CPU.
Therefore, the present invention can be packaged in a stacked manner, and mainly rely on the opening 51 formed in the lower second circuit substrate 5, so that the second system-in-package 3 on the second side 12 of the circuit substrate 1 can be accommodated in the opening 51 and exposed.
The event the utility model discloses rely on each this electric contact 52 of direct connection on second circuit substrate 5 of this first connecting element 4, cooperation transmission winding displacement 100 draws out and converges and connect in other modules 200, makes the utility model discloses easy with signal output (draw out), the event can reach not only easily with signal integration output, in addition, this trompil 51's setting for inside spare part radiating effect is good, avoids causing the heat dissipation problem of burying, especially, this trompil 51's setting (making the board dig empty), makes whole stack up encapsulation weight and alleviates, and this trompil 51 can hold main, passive electronic component, more can make whole stack up the encapsulation volume and reduce, reaches the efficiency.
In this embodiment, the opening 51 is formed to allow the circuit substrate 1 and the second circuit substrate 5 to be thicker, such as a multi-layer board. And especially, when the active and passive electronic components of the second system-in-package 3 are accommodated in the opening 51, the stacking assembly height of the circuit substrate 1 and the second circuit substrate 5 is not limited (no electronic component is disposed between the circuit substrate 1 and the second circuit substrate 5 (except for the opening 51), so that each first connecting element 4 and each electrical contact 52 can be easily and directly connected and assembled, and the position formed by each first connecting element 4 can be correspondingly designed to form the position of each electrical contact 52 of the second circuit substrate 5, so that the manufacturing convenience can be achieved.
Referring to fig. 3A and 3B, a groove 53 is formed on the second circuit substrate 5, the circuit substrate 1 is stacked on the second circuit substrate 5, the circuit substrate 1 is electrically connected to the first side surface 50 of the second circuit substrate 5 through a plurality of first connecting elements 4, and some or all electronic components of the second system-in-package 3 are accommodated in the groove 53.
A plurality of second connecting elements 41 respectively formed on the second side 12 of the circuit substrate 1, wherein the plurality of second connecting elements 41 are electrically connected to the circuit substrate 1.
A third system-level package 55 electrically connected and packaged on a second side 54 of the second circuit substrate 5.
By means of the groove 53, some or all electronic components of the second system-in-package 3 can be arranged, and the effect of module stacking can be achieved.
Referring to fig. 4A and 4B, the package further includes a third circuit substrate 6, the first side surface 61 of the third circuit substrate 6 is connected to the circuit substrate 1 through each of the second connecting elements 41, the third circuit substrate 6 has a second opening 62, and the second system-in-package 3, the second circuit substrate 5 and the third system-in-package 55 are accommodated in the second opening 62.
The third system level package 55 may include active and passive components, such as a processor (AP, CPU) or a controller or a memory or a communication module (Wi-Fi, bluetooth) or a diode or a resistor or an inductor or a capacitor or a combination of related optical components. The plurality of second connection elements 41 may be Solder balls (Solder balls) or Solder bumps (Solder bumps), which are formed by Ball placement (Ball placement) process.
By means of the second opening 62 formed in the third circuit substrate 6, the third system-level package 55 on the first side 61 of the second circuit substrate 5 can be accommodated in the second opening 62 and exposed.
Referring to fig. 1B, a fourth circuit substrate 7 is further included, a groove 74, a first side surface 72 and a second side surface 73 are disposed on the fourth circuit substrate 7, a plurality of third connecting elements 71 are disposed on the first side surface 72, a fourth system-in-package 8 is electrically connected to and packaged on the second side surface 73, the fourth circuit substrate 7 is stacked on the circuit substrate 1, the fourth circuit substrate 7 is electrically connected to and disposed on the first side surface 11 of the circuit substrate 1 through the plurality of third connecting elements 71, and a part or all of the electronic components of the first system-in-package 2 are accommodated in the groove 74, as shown in fig. 5A and 5B.
The fourth system-in-package 8 may include active and passive components, such as a combination of a processor (AP, CPU) or a controller or a memory or a communication module (Wi-Fi, bluetooth) or a diode or a resistor or an inductor or a capacitor or related optical components. The plurality of third connecting elements 71 may be Solder balls (Solder balls) or Solder bumps (Solder bumps), which are formed by Ball placement (Ball placement) process.
By means of the opening 51 formed in the second circuit substrate 5, the second system-in-package 3 on the second side 12 of the circuit substrate 1 can be accommodated in the opening 51 and exposed, and by means of the recess 74, part or all of the electronic components of the first system-in-package 2 can be disposed, thereby achieving the effect of module stacking.
The foregoing description is intended to be illustrative rather than limiting, and it will be appreciated by those skilled in the art that many modifications, variations or equivalents may be made without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (8)
1. A module stack package structure, comprising:
a circuit substrate;
a first system-in-package electrically connected to and packaged on a first side surface of the circuit substrate;
a second system-in-package electrically connected to and packaged on a second side of the circuit substrate;
the second circuit substrate is provided with an opening, the circuit substrate is stacked on the second circuit substrate, the circuit substrate is electrically connected to the first side surface of the second circuit substrate through a plurality of first connecting elements, and part or all of electronic components of the second system-in-package are accommodated in the opening.
2. The module stack package structure of claim 1, wherein: the first connecting element is a solder ball or a solder bump.
3. The module stack package structure of claim 1, wherein: the second system in package is a CPU.
4. The module stack package structure of claim 1, wherein: the fourth circuit substrate is arranged on the circuit substrate in an overlapping mode, the fourth circuit substrate is electrically connected to the first side face of the circuit substrate through the plurality of third connecting elements, and part or all of electronic components of the first system-in-package are accommodated in the groove.
5. The module stack package structure of claim 4, wherein: the third connecting element is a solder ball or a solder bump.
6. A module stack package structure, comprising:
a circuit substrate;
a first system-in-package electrically connected to and packaged on a first side surface of the circuit substrate;
a second system-in-package electrically connected to and packaged on a second side of the circuit substrate;
a second circuit substrate, on which a groove is arranged, the circuit substrate is stacked on the second circuit substrate, the circuit substrate is electrically connected to the first side surface of the second circuit substrate through a plurality of first connecting elements, and part or all of the electronic components of the second system-in-package are accommodated in the groove;
the second connecting elements are respectively formed on the second side surface of the circuit substrate and are electrically connected with the circuit substrate;
and a third system-level package electrically connected to and packaged on a second side of the second circuit substrate.
7. The module stack package structure of claim 6, wherein: the first connecting element and the second connecting element are solder balls or solder bumps.
8. The module stack package structure of claim 6, wherein: the first side surface of the third circuit substrate is connected with the first substrate through the second connecting elements, the third circuit substrate is provided with a second opening, and the second system-level package, the second circuit substrate and the third system-level package are accommodated in the second opening.
Priority Applications (1)
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CN201921275288.8U CN210607245U (en) | 2019-08-07 | 2019-08-07 | Module stacking and packaging structure |
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CN201921275288.8U CN210607245U (en) | 2019-08-07 | 2019-08-07 | Module stacking and packaging structure |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113314472A (en) * | 2021-04-20 | 2021-08-27 | 中国科学院声学研究所 | System-on-chip based on FPC substrate |
CN113745202A (en) * | 2021-06-04 | 2021-12-03 | 荣耀终端有限公司 | Packaging module, manufacturing method thereof and electronic equipment |
-
2019
- 2019-08-07 CN CN201921275288.8U patent/CN210607245U/en active Active
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113314472A (en) * | 2021-04-20 | 2021-08-27 | 中国科学院声学研究所 | System-on-chip based on FPC substrate |
CN113745202A (en) * | 2021-06-04 | 2021-12-03 | 荣耀终端有限公司 | Packaging module, manufacturing method thereof and electronic equipment |
WO2022252888A1 (en) * | 2021-06-04 | 2022-12-08 | 荣耀终端有限公司 | Packaging module and manufacturing method therefor, and electronic apparatus |
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