CN210490824U - Inrush current suppression circuit - Google Patents
Inrush current suppression circuit Download PDFInfo
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- CN210490824U CN210490824U CN201921883212.3U CN201921883212U CN210490824U CN 210490824 U CN210490824 U CN 210490824U CN 201921883212 U CN201921883212 U CN 201921883212U CN 210490824 U CN210490824 U CN 210490824U
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Abstract
A surge current suppression circuit comprises a first switch, a pre-charging branch circuit, a third switch, a first voltage detection circuit, a second voltage detection circuit and a control device. The first switch is connected between the input voltage and the bus capacitor; the pre-charging branch circuit is connected with the first switch in parallel and comprises a second switch and a resistor which are connected in series; the third switch is connected between the bus capacitor and the load, and the load is connected with the bus capacitor in parallel; the first voltage detection circuit is used for detecting the magnitude of the input voltage; the second voltage detection circuit is used for detecting the voltage of the bus capacitor. The input end of the control device is respectively connected with the output end of the first voltage detection circuit and the output end of the second voltage detection circuit, and the output end of the control device is respectively connected with the control ends of the first switch, the second switch and the third switch. The utility model discloses produced impulse current when can effectively restrain the switch and switch on, the commonality is good, and is with low costs.
Description
Technical Field
The utility model relates to an impulse current restraines technique.
Background
A large number of controllers are used in a vehicle, some of which contain power modules, such as power converters that provide power, which can directly drive an electric motor or solenoid valve load. In a power module, a bus capacitor with a large capacitance value is required to maintain normal operation of the device, and an internal bus of a controller is usually connected to an input power supply of the controller through an input power switch, which is usually a semiconductor switch, such as a MOS transistor, a triode, or the like. In the process of electrifying the controller, the input power switch is conducted, and the bus capacitor is charged. If left uncontrolled, a large inrush current can be generated when the input power switch is turned on, thereby affecting the power supply network and causing undesirably large stresses on the semiconductor devices.
At present, the following two methods are mainly used to reduce the inrush current when the input power switch is closed:
method 1, the input power switch is driven slowly to work in the linear region to limit the inrush current, or the input power switch is turned on continuously for a short time to limit the average power, so that the generated stress does not exceed the safe working region of the input power switch. The limitation of the method 1 is that the current-voltage characteristic of the on and off processes of the input power switch is non-linear, so that the peak value of the surge current is very difficult to control and varies greatly with the ambient temperature. A large amount of energy is lost in the input power switch in the process of charging the bus capacitor, so that the input power switch has to use a semiconductor switch device with higher current and power specifications, and the cost is greatly increased;
SUMMERY OF THE UTILITY MODEL
The utility model aims to solve the technical problem that an impact current suppression circuit that produced when can effectively restrain the switch and switch on, commonality are good, with low costs is provided.
The embodiment of the utility model provides an impulse current suppression circuit, include: a first switch connected between the input voltage and the bus capacitor; a pre-charging branch connected in parallel with the first switch, the pre-charging branch comprising a second switch and a resistor connected in series; the third switch is connected between the bus capacitor and the load, and the load is connected with the bus capacitor in parallel; the first voltage detection circuit is used for detecting the magnitude of the input voltage; the second voltage detection circuit is used for detecting the voltage of the bus capacitor; the input end of the control device is respectively connected with the output end of the first voltage detection circuit and the output end of the second voltage detection circuit, and the output end of the control device is respectively connected with the control end of the first switch, the control end of the second switch and the control end of the third switch; the control device is used for controlling the second switch to be connected and controlling the first switch and the third switch to be disconnected so that the input voltage charges the bus capacitor through the pre-charging branch, whether the voltage difference value between the input voltage and the voltage of the bus capacitor is smaller than or equal to a preset first voltage difference threshold value or not is judged in real time, and when the voltage difference value between the input voltage and the voltage of the bus capacitor is smaller than or equal to the preset first voltage difference threshold value, the first switch is sequentially controlled to be connected, the second switch is controlled to be disconnected and the third switch is controlled to be connected.
After the technical scheme is adopted, the utility model discloses following advantage and characteristics have at least:
1. the utility model discloses in, can cut off load through the disconnection of control third switch, switch on, accomplish the back that charges of bus-bar capacitance at the second switch, the voltage difference at both ends is more close to 0V when first switch switches on, and consequently surge current and stress when first switch switches on are littleer, can satisfy more severe surge current requirement. Correspondingly, a low-current low-power semiconductor switch device with low cost can be selected as the first switch, so that the effect of reducing the cost is achieved;
2. compared with the prior art, the embodiment of the utility model provides a can select the resistance of higher resistance, lower power level under the same condition, neither can switch on the surge current of in-process to first switch and produce obvious influence, can make the second switch on in-process impulse current lower again, the encapsulation of the resistance of bigger resistance, lower power level is also littleer to but reduce cost, and reduce the current consumption at precharge stage generating line circuit. Correspondingly, in the embodiment of the present invention, a low-current low-power semiconductor switch device with lower cost can be also selected as the second switch, so as to achieve the effect of reducing cost;
3. adopt the embodiment of the utility model provides a, the adjustment to the load can not lead to the surge current's in-process obvious change at first switch conduction. This means that the versatility of the embodiments of the present invention is higher, e.g. the design may be unchanged only in case of load changes, so that the costs in the design, test and production phases may be reduced;
4. in the process of conducting the second switch, because the load is in a non-working state, even if unexpected change occurs in the load, surge current cannot be increased, and the switching device cannot be damaged.
Drawings
Fig. 1 shows a circuit schematic of a conventional inrush current suppression circuit.
Fig. 2 shows a schematic circuit diagram of a surge current suppression circuit according to an embodiment of the present invention.
Fig. 3 shows a schematic diagram of control signals sent by the control device to the first switch, the second switch and the third switch according to an embodiment of the present invention.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.
The inventors have found in practice that the method 2 described in the "background" section of the present specification suffers from the following disadvantages:
1. after the second switch S2 is turned on, the load 9 is also energized to generate an operating current, which causes a voltage drop across the resistor R1, so that a certain surge current still exists during the turn-on of the first switch S1, and a high-cost, large-current and high-power semiconductor switching device has to be used. In addition, with the increasing precision of automobile electronic design, the control requirement on surge current will be more and more strict, so that the method 2 cannot meet the more and more severe surge current requirement in the future;
2. in the prior art, generally, a resistor R1 with a lower resistance value and a higher power level is selected as much as possible, so that the voltage drop across the resistor R1 can be reduced to a certain extent, and thus the surge current when the first switch S1 is closed is reduced, but correspondingly, the lower resistance value of R1 also means that the suppression effect of the surge current when the second switch S2 is turned on is poor, and in addition, the lower resistance value of the high-power resistor R1 means higher power consumption and larger package, and a high-cost high-current high-power semiconductor switching device is required to be used as the second switch S2, which leads to increased cost and power consumption;
3. in different design schemes, the resistor R1 needs to be adjusted according to the input voltage, the load 9 and the surge current design requirement, which means more time, equipment and manpower are needed to reselect and test the resistor R1 to meet the design requirement of the scheme, and more types of resistors R1 need to be stored and managed in the factory, thereby causing the cost to rise greatly;
4. if unexpected changes occur in the load 9 during the conduction of the second switch S2, for example, if the current flowing through the load 9 is larger than the normal range due to a fault or deterioration of the use environment of the load 9, unexpected increases in the voltage across the load 9 may occur, that is, the inrush current during the conduction of the first switch S1 may also become larger than expected, which may further lead to undesirable consequences, for example, damage or malfunction of the switching device, or malfunction of other circuits than the load 9.
The prior art cannot solve the technical problems.
Fig. 2 shows a schematic circuit diagram of a surge current suppression circuit according to an embodiment of the present invention. The inrush current suppression circuit according to an embodiment of the present invention includes a first switch S1, a pre-charge branch, a third switch S3, a first voltage detection circuit 11, a second voltage detection circuit 12, and a control device 3.
The first switch S1 is connected between the input voltage and the bus capacitance C1. The pre-charging branch is connected in parallel with the first switch S1, and includes a second switch S2 and a resistor R1 connected in series. The third switch S3 is connected between the bus capacitor C1 and the load 9, and the load 9 is connected in parallel with the bus capacitor C1. The input voltage can be provided by a power supply or a voltage conversion circuit. The first switch S1 is an input safety switch of a product, and a semiconductor power switch, such as a MOS transistor, is generally used. In the present embodiment, the second switch S2 and the third switch S3 also employ semiconductor switches, such as MOS transistors.
The first voltage detection circuit 11 is used for detecting the magnitude of the input voltage; the second voltage detection circuit 12 is used for detecting the voltage of the bus capacitor C1.
The input terminals of the control device 3 are connected to the output terminals of the first voltage detection circuit 11 and the second voltage detection circuit 12, respectively, and the output terminal of the control device 3 is connected to the control terminal of the first switch S1, the control terminal of the second switch S2, and the control terminal of the third switch S3, respectively. The control device 3 is configured to control the second switch S2 to be turned on and control the first switch S1 and the third switch S3 to be turned off, so that the input voltage charges the bus capacitor C1 through the pre-charging branch, and determine whether a voltage difference between the input voltage and the voltage of the bus capacitor C1 is smaller than or equal to a preset voltage difference threshold in real time, and when the voltage difference between the input voltage and the voltage of the bus capacitor C1 is smaller than or equal to the preset voltage difference threshold, sequentially control the first switch S1 to be turned on, the second switch S2 to be turned off, and the third switch S3 to be turned on.
Optionally, the control device is an MCU inside the product.
According to the utility model discloses an impulse current suppression circuit's working process as follows:
step a1, the control device 3 controls the second switch S2 to be turned on and controls the first switch S1 and the third switch S3 to be turned off, so that the input voltage is charged to the bus capacitor C1 through the pre-charging branch;
in the power-on stage of the product, the first switch S1, the second switch S2 and the third switch S3 are all turned off, when the control device 3 detects that the product meets the power-on condition (for example, the power-on button is pressed, or the input voltage enters a predetermined power-on range, or the product is awakened by the internet), the second switch S2 is controlled to be turned on, at this time, the input voltage charges the bus capacitor C1 through the pre-charging branch formed by the resistor R1 and the second switch S2, the magnitude of the charging peak current does not exceed the input voltage/R1, so the peak current is controllable and easy to adjust, and the value of the resistor R1 can be preset according to the peak charging current to be controlled and the required charging time. The third switch S3 is used to disconnect the load 9 of the bus from the bus during the charging process, so that the actual load on the bus is very small and the voltage of the bus capacitor C1 is very close to the input voltage after the charging process is over;
in step a2, the control device 3 determines whether the voltage difference between the input voltage and the voltage of the bus capacitor C1 is less than or equal to a preset first voltage difference threshold (the magnitude of the first voltage difference threshold is, for example, 1V), and when the voltage difference between the input voltage and the voltage of the bus capacitor is less than or equal to the preset first voltage difference threshold, sequentially controls the first switch S1 to be turned on, the second switch S2 to be turned off, and the third switch S3 to be turned on. When the first switch S1 is controlled to be turned on, the first switch S1 does not generate large rush current and high stress during the turn-on process because the bus capacitor voltage at this time is already pre-charged to be very close to the input voltage. Fig. 3 shows a schematic diagram of control signals sent by the control device 3 to the first switch S1, the second switch S2 and the third switch S3 according to an embodiment of the present invention.
Further, when a first preset time elapses from the time when the second switch S2 is turned on and the first switch S1 and the third switch S3 are controlled to be turned off, if it is determined that the voltage difference between the input voltage and the bus capacitor voltage is still greater than the preset first voltage difference threshold, it indicates that a product has a defect or that the external condition does not meet the requirement, the control device 3 controls the first switch S1 and the third switch S3 to be turned off to protect the circuit. The first preset time may be selected to be 300 ms. The first preset time can also be adjusted according to actual circuit parameters.
The utility model discloses impulse current suppression circuit can control charging current and time betterly to inside the energy loss most of charging process concentrates on resistance, and is less to semiconductor switch's pressure, thereby can choose for use low-cost undercurrent low-power semiconductor switch as first switch and second switch, the cost is reduced.
It will be apparent to those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (4)
1. A rush current suppression circuit, comprising;
a first switch connected between the input voltage and the bus capacitor;
a pre-charge branch connected in parallel with the first switch, the pre-charge branch comprising a second switch and a resistor connected in series;
a third switch connected between the bus capacitor and a load, the load being connected in parallel with the bus capacitor;
the first voltage detection circuit is used for detecting the magnitude of the input voltage;
the second voltage detection circuit is used for detecting the voltage of the bus capacitor;
the input end of the control device is respectively connected with the output end of the first voltage detection circuit and the output end of the second voltage detection circuit, and the output end of the control device is respectively connected with the control end of the first switch, the control end of the second switch and the control end of the third switch; the control device is used for controlling the second switch to be switched on and controlling the first switch and the third switch to be switched off so as to enable the input voltage to charge the bus capacitor through the pre-charging branch, judging whether a voltage difference value between the input voltage and the voltage of the bus capacitor is smaller than or equal to a preset first voltage difference threshold value or not in real time, and sequentially controlling the first switch to be switched on, the second switch to be switched off and the third switch to be switched on when the voltage difference value between the input voltage and the voltage of the bus capacitor is smaller than or equal to the preset first voltage difference threshold value.
2. The inrush current suppression circuit of claim 1, wherein: the first switch, the second switch and the third switch are all MOS tubes.
3. The inrush current suppression circuit of claim 1, wherein the control device is an MCU.
4. The inrush current suppression circuit of claim 1, wherein the first voltage difference threshold is 1V.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921883212.3U CN210490824U (en) | 2019-11-04 | 2019-11-04 | Inrush current suppression circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921883212.3U CN210490824U (en) | 2019-11-04 | 2019-11-04 | Inrush current suppression circuit |
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| CN210490824U true CN210490824U (en) | 2020-05-08 |
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| CN201921883212.3U Active CN210490824U (en) | 2019-11-04 | 2019-11-04 | Inrush current suppression circuit |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110677145A (en) * | 2019-11-04 | 2020-01-10 | 科博达技术股份有限公司 | Impulse current suppression circuit and method for suppressing impulse current thereof |
| CN112564078A (en) * | 2020-11-18 | 2021-03-26 | 华为技术有限公司 | Power supply system, slow starting circuit and control method |
| CN113765084A (en) * | 2021-09-10 | 2021-12-07 | 华为技术有限公司 | Power supply equipment, power supply system and server cabinet |
| CN114750612A (en) * | 2020-12-25 | 2022-07-15 | 观致汽车有限公司 | High-voltage pre-charging method and device for battery pack in electric automobile, storage medium and vehicle |
| CN115864814A (en) * | 2023-02-27 | 2023-03-28 | 阳光电源股份有限公司 | Soft start circuit and power conversion equipment |
-
2019
- 2019-11-04 CN CN201921883212.3U patent/CN210490824U/en active Active
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110677145A (en) * | 2019-11-04 | 2020-01-10 | 科博达技术股份有限公司 | Impulse current suppression circuit and method for suppressing impulse current thereof |
| CN112564078A (en) * | 2020-11-18 | 2021-03-26 | 华为技术有限公司 | Power supply system, slow starting circuit and control method |
| WO2022105242A1 (en) * | 2020-11-18 | 2022-05-27 | 华为技术有限公司 | Power supply system, slow-start circuit, and control method |
| CN114750612A (en) * | 2020-12-25 | 2022-07-15 | 观致汽车有限公司 | High-voltage pre-charging method and device for battery pack in electric automobile, storage medium and vehicle |
| CN113765084A (en) * | 2021-09-10 | 2021-12-07 | 华为技术有限公司 | Power supply equipment, power supply system and server cabinet |
| CN115864814A (en) * | 2023-02-27 | 2023-03-28 | 阳光电源股份有限公司 | Soft start circuit and power conversion equipment |
| CN115864814B (en) * | 2023-02-27 | 2023-05-30 | 阳光电源股份有限公司 | Soft start circuit and power conversion equipment |
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