CN209897071U - High-speed network card - Google Patents
High-speed network card Download PDFInfo
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- CN209897071U CN209897071U CN201920989185.1U CN201920989185U CN209897071U CN 209897071 U CN209897071 U CN 209897071U CN 201920989185 U CN201920989185 U CN 201920989185U CN 209897071 U CN209897071 U CN 209897071U
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Abstract
The utility model relates to a network equipment technical field provides a high-speed network card, include: the first memory is used for storing the firmware information of the high-speed network card; a clock signal module for providing a clock signal; an input interface respectively connected with the BMC and the CPU/PCH; an output interface connected to the switch; and the network controller is respectively connected with the first memory, the clock signal module, the input interface and the output interface, so that the function of the network card is improved, the asset management of the network card and the monitoring of the temperature of the main control chip are supported, the compatibility of the network card is improved, and the cost is reduced.
Description
Technical Field
The utility model belongs to the technical field of network equipment, especially, relate to a high-speed network card.
Background
With the rapid development of internet and cloud computing applications, the bandwidth of a server network of a data center needs to be continuously increased to meet the increase demand of mass data streams at the cloud end.
At present, the bandwidth of a data center server network is mainly a 10G network, but with the increase of data traffic, the mainstream 10G network of a data center gradually cannot meet the increase demand of mass data traffic, and needs to be expanded to meet the increasing traffic demand.
Disclosure of Invention
To the defect among the prior art, the utility model provides a high-speed network card aims at solving among the prior art 10G network of data center mainstream and can not satisfy the growing demand of mass data flow gradually, needs expand it, just can satisfy the problem of growing flow demand.
The utility model provides a technical scheme is: a high-speed network card, the high-speed network card comprising:
the first memory is used for storing the firmware information of the high-speed network card;
a clock signal module for providing a clock signal;
an input interface respectively connected with the BMC and the CPU/PCH;
an output interface connected to the switch;
and the network controller is respectively connected with the first memory, the clock signal module, the input interface and the output interface.
As an improved solution, the clock signal module includes a first clock signal module for providing a first clock signal for a network controller of the high-speed network card and a second clock signal module for providing a second clock signal for a network data signal.
As a modified solution, the frequency of the first clock signal is 75M, and the frequency of the second clock signal is 125M.
As an improved scheme, the input interface is a Mezzanine connector supporting the transmission rate of PCIE Gen 38 GT/s.
As an improved scheme, the input interface is connected with the BMC through an NCSI signal line and an I2C signal line, and is connected with the CPU/PCH through a PCIE X8 signal line.
As an improvement, the input interface is connected to the network controller via a VR line.
As an improved scheme, the high-speed network card further comprises a second memory, and the second memory is connected with the BMC through an I2C signal line.
As a modified scheme, the output interface comprises a first SFP28 interface and a second SFP28 interface.
As an improved scheme, the network controller is a CX4Lx chip.
The utility model discloses in, high-speed network card includes: the first memory is used for storing the firmware information of the high-speed network card; a clock signal module for providing a clock signal; an input interface respectively connected with the BMC and the CPU/PCH; an output interface connected to the switch; and the network controller is respectively connected with the first memory, the clock signal module, the input interface and the output interface, so that the function of the network card is improved, the asset management of the network card and the monitoring of the temperature of the main control chip are supported, the compatibility of the network card is improved, and the cost is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the technical solutions in the prior art will be briefly described below. Throughout the drawings, like elements or portions are generally identified by like reference numerals. In the drawings, elements or portions are not necessarily drawn to scale.
Fig. 1 is a schematic structural diagram of a high-speed network card provided by the present invention;
the device comprises a first memory 1, a first clock signal module 2, a second clock signal module 3, a network controller 4, an input interface 5, a second memory 6, a first SFP28 interface 7 and a second SFP28 interface 8.
Detailed Description
Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and therefore are only examples, and the protection scope of the present invention is not limited thereby.
Fig. 1 shows a schematic structural diagram of the high-speed network card provided by the present invention, and for convenience of description, only the relevant parts of the present invention are shown in the diagram.
The high-speed network card includes:
the first memory 1 is used for storing the Firmware information of the high-speed network card, the first memory 1 is SPI Flash, 128Mbit and used for storing the network card Firmware, and the first memory is communicated with the network controller 4 through an SPI bus;
a clock signal module for providing a clock signal;
an input interface 5 respectively connected with the BMC and the CPU/PCH;
an output interface connected to the switch;
and the network controller 4 is respectively connected with the first memory 1, the clock signal module, the input interface 5 and the output interface.
In this embodiment, the clock signal module includes a first clock signal module 2 for providing a first clock signal to the network controller 4 of the high-speed network card and a second clock signal module 3 for providing a second clock signal to the network data signal;
the first clock signal has a frequency of 75M and the second clock signal has a frequency of 125M.
In the present invention, the input interface 5 is a Mezzanine connector, which is a high-density high-speed interface and can support the transmission rate of PCIE Gen 38 GT/s; the data link connection between the mainboard and the network card is realized by matching with the female connector on the mainboard.
The input interface 5 is connected with the BMC through an NCSI signal line and an I2C signal line, and is connected with the CPU/PCH through a PCIE X8 signal line, namely the input interface 5 comprises a PCIE X8 signal and a 100M PCIE CLK signal; the NCSI signal communicated with the BMC realizes remote out-of-band management; an I2C signal communicated with the BMC is used for network card temperature monitoring and FRU information management; the power supply signal for supplying power to the network card, 5V input, VCORE/1.2V/1.8V and other voltages required by the network card work are generated on the network card through a VR circuit.
The utility model discloses in, high-speed network card still includes second memory 6, second memory 6 through I2C signal line with BMC is connected, and this second memory 6 is used for the asset information of storage network card, and wherein, this second memory 6 is FRU 1Kbit EEPROM, also can select the chip of bigger capacity according to the storage demand. The chip is used for storing asset information of the network card, is connected with a mainboard BMC through an I2C bus, and the BMC performs asset management by reading FRU information and can write or change other information according to requirements.
The present invention provides an output interface comprising a first SFP28 interface 7 and a second SFP28 interface 8, wherein the two interfaces are connected to a switch via a fiber optic module and a cable. The 2 separate interfaces are used instead of the integrated 1X2 interface, so that two specifications of a single port 25G and a double port 25G can be flexibly realized through simple BOM change, and the cost of the interface can be reduced by the single port 25G.
The utility model discloses in, network controller 4 chooses to use industry mainstream 25G scheme CX4Lx chip, has the low delay characteristic of high bandwidth. The 10G rate is also downward compatible.
The utility model discloses in, this high-Speed network card design has two kinds of pilot lamps, link UP/active and Speed pilot lamp. In the design of the network card, the LED model selection uses a patch material with a side light-emitting form, the patch material is placed at the bottom of a network port, and the 0603 size occupies small space and is visual in display. And several schemes are commonly used: compared with the scheme that the front light-emitting LED + the optical fiber interface is provided with the light guide column, the front light-emitting LED is placed on two sides of the interface and is provided with the light guide column and the right angle lamp tube, the scheme for using the network card is simple, the occupied space is small, and therefore the network card has better structural compatibility and the design cost is reduced.
With reference to fig. 1 and the above topology and description, it can be known that the high-speed network card has two major types of management links, NCSI out-of-band management and I2C information management; wherein:
(1) NCSI out-of-band management: the high-speed network card NCSI signal and the mainboard BMC MAC1 correspond to signals which are interconnected, and the transmission rate is 100M. The main purpose is to realize ShareNIC, so that the interface of the Ethernet controller can be used as a BMC management network port to realize remote management and can realize the communication function of a data network. Therefore, the administrator can realize management by using the data network interface without independently configuring a BMC (baseboard management controller) special port network cable, and configuration resources are saved;
(2) I2C temperature monitoring
The network card is a buckle card, heating devices such as a main control chip, an optical fiber module and the like are reversely buckled in a small space above the mainboard after the network card is installed on the mainboard, and the heat dissipation effect is poor. Under the condition, the BMC can accurately acquire the temperature of the main control chip so as to implement a proper fan regulation strategy, and plays an important role in stable operation of the network card. The network card is connected with an I2C channel to the BMC to read the temperature value by utilizing the built-in temperature monitoring function of the controller, and the design of additionally adding a temperature monitor is not needed;
(3) FRU asset management
An EEPROM is additionally designed on the network card, and the address of the EEPROM I2C is 0XA 2. The EEPROM is used for storing asset information and the like (including information such as network card type, ID number, each domain PN, SN, version, custom customization information and the like), and is connected with the BMC through an I2C bus. The BMC can read and write contents of the eprom through the I2C and change the eeprom according to requirements, so that asset management is realized.
The utility model discloses in, high-speed network card includes: a first memory 1 for storing firmware information of the high-speed network card; a clock signal module for providing a clock signal; an input interface 5 respectively connected with the BMC and the CPU/PCH; an output interface connected to the switch; the network controller 4 is respectively connected with the first memory 1, the clock signal module, the input interface 5 and the output interface, and has the following technical effects:
(1) supporting NCSI out-of-band management, I2C temperature monitoring, adding an FRU chip to realize the asset data read-write function and realizing stronger manageability;
(2) the optimized network card status lamp has the advantages of material selection, visual display, small size, better structural compatibility, no need of additional matching structural parts and cost reduction.
The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the scope of the embodiments of the present invention, and are intended to be covered by the claims and the specification.
Claims (9)
1. A high-speed network card, comprising:
the first memory is used for storing the firmware information of the high-speed network card;
a clock signal module for providing a clock signal;
an input interface respectively connected with the BMC and the CPU/PCH;
an output interface connected to the switch;
and the network controller is respectively connected with the first memory, the clock signal module, the input interface and the output interface.
2. The high-speed network card of claim 1, wherein the clock signal module comprises a first clock signal module for providing a first clock signal to a network controller of the high-speed network card and a second clock signal module for providing a second clock signal to a network data signal.
3. The high-speed network card according to claim 2, wherein the first clock signal frequency is 75M, and the second clock signal frequency is 125M.
4. The high-speed network card of claim 1, wherein the input interface is a Mezzanine connector that supports a transmission rate of PCIE Gen 38 GT/s.
5. The high-speed network card of claim 4, wherein the input interface is connected to the BMC through an NCSI signal line and an I2C signal line, and is connected to the CPU/PCH through a PCIE X8 signal line.
6. The high-speed network card of claim 5, wherein the input interface is connected to the network controller via a VR line.
7. The high-speed network card of claim 1, further comprising a second memory, the second memory being connected to the BMC via an I2C signal line.
8. The high-speed network card of claim 1, wherein the output interface comprises a first SFP28 interface and a second SFP28 interface.
9. The high-speed network card according to claim 1, wherein the network controller is a CX4Lx chip.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920989185.1U CN209897071U (en) | 2019-06-27 | 2019-06-27 | High-speed network card |
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| CN201920989185.1U CN209897071U (en) | 2019-06-27 | 2019-06-27 | High-speed network card |
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| CN209897071U true CN209897071U (en) | 2020-01-03 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112260898A (en) * | 2020-10-20 | 2021-01-22 | 恒为科技（上海）股份有限公司 | Network card and depth packet detection device |
| CN113608935A (en) * | 2021-06-20 | 2021-11-05 | 山东云海国创云计算装备产业创新中心有限公司 | Method, system, equipment and medium for testing network card |
| CN113609045A (en) * | 2021-06-29 | 2021-11-05 | 苏州浪潮智能科技有限公司 | Intelligent network card BMC communication structure and method with strong universality |
| CN113687706A (en) * | 2021-07-28 | 2021-11-23 | 苏州浪潮智能科技有限公司 | Device and method for automatically adjusting whether NCSI is opened or not |
-
2019
- 2019-06-27 CN CN201920989185.1U patent/CN209897071U/en active Active
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112260898A (en) * | 2020-10-20 | 2021-01-22 | 恒为科技（上海）股份有限公司 | Network card and depth packet detection device |
| CN112260898B (en) * | 2020-10-20 | 2022-07-19 | 恒为科技（上海）股份有限公司 | Network card and depth packet detection device |
| CN113608935A (en) * | 2021-06-20 | 2021-11-05 | 山东云海国创云计算装备产业创新中心有限公司 | Method, system, equipment and medium for testing network card |
| CN113608935B (en) * | 2021-06-20 | 2024-05-28 | 山东云海国创云计算装备产业创新中心有限公司 | Method, system, equipment and medium for testing network card |
| CN113609045A (en) * | 2021-06-29 | 2021-11-05 | 苏州浪潮智能科技有限公司 | Intelligent network card BMC communication structure and method with strong universality |
| CN113609045B (en) * | 2021-06-29 | 2023-07-18 | 苏州浪潮智能科技有限公司 | Intelligent network card BMC communication structure and method |
| CN113687706A (en) * | 2021-07-28 | 2021-11-23 | 苏州浪潮智能科技有限公司 | Device and method for automatically adjusting whether NCSI is opened or not |
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