CN208538007U - Across resistance amplifying circuit and communication device - Google Patents
Across resistance amplifying circuit and communication device Download PDFInfo
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- CN208538007U CN208538007U CN201820875648.7U CN201820875648U CN208538007U CN 208538007 U CN208538007 U CN 208538007U CN 201820875648 U CN201820875648 U CN 201820875648U CN 208538007 U CN208538007 U CN 208538007U
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Abstract
This disclosure relates to a kind of across resistance amplifying circuit and communication device.One kind is across resistance amplifying circuit, comprising: amplifying circuit, with input terminal and output end, the amplifying circuit is configured as obtaining input current by the input terminal, and generates output voltage in the output end;And negative-feedback circuit, it is connect with the amplifying circuit, and be configured as adjusting the voltage of the input terminal according to the difference of the output voltage and reference voltage when the input current changes.A kind of communication device, with reception device, the reception device includes described across resistance amplifying circuit.
Description
Technical field
This application involves amplifying circuits, more particularly to one kind across resistance amplifying circuit and communication device.
Background technique
Explanation and example are since it includes be considered as the prior art in this chapters and sections below.
Trans-impedance amplifier (Transimpedance Amplifier, TIA) is commonly used in being converted to input current signal
Corresponding output voltage signal.Trans-impedance amplifier is commonly used in receiving current signal from preceding level detection circuitry, examines from previous stage
The current signal of slowdown monitoring circuit output is received by trans-impedance amplifier and is converted to and can be handled by the processor of trans-impedance amplifier rear stage
Corresponding voltage signal.Wherein, previous stage detection circuit is usually senser element, and the processor of rear stage is commonly used in processing electricity
Press signal.
Utility model content
One of embodiment of this exposure is to provide a kind of across resistance amplifying circuit, comprising: amplifying circuit, with input terminal
And output end, the amplifying circuit are configured as obtaining input current by the input terminal, and defeated in output end generation
Voltage out;And negative-feedback circuit, it is connect with the amplifying circuit, and be configured as when the input current changes, according to
The difference of the output voltage and reference voltage adjusts the voltage of the input terminal.
This exposure embodiment additionally provides a kind of communication device, and with reception device, the reception device includes above-mentioned
Across resistance amplifying circuit.
Detailed description of the invention
It is the electrical block diagram across resistance amplifying circuit of one embodiment of this exposure shown in Fig. 1.
It is the electrical block diagram across resistance amplifying circuit of one embodiment of this exposure shown in Fig. 2.
It is the electrical block diagram across resistance amplifying circuit of one embodiment of this exposure shown in Fig. 3.
It is the electrical block diagram across resistance amplifying circuit of one embodiment of this exposure shown in Fig. 4.
It is the electrical block diagram across resistance amplifying circuit of one embodiment of this exposure shown in Fig. 5.
It is the electrical block diagram across resistance amplifying circuit of one embodiment of this exposure shown in Fig. 6.
Specific embodiment
This exposure embodiment provides many different embodiments or example of the different characteristic for implementing this exposure embodiment.
The particular instance of component and arrangement is described below to simplify this exposure embodiment.
For ease of description, " first ", " second ", " third " etc. can be used to distinguish herein a figure or a series of figures
Different components." first ", " second ", " third " etc. are not intended to describe corresponding component.
It is as shown in Figure 1 the structural schematic diagram across resistance amplifying circuit of one embodiment of this exposure.It should be across resistance amplifying circuit packet
Include input, output end VOUT, the first transistor M1, second transistor M2, first resistor device RF, second resistor RL, it is first straight
Stream source IDC1With the second DC source IDC2。
According to one embodiment of this exposure, the first transistor M1Grid can be used as the input terminal and the across resistance amplifying circuit
Two-transistor M2Source electrode can be used as this across resistance amplifying circuit output end VOUT.The first transistor M1Grid be configured to receive
The input current i provided by photoelectric induction device PDIN1, wherein photoelectric induction device PD can be photodiode, but not
It is defined in this.The other end of photoelectric induction device PD and the first feeder ear VDD1Connection, the first feeder ear VDD1For giving photoelectricity
Sensing device PD provides operating voltage.First resistor device RFBe connected to the first transistor M1Grid and output end VOUTBetween.
The first transistor M1Source electrode connect with ground terminal GND, the first transistor M1Drain electrode connect second resistor RLOne end,
Two resistor RLThe other end and the second feeder ear VDD2Electrical connection.Second transistor M2Grid and the first transistor M1Drain electrode
Connection, the drain electrode of second transistor and the second feeder ear VDD2Connection.First DC source IDC1It is series at second transistor M2Source
Between pole and ground terminal GND.Second DC source IDC2With second resistor RLIt is connected in parallel.According to one embodiment of this exposure, second
DC source IDC2It is configured to provide electric current IDC3To the first transistor M1Drain electrode.
It is single ended input across resistance amplifying circuit across resistance amplifying circuit, the optical signal that photoelectric induction device PD is incuded turns
Become current signal iIN1, it is defeated this should to be received across resistance amplifying circuit as the single-ended input current signal across resistance amplifying circuit
Enter current signal and with amplified voltage signal from output end VOUTOutput.This is realized across resistance amplifying circuit to current signal
Linear Amplifer.The received photosignals of photoelectric induction device PD institute usually have very big dynamic range, when input current compared with
When greatly and being more than the linear input range across resistance amplifying circuit, the linearity reduced performance across resistance amplifying circuit can be made, from
And limit the application across resistance amplifying circuit.
It is illustrated in figure 2 the structural schematic diagram across resistance amplifying circuit of one embodiment of this exposure.It should be across resistance amplifying circuit packet
Include input terminal IIN, output end VOUT, the first transistor Q1, second transistor Q2, third transistor Q3, first resistor device Rf, second
Resistor RCWith the first DC source IDC1.According to one embodiment of this exposure, the first transistor Q1Base stage as should across resistance amplification electricity
The input terminal I on roadIN, and second transistor Q2Collector as this across resistance amplifying circuit output end VOUT.The first transistor Q1
Emitter connect with ground terminal, the first transistor Q1Collector and second transistor Q2Emitter connection, second transistor
Q2Collector and second resistor RCOne end connection, second transistor Q2Base stage for connecting biasing circuit, biasing circuit
For for second transistor Q2Base stage provide bias voltage Vbias.Second resistor RCThe other end and feeder ear VCCConnection.
Third transistor Q3Base stage and second transistor Q2Collector connection, output end VOUTWith second resistor RCOne end connect
It connects.Third transistor Q3Collector and feeder ear VCCConnection, the first DC source IDC1It is connected to first resistor device RfOne end
Between ground terminal.First resistor device RfIt is connected to the first transistor Q1Base stage and third transistor Q3Emitter between.
For single-ended second resistor R should be flowed through across resistance amplifying circuitCQuiescent current be equal to (vcc-vbe1-vbe3)/
Rc, wherein vcc is feeder ear VCCVoltage value, vbe1 be the first transistor Q1Base stage and emitter between PN junction voltage
Voltage value, vbe3 are third transistor Q3Base stage and emitter between PN junction voltage voltage value, rc be second resistor RC
Resistance value.It follows that the branch quiescent current is directly related with two PN junction voltages, to semiconductor technology, environment temperature
Sensitive compared with supply voltage, branch current is unstable, influences reliability of the single ended input across resistance amplifying circuit, moreover, increasing
The requirement of system power supply module, to increase the complexity of system.
It is illustrated in figure 3 the electrical block diagram across resistance amplifying circuit of one embodiment of this exposure.Fig. 3's amplifies across resistance
Circuit includes amplifying circuit and negative-feedback circuit.
Amplifying circuit includes input, output end VOUT, the first transistor M1, second transistor M2, first resistor device RF、
Second resistor RL, DC source IDC1.According to one embodiment of this exposure, the first transistor M1With second transistor M2All have source
Pole, drain and gate, wherein the first transistor M1Grid can be used as this across resistance amplifying circuit input terminal and the first crystal
Pipe M1Drain electrode can be used as this across resistance amplifying circuit output end VOUT, wherein photoelectric induction device PD can be photodiode,
But not limited to this.The first transistor M1Grid be configured to receive the input current provided by photoelectric induction device PD
iIN1.First resistor device RFBe connected to the first transistor M1Grid and second transistor M2Source electrode between.The first transistor
M1Source electrode connect with ground terminal GND, the first transistor M1Drain electrode connect second resistor RLOne end, second resistor RL
The other end and feeder ear VDD2Electrical connection.Second transistor M2Grid and the first transistor M1Drain electrode connection, the second crystal
Pipe M2Drain electrode and feeder ear VDD2Connection.DC source IDC1It is connected to second transistor M2Source electrode and ground terminal GND between.
Negative-feedback circuit includes third transistor M3And amplifier OP1.According to one embodiment of this exposure, amplifier OP1It can
For operational amplifier (Operation Amplifier, OPAmp).Amplifier OP1Including first input end (such as Fig. 3 acceptance of the bid
Show the endpoint of "-"), the second input terminal endpoint of "+" (in such as Fig. 3 indicate) and output end, first input end and amplifying circuit
Output end VOUTConnection, the second input terminal and reference voltage VREFConnection.Third transistor M3With source electrode, drain and gate,
Wherein third transistor M3Grid and amplifier OP1Output end connection, third transistor M3Source electrode connect ground terminal GND,
And third transistor M3Drain electrode and second transistor M2Source electrode, DC source IDC1With second resistor RFConnection.According to originally taking off
Reveal an embodiment, the first transistor M1With second transistor M3For working in magnifying state, second transistor M2For as source
Pole follower.
The first transistor M1Grid as this across resistance amplifying circuit input terminal, for receiving input current iIN1.It should be across
The amplifying circuit for hindering amplifying circuit is receiving input current iIN1Output voltage after generating Linear Amplifer afterwards passes through output end VOUT
Output.As the input current i of trans-impedance amplifierIN1When increase, pass through first resistor device RFElectric current increase, thus make first electricity
Hinder device RFThe voltage at both ends increases, the first transistor M1Drain electrode and second resistor RLThe electric current I of place branch roadDC2Become larger,
Second resistor RLThe voltage difference at both ends increases.Due to output end VOUTOutput voltage be feeder ear VDD2Cut second resistor
RLThe voltage difference at both ends, therefore work as second resistor RLWhen the voltage difference at both ends increases, amplification circuit output end VOUTOutput voltage
Reduce, linearity performance is caused to decline.Due to amplifier OP1Presence, pass through setting reference voltage VREFAnd by reference voltage
VREFWith output end VOUTVoltage difference amplify, output end VOUTVoltage decline will lead to the voltage difference and become larger, to amplify
Device OP1The amplified voltage of output end will increase, and can make third transistor M in this way3Grid and source electrode between voltage increase
Greatly, so that the voltage of node 1 be made to decline, that is, make first resistor device RFThe voltage at both ends declines, to compensate counteracting first crystal
Pipe M1Grid voltage increase, to realize negative-feedback.Therefore, compared to such as Fig. 1 and Fig. 2 across resistance amplifying circuit, Fig. 3's
Across resistance amplifying circuit negative-feedback circuit can in the case where input current increases, improve this across resistance amplifying circuit it is linear
Degree, increases linear input range, vice versa.In other words, the negative-feedback circuit of Fig. 3 can be connect with amplifying circuit, and be matched
It is set to as input current iIN1When change, according to output end VOUTOutput voltage and reference voltage VREFDifference adjustment input terminal
Voltage.
In addition, the negative-feedback circuit stablizes output end VOUTQuiescent voltage, make output end VOUTStatic voltage stability exist
Reference voltage VREF, to make to flow through second resistor RLThe quiescent current I of place branchDC2For (vdd2-vref)/rl, wherein
Vdd2 is the first feeder ear VDD2Voltage value, vref be reference voltage VREFVoltage value, rl be second resistor RLResistance
Value.Compared to such as Fig. 2 across resistance amplifying circuit, Fig. 3's can significantly reduce the branch static circuit pair across resistance amplifying circuit
The sensitivity of semiconductor technology, power supply and environmental problem keeps the branch quiescent current reliable and stable.
In addition, the second feeder ear V across resistance amplifying circuit of Fig. 1DD2The minimum voltage value that must satisfy is VGS1+VGS2+
VDS, wherein VGS1For the first transistor M1Grid and source electrode between voltage value, VGS2For second transistor M2Grid and source
Voltage value and V between poleDSFor the second DC source IDC2The voltage difference at both ends.And the feeder ear V across resistance amplifying circuit of Fig. 3DD2
The minimum voltage value that must satisfy is only vds3+vgs2+idc2*rl, wherein vds3 is third transistor M3Drain electrode and source electrode
Between voltage value, vgs2 be second transistor M2Grid and source electrode between voltage value, idc2 be quiescent current IDC2Electricity
Flow valuve.Therefore, compared to Fig. 1 across resistance amplifying circuit, Fig. 3's has lower power consumption across resistance amplifying circuit.
It is illustrated in figure 4 the electrical block diagram across resistance amplifying circuit of one embodiment of this exposure.The present embodiment across
It is similar across amplifying circuit is hindered with Fig. 3 to hinder amplifying circuit, wherein one the difference is that: the amplifying circuit of Fig. 4 further include: the
Four transistor M4Comprising source electrode, drain and gate, the 4th transistor M4Source electrode and the first transistor M1Drain electrode connection, the
Four transistor M4Drain electrode and second resistor RLFirst terminal connection, the 4th transistor M4Grid and biased electrical pressure side VBIA
It connects and is used to receive bias voltage.
Wherein biased electrical pressure side VBIAIt can connect external bias circuit, and the first transistor M1With the 4th transistor M4It constitutes
Vertical cascade (Cascode) enlarged structure, wherein Cascode enlarged structure is cascode structure.By the way that the 4th crystal is arranged
Pipe M4To reduce the first transistor M1Drain electrode impedance, further increase across resistance amplifying circuit the linearity.
It is illustrated in figure 5 the electrical block diagram across resistance amplifying circuit of one embodiment of this exposure.The present embodiment across
It is similar across amplifying circuit is hindered with Fig. 4 to hinder amplifying circuit, wherein one the difference is that: amplifying circuit further include: second puts
Big device OP2, the second amplifier OP2Input terminal and the 4th transistor M4Source electrode connection, the second amplifier OP2Input terminal with
4th transistor M4Grid connection.
Wherein, the second amplifier OP2With the 4th transistor M4Constitute negative feedback loop, and the first transistor M1, the 4th crystal
Pipe M4With the second amplifier OP2Regulated Cascode enlarged structure is constituted, wherein Regulated Cascode amplification knot
Structure is adjustable type cascode structure.The first transistor M can be further decreased in this way1Drain electrode impedance, and decay first
Transistor M1Drain electrode unfavorable ripple voltage, further increase across resistance amplifying circuit the linearity.
It is illustrated in figure 6 the electrical block diagram across resistance amplifying circuit of one embodiment of this exposure.The present embodiment across
Hinder that amplifying circuit is similar across resistance amplifying circuit with Fig. 3, wherein one the difference is that: Fig. 6 across hindering the of amplifying circuit
Three transistor M3Drain electrode and amplifying circuit input terminal connect.The wherein input terminal of amplifying circuit, that is, the first transistor M1Grid
Pole.
The feedback principle across resistance amplifying circuit of the embodiment is similar in Fig. 3, in this embodiment, works as input current
When increase, the increase of the voltage of the input terminal of compensation counteracting amplifying circuit is directly adjusted by feed circuit, to realize negative anti-
Feedback is adjusted.To improve the linear input range across resistance amplifying circuit.
It should be noted that the difference in Fig. 4 and Fig. 5 with respect to Fig. 3, can also increase in the technical solution of Fig. 6
To form corresponding technical solution.
In one embodiment of this exposure, CMOS technology, BiCMOS technique or bipolar technology shape are used across resistance amplifying circuit
At but not limited to this.It should may be implemented in single integrated device across resistance amplifying circuit, discrete component can also be used
It realizes, specific implementation can be selected according to the actual situation.
In conclusion some embodiments of this exposure, which at least have the effect that, improves linear input range and linear
Degree, makes branch possess stable quiescent current, increases the stability and reliability of circuit, and the feelings in consumption same current
Under condition, the supply voltage of normal work reduces a threshold voltage (or a PN junction voltage) or more, that is, reduces circuit function
Consumption, in addition, circuit realizes that condition is simple.
One embodiment of this exposure additionally provides a kind of communication device, with transmission device and reception device, reception dress
Set the trans-impedance amplifier including above-mentioned Fig. 1 to Fig. 6.
In some embodiments of this exposure, which can be photoreceiver, and but not limited to this.For example, should
It can be used as the front end of frequency mixer across resistance amplifying circuit.
" one embodiment of this exposure " or the reference of similar terms are meant together with other embodiments throughout this manual
The a particular feature, structure, or characteristic being described together is contained at least one embodiment and can be not necessarily in currently all embodiment
In.Therefore, phrase " one embodiment of this exposure " or similar terms throughout this manual everywhere in be accordingly not necessarily referring to
The same embodiment.Furthermore, it is possible to which any suitable mode combines a particular feature, structure, or characteristic of any specific embodiment
With one or more other embodiments.It should be understood that other variations and the modification mirror of described herein and diagram illustrating embodiment
Teaching in this article is the part of spirit and scope that is possible and will being considered as this exposure.
The technology contents and technical characterstic of this exposure have revealed that as above, however those skilled in the art still may base
In this exposure teaching and announcement and make various replacements and modification without departing substantially from this exposure spirit.Therefore, the protection model of this exposure
The revealed content of embodiment should be not limited to by enclosing, and should include various replacements and modification without departing substantially from this exposure, and be this patent
Application claims are covered.
Claims (12)
1. a kind of across resistance amplifying circuit, comprising:
Amplifying circuit, with input terminal and output end, the amplifying circuit is configured as obtaining by the input terminal and input
Electric current, and output voltage is generated in the output end;And
Negative-feedback circuit is connect with the amplifying circuit, and is configured as when the input current changes, according to described defeated
The difference of voltage and reference voltage adjusts the voltage of the input terminal out.
2. it is according to claim 1 across resistance amplifying circuit, wherein the negative-feedback circuit is configured as when the input electricity
When stream increases, reduce the voltage of the input terminal according to the difference of the output voltage and reference voltage.
3. it is according to claim 1 across resistance amplifying circuit, wherein the amplifying circuit includes:
The first transistor, with source electrode, drain and gate, wherein the grid of the first transistor and the input terminal connect
It connects, the source electrode of the first transistor is connect with ground terminal;
Second transistor, with source electrode, drain and gate, wherein the grid of the second transistor and the output end connect
It connects;
First resistor device is connected between the input terminal and the source electrode of the second transistor;
Second resistor, the first terminal of the second resistor are connect with the grid of the second transistor, second electricity
The Second terminal of device is hindered for connecting the first feeder ear;
DC source, the first terminal of the DC source are connect with the source electrode of the second transistor, the second end of the DC source
It is sub to be connect with the ground terminal.
4. it is according to claim 3 across resistance amplifying circuit, wherein the negative-feedback circuit includes:
First amplifier comprising first input end, the second input terminal and output end, the first input end and amplification electricity
The output end on road connects, and second input terminal is connect with the reference voltage;
Third transistor, with source electrode, drain and gate, wherein the grid of the third transistor and first amplifier
Output end connection, the source electrode of the third transistor connects the ground terminal.
5. it is according to claim 4 across resistance amplifying circuit, wherein the drain electrode of the third transistor and second crystal
The source electrode of pipe connects.
6. it is according to claim 5 across resistance amplifying circuit, wherein the drain electrode of the first transistor and the second resistance
The first terminal of device connects.
7. it is according to claim 5 across resistance amplifying circuit, wherein the amplifying circuit further include:
4th transistor comprising source electrode, drain and gate, the leakage of the source electrode and the first transistor of the 4th transistor
Pole connection, the drain electrode of the 4th transistor are connect with the first terminal of the second resistor, the grid of the 4th transistor
Pole and biased electrical press bond simultaneously are used to receive bias voltage.
8. according to claim 7 across resistance amplifying circuit, wherein the amplifying circuit further include:
The input terminal of second amplifier, second amplifier is connect with the source electrode of the 4th transistor, second amplifier
Input terminal is connect with the grid of the 4th transistor.
9. it is according to claim 4 across resistance amplifying circuit, wherein the drain electrode of the third transistor and the amplifying circuit
The input terminal connection.
10. it is according to claim 1 to 9 across resistance amplifying circuit, wherein described across resistance amplifying circuit further include:
Photoelectric induction device, is connected to the input terminal of the amplifying circuit, and is configured to provide the input current.
11. -9 is described in any item across resistance amplifying circuit according to claim 1, wherein described to use CMOS across resistance amplifying circuit
Technique, BiCMOS technique or bipolar technology are formed.
12. a kind of communication device, with reception device, the reception device includes as claim 1-11 is described in any item
Across resistance amplifying circuit.
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CN201820875648.7U CN208538007U (en) | 2018-06-05 | 2018-06-05 | Across resistance amplifying circuit and communication device |
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CN201820875648.7U CN208538007U (en) | 2018-06-05 | 2018-06-05 | Across resistance amplifying circuit and communication device |
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CN208538007U true CN208538007U (en) | 2019-02-22 |
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