CN207718364U - A kind of multichannel RS-422 serial ports expansion interfaces based on FPGA - Google Patents
A kind of multichannel RS-422 serial ports expansion interfaces based on FPGA Download PDFInfo
- Publication number
- CN207718364U CN207718364U CN201820032058.8U CN201820032058U CN207718364U CN 207718364 U CN207718364 U CN 207718364U CN 201820032058 U CN201820032058 U CN 201820032058U CN 207718364 U CN207718364 U CN 207718364U
- Authority
- CN
- China
- Prior art keywords
- fpga
- chip
- multichannel
- serial
- bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Information Transfer Systems (AREA)
Abstract
The utility model discloses a kind of 422 serial ports expansion interfaces of multichannel RS based on FPGA, including fpga chip, multiple RS422 interface chips, the receiving terminal and transmitting terminal of any one RS422 interface chip are correspondingly connected with one I/O mouthfuls of FPGA by conversion chip respectively, fpga chip is connected by bus with host computer, the bus includes address bus and data/address bus, the two parallel connection.The utility model by using FPGA I/O mouths, connect the sending and receiving end of RS422 interface chips, utilize parallel bus and host computer into row data communication simultaneously, realize higher speed, more multichannel serial interface extension, in conjunction with FPGA software programmings serial ports transceiver module may be implemented arbitrary baud rate serial data transmitting-receiving, serial port baud rate can be configured by host computer, easy to use, the high-speed communication of the realization multi-channel serial port and host that can stablize reduces cost simultaneously.
Description
Technical field
The utility model is related to communication interface technology field more particularly to a kind of multichannel RS-422 serial ports expansions based on FPGA
Open up interface.
Background technology
Currently, in communication interface, control is flexible, interface is simple, occupying system resources are few by it for serial interface devices
The advantages that, it is widely used in various fields.Especially in embedded systems, usually will appear many equipment to be required for passing through
Serial ports is communicated with host, this makes developer usually face the problem of serial communication interface deficiency.Currently, for above-mentioned
The common solution of problem has software simulation method and is extended serial ports using proprietary extensions chip.But software simulation method
Although implementing simply, in actual use, stability bottom, poor reliability;And it is carried out by proprietary extensions chip monolithic
In the method for extended serial port, the negligible amounts for the serial ports that can be extended, to which most use demands cannot be met.
Utility model content
The purpose of this utility model is to provide a kind of multichannel RS-422 serial ports expansion interfaces based on FPGA, can stablize
Realize the high-speed communication of multi-channel serial port and host.
The technical solution adopted in the utility model is:
A kind of multichannel RS-422 serial ports expansion interfaces based on FPGA, including fpga chip, multiple RS422 interface chips,
The receiving terminal and transmitting terminal of any one RS422 interface chip are correspondingly connected with an I/O of FPGA by conversion chip respectively
Mouthful, fpga chip is connected by bus with host computer, and the bus includes address bus and data/address bus, and the two connects parallel
It connects.
The conversion chip is MAX3490.
Further include having multiple FIFO memory buffers chips, the single FIFO memory buffers chip-in series are in conversion chip
And between one I/O mouthfuls of FPGA.
The FIFO memory buffers chips use AL422B.
The utility model connects the sending and receiving end of RS422 interface chips, while using parallel by using the I/O mouths of FPGA
Bus, into row data communication, realizes higher speed, the serial interface extension of more multichannel, in conjunction with the string of FPGA software programmings with host computer
The transmitting-receiving of the serial data of arbitrary baud rate may be implemented in mouth transceiver module, and serial port baud rate can be matched by host computer
It sets, easy to use, the high-speed communication of the realization multi-channel serial port and host that can stablize reduces cost simultaneously, has larger push away
Wide value.
Description of the drawings
Fig. 1 is the schematic block circuit diagram of the utility model.
Specific implementation mode
As shown in Figure 1, the utility model includes fpga chip, multiple RS422 interface chips, any one described RS422 connects
The receiving terminal and transmitting terminal of mouth chip are correspondingly connected with one I/O mouthfuls of FPGA by conversion chip respectively, and fpga chip passes through total
Line is connected with host computer, and the bus includes address bus and data/address bus, the two parallel connection.
The conversion chip is MAX3490, can be carried out at the same time transmitting-receiving action.
Further include having multiple FIFO memory buffers chips, the single FIFO memory buffers chip-in series are in conversion chip
And between one I/O mouthfuls of FPGA.
The realization method of the technology is further described with reference to above-mentioned attached drawing.
RS422 rs 232 serial interface signals are converted to RS232 signals by conversion chip, are transferred to the I/O mouths of FPGA.By software
UART transceiver modules send serial data to data processing module.String property data are converted to parallel data by data processing module,
Data are identified from which serial ports by address bus, host computer is sent data to by data/address bus.So far,
Receive process are finished.
Transmission process is then sent data and the serial ports way to be sent by data/address bus and address bus by host computer
To FPGA, serial data is converted parallel data into soon via data processing mould, is judged from which according to the data of address bus
Road serial ports is sent out.So far, transmission process is finished.
Higher speed may be implemented compared to serial ports expansion serial ports, using parallel bus extended serial port in the utility model, more
The serial interface on road extends.Using the I/O mouths of FPGA, connect the sending and receiving end of RS422 interface chips, at the same using parallel bus with
Host computer is into row data communication.The receipts of the serial data of arbitrary baud rate may be implemented in the serial ports transceiver module of FPGA software programmings
Hair, serial port baud rate can be configured by host computer, easy to use.The reliable of high-speed transfer can be ensured by introducing FIFO,
The throughput of data is improved, while data being avoided to be lost because not having timely processing.Data processing module is then used for realizing string simultaneously
It converts, and identifies the way of each circuit-switched data by data/address bus, the bus communication of control and host computer.
The utility model patent is not take up system extra resource compared to software simulation method extended serial port, can be reliably
Realize that the extension of high-speed serial data receives.The I/O of FPGA can be used compared to special serial port extended chip, this patent is utilized
Cause for gossip shows multi-channel serial port extension, and extended capability is far longer than single special chip.
Claims (4)
1. a kind of multichannel RS-422 serial ports expansion interfaces based on FPGA, it is characterised in that:Including fpga chip, multiple RS422
Interface chip, the receiving terminal and transmitting terminal of any one RS422 interface chip are correspondingly connected with FPGA by conversion chip respectively
One I/O mouthfuls, fpga chip is connected by bus with host computer, and the bus includes address bus and data/address bus, two
Person is connected in parallel.
2. the multichannel RS-422 serial ports expansion interfaces according to claim 1 based on FPGA, it is characterised in that:Described turns
It is MAX3490 to change chip.
3. the multichannel RS-422 serial ports expansion interfaces according to claim 2 based on FPGA, it is characterised in that:Further include having
Multiple FIFO memory buffers chips, an I/O of the multiple FIFO memory buffers chip-in series in conversion chip and FPGA
Between mouthful.
4. the multichannel RS-422 serial ports expansion interfaces according to claim 3 based on FPGA, it is characterised in that:Described
FIFO memory buffers chips use AL422B.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201820032058.8U CN207718364U (en) | 2018-01-09 | 2018-01-09 | A kind of multichannel RS-422 serial ports expansion interfaces based on FPGA |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201820032058.8U CN207718364U (en) | 2018-01-09 | 2018-01-09 | A kind of multichannel RS-422 serial ports expansion interfaces based on FPGA |
Publications (1)
Publication Number | Publication Date |
---|---|
CN207718364U true CN207718364U (en) | 2018-08-10 |
Family
ID=63055109
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201820032058.8U Active CN207718364U (en) | 2018-01-09 | 2018-01-09 | A kind of multichannel RS-422 serial ports expansion interfaces based on FPGA |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN207718364U (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111124974A (en) * | 2019-12-25 | 2020-05-08 | 西安易朴通讯技术有限公司 | Interface expansion device and method |
CN112364397A (en) * | 2020-11-27 | 2021-02-12 | 天津七所精密机电技术有限公司 | Asynchronous serial port secure communication system and method based on FPGA |
CN113127400A (en) * | 2019-12-31 | 2021-07-16 | 中国科学院长春光学精密机械与物理研究所 | FPGA-based multi-channel serial port server and data transmission method thereof |
CN114706810A (en) * | 2022-04-07 | 2022-07-05 | 中国兵器装备集团自动化研究所有限公司 | Baud rate self-adaptive serial port communication extension device and method based on FPGA |
CN115442351A (en) * | 2022-08-06 | 2022-12-06 | 中国船舶重工集团公司第七一五研究所 | High-speed RS-422 serial port communication module based on FPGA and CPU |
-
2018
- 2018-01-09 CN CN201820032058.8U patent/CN207718364U/en active Active
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111124974A (en) * | 2019-12-25 | 2020-05-08 | 西安易朴通讯技术有限公司 | Interface expansion device and method |
CN111124974B (en) * | 2019-12-25 | 2024-01-26 | 西安易朴通讯技术有限公司 | Interface expanding device and method |
CN113127400A (en) * | 2019-12-31 | 2021-07-16 | 中国科学院长春光学精密机械与物理研究所 | FPGA-based multi-channel serial port server and data transmission method thereof |
CN112364397A (en) * | 2020-11-27 | 2021-02-12 | 天津七所精密机电技术有限公司 | Asynchronous serial port secure communication system and method based on FPGA |
CN112364397B (en) * | 2020-11-27 | 2023-01-13 | 天津七所精密机电技术有限公司 | Asynchronous serial port safety communication system and method based on FPGA |
CN114706810A (en) * | 2022-04-07 | 2022-07-05 | 中国兵器装备集团自动化研究所有限公司 | Baud rate self-adaptive serial port communication extension device and method based on FPGA |
CN115442351A (en) * | 2022-08-06 | 2022-12-06 | 中国船舶重工集团公司第七一五研究所 | High-speed RS-422 serial port communication module based on FPGA and CPU |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN207718364U (en) | A kind of multichannel RS-422 serial ports expansion interfaces based on FPGA | |
CN101208678B (en) | Software layer for communication between RS-232 to I2C translation IC and a host | |
CN102202058B (en) | Controller for protocol conversion between multipath UART bus and CAN bus | |
CN101551786B (en) | Manufacturing method of baud rate self-adaptive serial communication repeater | |
CN104281548A (en) | Method, device and system for data transmission based on AXI bus | |
CN110311697B (en) | Remote data concentrator | |
CN103823785B (en) | Multi-way ARINC429 data transmit-receive circuit structure based on development of DSP and CPLD | |
CN102752180A (en) | Method for achieving controller area network (CAN) bus network nodes | |
CN105786741B (en) | SOC high-speed low-power-consumption bus and conversion method | |
CN205375458U (en) | Four -channel's multi -protocols communication interface card | |
CN106656716A (en) | Loop network topology structure with common clock | |
CN101901199B (en) | Method and system for data transparent transmission | |
CN101122894A (en) | Asynchronous serial communication control device | |
CN110708324A (en) | Method and system for realizing point-to-point communication between FPGA (field programmable Gate array) board cards | |
CN103914427A (en) | On-chip communication method and on-chip communication device on basis of three physical interconnection lines for integrated circuits | |
CN108667706A (en) | The adjustable Ethernet serial server of serial ports quantity dynamic and its data transmission method | |
CN104050121A (en) | Double-receiving double-emitting programmable ARINC 429 communication interface chip | |
CN101464844B (en) | Control method and bus interface of RAM use right | |
CN205249496U (en) | Wireless communication terminal | |
CN201503585U (en) | Multi-serial-port data communication card equipment based on CPCI bus | |
CN214474972U (en) | PCIE and RapidIO data conversion device | |
CN203761399U (en) | Optical communication equipment of single-fiber bi-directional symmetrical rate and system | |
CN210428438U (en) | Interface conversion board | |
CN203658995U (en) | Serial data transmission system | |
CN206348782U (en) | ETS voting cards based on FPGA architecture |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |